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10,203
static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) { S390CPU *cpu = S390_CPU(cs); SigpInfo *si = arg.host_ptr; struct kvm_s390_irq irq = { .type = KVM_S390_SIGP_STOP, }; /* disabled wait - sleeping in user space */ if (s390_cpu_get_state(cpu) == CPU_STATE...
false
qemu
eabcea18f835178c1f8f088f88bf00e379f09438
static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) { S390CPU *cpu = S390_CPU(cs); SigpInfo *si = arg.host_ptr; struct kvm_s390_irq irq = { .type = KVM_S390_SIGP_STOP, }; if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && cs->halted) { s390_cp...
{ "code": [], "line_no": [] }
static void FUNC_0(CPUState *VAR_0, run_on_cpu_data VAR_1) { S390CPU *cpu = S390_CPU(VAR_0); SigpInfo *si = VAR_1.host_ptr; struct kvm_s390_irq VAR_2 = { .type = KVM_S390_SIGP_STOP, }; if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && VAR_0->halted) { s390_cpu_set...
[ "static void FUNC_0(CPUState *VAR_0, run_on_cpu_data VAR_1)\n{", "S390CPU *cpu = S390_CPU(VAR_0);", "SigpInfo *si = VAR_1.host_ptr;", "struct kvm_s390_irq VAR_2 = {", ".type = KVM_S390_SIGP_STOP,\n};", "if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && VAR_0->halted) {", "s390_cpu_set_state(CPU_STAT...
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10,204
static int xen_remove_from_physmap(XenIOState *state, hwaddr start_addr, ram_addr_t size) { unsigned long i = 0; int rc = 0; XenPhysmap *physmap = NULL; hwaddr phys_offset = 0; physmap = get_physmapping(state, start_addr...
false
qemu
643f59322432d77165329dfabe2d040d7e30dae8
static int xen_remove_from_physmap(XenIOState *state, hwaddr start_addr, ram_addr_t size) { unsigned long i = 0; int rc = 0; XenPhysmap *physmap = NULL; hwaddr phys_offset = 0; physmap = get_physmapping(state, start_addr...
{ "code": [], "line_no": [] }
static int FUNC_0(XenIOState *VAR_0, hwaddr VAR_1, ram_addr_t VAR_2) { unsigned long VAR_3 = 0; int VAR_4 = 0; XenPhysmap *physmap = NULL; hwaddr phys_offset = 0; physmap = get_physmapping(VAR_0, VAR_1, VAR_2); if (...
[ "static int FUNC_0(XenIOState *VAR_0,\nhwaddr VAR_1,\nram_addr_t VAR_2)\n{", "unsigned long VAR_3 = 0;", "int VAR_4 = 0;", "XenPhysmap *physmap = NULL;", "hwaddr phys_offset = 0;", "physmap = get_physmapping(VAR_0, VAR_1, VAR_2);", "if (physmap == NULL) {", "return -1;", "}", "phys_offset = physma...
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10,205
int json_lexer_flush(JSONLexer *lexer) { return lexer->state == IN_START ? 0 : json_lexer_feed_char(lexer, 0); }
false
qemu
b011f61931f0113b29b7cd7e921dd022e0b04834
int json_lexer_flush(JSONLexer *lexer) { return lexer->state == IN_START ? 0 : json_lexer_feed_char(lexer, 0); }
{ "code": [], "line_no": [] }
int FUNC_0(JSONLexer *VAR_0) { return VAR_0->state == IN_START ? 0 : json_lexer_feed_char(VAR_0, 0); }
[ "int FUNC_0(JSONLexer *VAR_0)\n{", "return VAR_0->state == IN_START ? 0 : json_lexer_feed_char(VAR_0, 0);", "}" ]
[ 0, 0, 0 ]
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10,206
float64 helper_fxtod(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); ret = int64_to_float64(src, &env->fp_status); check_ieee_exceptions(env); return ret; }
false
qemu
7385aed20db5d83979f683b9d0048674411e963c
float64 helper_fxtod(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); ret = int64_to_float64(src, &env->fp_status); check_ieee_exceptions(env); return ret; }
{ "code": [], "line_no": [] }
float64 FUNC_0(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); ret = int64_to_float64(src, &env->fp_status); check_ieee_exceptions(env); return ret; }
[ "float64 FUNC_0(CPUSPARCState *env, int64_t src)\n{", "float64 ret;", "clear_float_exceptions(env);", "ret = int64_to_float64(src, &env->fp_status);", "check_ieee_exceptions(env);", "return ret;", "}" ]
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10,207
static void test_visitor_out_list(TestOutputVisitorData *data, const void *unused) { const char *value_str = "list value"; TestStructList *p, *head = NULL; const int max_items = 10; bool value_bool = true; int value_int = 10; Error *err = NULL; QLis...
false
qemu
3f66f764ee25f10d3e1144ebc057a949421b7728
static void test_visitor_out_list(TestOutputVisitorData *data, const void *unused) { const char *value_str = "list value"; TestStructList *p, *head = NULL; const int max_items = 10; bool value_bool = true; int value_int = 10; Error *err = NULL; QLis...
{ "code": [], "line_no": [] }
static void FUNC_0(TestOutputVisitorData *VAR_0, const void *VAR_1) { const char *VAR_2 = "list value"; TestStructList *p, *head = NULL; const int VAR_3 = 10; bool value_bool = true; int VAR_4 = 10; Error *err = NULL; QListEntry *entry; QObject...
[ "static void FUNC_0(TestOutputVisitorData *VAR_0,\nconst void *VAR_1)\n{", "const char *VAR_2 = \"list value\";", "TestStructList *p, *head = NULL;", "const int VAR_3 = 10;", "bool value_bool = true;", "int VAR_4 = 10;", "Error *err = NULL;", "QListEntry *entry;", "QObject *obj;", "QList *qlist;",...
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10,208
static uint64_t qemu_opt_get_size_helper(QemuOpts *opts, const char *name, uint64_t defval, bool del) { QemuOpt *opt = qemu_opt_find(opts, name); uint64_t ret = defval; if (opt == NULL) { const QemuOptDesc *desc = find_desc_by_name(opts->list->desc, n...
false
qemu
435db4cf29b88b6612e30acda01cd18788dff458
static uint64_t qemu_opt_get_size_helper(QemuOpts *opts, const char *name, uint64_t defval, bool del) { QemuOpt *opt = qemu_opt_find(opts, name); uint64_t ret = defval; if (opt == NULL) { const QemuOptDesc *desc = find_desc_by_name(opts->list->desc, n...
{ "code": [], "line_no": [] }
static uint64_t FUNC_0(QemuOpts *opts, const char *name, uint64_t defval, bool del) { QemuOpt *opt = qemu_opt_find(opts, name); uint64_t ret = defval; if (opt == NULL) { const QemuOptDesc *VAR_0 = find_desc_by_name(opts->list->VAR_0, name); i...
[ "static uint64_t FUNC_0(QemuOpts *opts, const char *name,\nuint64_t defval, bool del)\n{", "QemuOpt *opt = qemu_opt_find(opts, name);", "uint64_t ret = defval;", "if (opt == NULL) {", "const QemuOptDesc *VAR_0 = find_desc_by_name(opts->list->VAR_0, name);", "if (VAR_0 && VAR_0->def_value_str) {", "parse...
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10,209
static int foreach_device_config(int type, int (*func)(const char *cmdline)) { struct device_config *conf; int rc; TAILQ_FOREACH(conf, &device_configs, next) { if (conf->type != type) continue; rc = func(conf->cmdline); if (0 != rc) return rc; ...
false
qemu
72cf2d4f0e181d0d3a3122e04129c58a95da713e
static int foreach_device_config(int type, int (*func)(const char *cmdline)) { struct device_config *conf; int rc; TAILQ_FOREACH(conf, &device_configs, next) { if (conf->type != type) continue; rc = func(conf->cmdline); if (0 != rc) return rc; ...
{ "code": [], "line_no": [] }
static int FUNC_0(int VAR_0, int (*VAR_1)(const char *VAR_2)) { struct device_config *VAR_3; int VAR_4; TAILQ_FOREACH(VAR_3, &device_configs, next) { if (VAR_3->VAR_0 != VAR_0) continue; VAR_4 = VAR_1(VAR_3->VAR_2); if (0 != VAR_4) return VAR_4; ...
[ "static int FUNC_0(int VAR_0, int (*VAR_1)(const char *VAR_2))\n{", "struct device_config *VAR_3;", "int VAR_4;", "TAILQ_FOREACH(VAR_3, &device_configs, next) {", "if (VAR_3->VAR_0 != VAR_0)\ncontinue;", "VAR_4 = VAR_1(VAR_3->VAR_2);", "if (0 != VAR_4)\nreturn VAR_4;", "}", "return 0;", "}" ]
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10,210
static BlockDriverState *bdrv_append_temp_snapshot(BlockDriverState *bs, int flags, QDict *snapshot_options, Error **errp) { /* TODO: extra byte is a hack to ...
false
qemu
ff6ed7141d87d26eafa2b8e4df969623e40fac49
static BlockDriverState *bdrv_append_temp_snapshot(BlockDriverState *bs, int flags, QDict *snapshot_options, Error **errp) { char *tmp_filename = g_mall...
{ "code": [], "line_no": [] }
static BlockDriverState *FUNC_0(BlockDriverState *bs, int flags, QDict *snapshot_options, Error **errp) { char *VAR_0 = g_malloc0(PATH_MAX + 1); in...
[ "static BlockDriverState *FUNC_0(BlockDriverState *bs,\nint flags,\nQDict *snapshot_options,\nError **errp)\n{", "char *VAR_0 = g_malloc0(PATH_MAX + 1);", "int64_t total_size;", "QemuOpts *opts = NULL;", "BlockDriverState *bs_snapshot;", "Error *local_err = NULL;", "int VAR_1;", "total_size = bdrv_get...
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10,211
int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value) { int res; res = bdrv_attach(value, dev); if (res < 0) { error_report("Can't attach drive %s to %s.%s: %s", bdrv_get_device_name(value), dev->id ? dev->id : dev->in...
false
qemu
fa879d62eb51253d00b6920ce1d1d9d261370a49
int qdev_prop_set_drive(DeviceState *dev, const char *name, BlockDriverState *value) { int res; res = bdrv_attach(value, dev); if (res < 0) { error_report("Can't attach drive %s to %s.%s: %s", bdrv_get_device_name(value), dev->id ? dev->id : dev->in...
{ "code": [], "line_no": [] }
int FUNC_0(DeviceState *VAR_0, const char *VAR_1, BlockDriverState *VAR_2) { int VAR_3; VAR_3 = bdrv_attach(VAR_2, VAR_0); if (VAR_3 < 0) { error_report("Can't attach drive %s to %s.%s: %s", bdrv_get_device_name(VAR_2), VAR_0->id ? VAR_0->id : VAR_0...
[ "int FUNC_0(DeviceState *VAR_0, const char *VAR_1, BlockDriverState *VAR_2)\n{", "int VAR_3;", "VAR_3 = bdrv_attach(VAR_2, VAR_0);", "if (VAR_3 < 0) {", "error_report(\"Can't attach drive %s to %s.%s: %s\",\nbdrv_get_device_name(VAR_2),\nVAR_0->id ? VAR_0->id : VAR_0->info->VAR_1,\nVAR_1, strerror(-VAR_3));...
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10,214
static inline int cris_lz(int x) { int r; asm ("lz\t%1, %0\n" : "=r" (r) : "r" (x)); return r; }
true
qemu
21ce148c7ec71ee32834061355a5ecfd1a11f90f
static inline int cris_lz(int x) { int r; asm ("lz\t%1, %0\n" : "=r" (r) : "r" (x)); return r; }
{ "code": [ "static inline int cris_lz(int x)" ], "line_no": [ 1 ] }
static inline int FUNC_0(int VAR_0) { int VAR_1; asm ("lz\t%1, %0\n" : "=VAR_1" (VAR_1) : "VAR_1" (VAR_0)); return VAR_1; }
[ "static inline int FUNC_0(int VAR_0)\n{", "int VAR_1;", "asm (\"lz\\t%1, %0\\n\" : \"=VAR_1\" (VAR_1) : \"VAR_1\" (VAR_0));", "return VAR_1;", "}" ]
[ 1, 0, 0, 0, 0 ]
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10,216
static void amdvi_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); X86IOMMUClass *dc_class = X86_IOMMU_CLASS(klass); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; dc->hotpluggable = false; dc_class->realize = amdvi_realize; }
true
qemu
e4f4fb1eca795e36f363b4647724221e774523c1
static void amdvi_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); X86IOMMUClass *dc_class = X86_IOMMU_CLASS(klass); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; dc->hotpluggable = false; dc_class->realize = amdvi_realize; }
{ "code": [], "line_no": [] }
static void FUNC_0(ObjectClass *VAR_0, void* VAR_1) { DeviceClass *dc = DEVICE_CLASS(VAR_0); X86IOMMUClass *dc_class = X86_IOMMU_CLASS(VAR_0); dc->reset = amdvi_reset; dc->vmsd = &vmstate_amdvi; dc->hotpluggable = false; dc_class->realize = amdvi_realize; }
[ "static void FUNC_0(ObjectClass *VAR_0, void* VAR_1)\n{", "DeviceClass *dc = DEVICE_CLASS(VAR_0);", "X86IOMMUClass *dc_class = X86_IOMMU_CLASS(VAR_0);", "dc->reset = amdvi_reset;", "dc->vmsd = &vmstate_amdvi;", "dc->hotpluggable = false;", "dc_class->realize = amdvi_realize;", "}" ]
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10,217
static void pci_ehci_config(void) { /* hands over all ports from companion uhci to ehci */ qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1); }
true
qemu
b4ba67d9a702507793c2724e56f98e9b0f7be02b
static void pci_ehci_config(void) { qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1); }
{ "code": [ " qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1);" ], "line_no": [ 7 ] }
static void FUNC_0(void) { qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1); }
[ "static void FUNC_0(void)\n{", "qpci_io_writew(ehci1.dev, ehci1.base + 0x60, 1);", "}" ]
[ 0, 1, 0 ]
[ [ 1, 3 ], [ 7 ], [ 9 ] ]
10,218
static int v9fs_synth_renameat(FsContext *ctx, V9fsPath *olddir, const char *old_name, V9fsPath *newdir, const char *new_name) { errno = EPERM; return -1; }
false
qemu
364031f17932814484657e5551ba12957d993d7e
static int v9fs_synth_renameat(FsContext *ctx, V9fsPath *olddir, const char *old_name, V9fsPath *newdir, const char *new_name) { errno = EPERM; return -1; }
{ "code": [], "line_no": [] }
static int FUNC_0(FsContext *VAR_0, V9fsPath *VAR_1, const char *VAR_2, V9fsPath *VAR_3, const char *VAR_4) { errno = EPERM; return -1; }
[ "static int FUNC_0(FsContext *VAR_0, V9fsPath *VAR_1,\nconst char *VAR_2, V9fsPath *VAR_3,\nconst char *VAR_4)\n{", "errno = EPERM;", "return -1;", "}" ]
[ 0, 0, 0, 0 ]
[ [ 1, 3, 5, 7 ], [ 9 ], [ 11 ], [ 13 ] ]
10,219
static int vmdk_write_cid(BlockDriverState *bs, uint32_t cid) { char desc[DESC_SIZE], tmp_desc[DESC_SIZE]; char *p_name, *tmp_str; BDRVVmdkState *s = bs->opaque; memset(desc, 0, sizeof(desc)); if (bdrv_pread(bs->file, s->desc_offset, desc, DESC_SIZE) != DESC_SIZE) { return -EIO; ...
false
qemu
ae261c86aaed62e7acddafab8262a2bf286d40b7
static int vmdk_write_cid(BlockDriverState *bs, uint32_t cid) { char desc[DESC_SIZE], tmp_desc[DESC_SIZE]; char *p_name, *tmp_str; BDRVVmdkState *s = bs->opaque; memset(desc, 0, sizeof(desc)); if (bdrv_pread(bs->file, s->desc_offset, desc, DESC_SIZE) != DESC_SIZE) { return -EIO; ...
{ "code": [], "line_no": [] }
static int FUNC_0(BlockDriverState *VAR_0, uint32_t VAR_1) { char VAR_2[DESC_SIZE], tmp_desc[DESC_SIZE]; char *VAR_3, *VAR_4; BDRVVmdkState *s = VAR_0->opaque; memset(VAR_2, 0, sizeof(VAR_2)); if (bdrv_pread(VAR_0->file, s->desc_offset, VAR_2, DESC_SIZE) != DESC_SIZE) { return -EIO;...
[ "static int FUNC_0(BlockDriverState *VAR_0, uint32_t VAR_1)\n{", "char VAR_2[DESC_SIZE], tmp_desc[DESC_SIZE];", "char *VAR_3, *VAR_4;", "BDRVVmdkState *s = VAR_0->opaque;", "memset(VAR_2, 0, sizeof(VAR_2));", "if (bdrv_pread(VAR_0->file, s->desc_offset, VAR_2, DESC_SIZE) != DESC_SIZE) {", "return -EIO;"...
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10,220
static void qemu_signal_lock(unsigned int msecs) { qemu_mutex_lock(&qemu_fair_mutex); while (qemu_mutex_trylock(&qemu_global_mutex)) { qemu_thread_signal(tcg_cpu_thread, SIGUSR1); if (!qemu_mutex_timedlock(&qemu_global_mutex, msecs)) break; } qemu_mutex_unlock(&qemu...
false
qemu
cc84de9570ffe01a9c3c169bd62ab9586a9a080c
static void qemu_signal_lock(unsigned int msecs) { qemu_mutex_lock(&qemu_fair_mutex); while (qemu_mutex_trylock(&qemu_global_mutex)) { qemu_thread_signal(tcg_cpu_thread, SIGUSR1); if (!qemu_mutex_timedlock(&qemu_global_mutex, msecs)) break; } qemu_mutex_unlock(&qemu...
{ "code": [], "line_no": [] }
static void FUNC_0(unsigned int VAR_0) { qemu_mutex_lock(&qemu_fair_mutex); while (qemu_mutex_trylock(&qemu_global_mutex)) { qemu_thread_signal(tcg_cpu_thread, SIGUSR1); if (!qemu_mutex_timedlock(&qemu_global_mutex, VAR_0)) break; } qemu_mutex_unlock(&qemu_fair_mute...
[ "static void FUNC_0(unsigned int VAR_0)\n{", "qemu_mutex_lock(&qemu_fair_mutex);", "while (qemu_mutex_trylock(&qemu_global_mutex)) {", "qemu_thread_signal(tcg_cpu_thread, SIGUSR1);", "if (!qemu_mutex_timedlock(&qemu_global_mutex, VAR_0))\nbreak;", "}", "qemu_mutex_unlock(&qemu_fair_mutex);", "}" ]
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10,223
static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt, int u, int sel, int h) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); TCGv t0 = tcg_temp_local_new(); gen_load_gpr(t0, rt); if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && ...
false
qemu
7f6613cedc59fa849105668ae971dc31004bca1c
static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt, int u, int sel, int h) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); TCGv t0 = tcg_temp_local_new(); gen_load_gpr(t0, rt); if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 && ...
{ "code": [], "line_no": [] }
static void FUNC_0(CPUMIPSState *VAR_0, DisasContext *VAR_1, int VAR_2, int VAR_3, int VAR_4, int VAR_5, int VAR_6) { int VAR_7 = VAR_0->CP0_VPEControl & (0xff << CP0VPECo_TargTC); TCGv t0 = tcg_temp_local_new(); gen_load_gpr(t0, VAR_3); if ((VAR_0->CP0_VPEConf0 & (1 << CP0V...
[ "static void FUNC_0(CPUMIPSState *VAR_0, DisasContext *VAR_1, int VAR_2, int VAR_3,\nint VAR_4, int VAR_5, int VAR_6)\n{", "int VAR_7 = VAR_0->CP0_VPEControl & (0xff << CP0VPECo_TargTC);", "TCGv t0 = tcg_temp_local_new();", "gen_load_gpr(t0, VAR_3);", "if ((VAR_0->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&...
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10,224
int net_init_slirp(const NetClientOptions *opts, const char *name, NetClientState *peer, Error **errp) { /* FIXME error_setg(errp, ...) on failure */ struct slirp_config_str *config; char *vnet; int ret; const NetdevUserOptions *user; const char **dnssearch; ass...
false
qemu
8d0bcba8370a4e8606dee602393a14d0c48e8bfc
int net_init_slirp(const NetClientOptions *opts, const char *name, NetClientState *peer, Error **errp) { struct slirp_config_str *config; char *vnet; int ret; const NetdevUserOptions *user; const char **dnssearch; assert(opts->kind == NET_CLIENT_OPTIONS_KIND_US...
{ "code": [], "line_no": [] }
int FUNC_0(const NetClientOptions *VAR_0, const char *VAR_1, NetClientState *VAR_2, Error **VAR_3) { struct slirp_config_str *VAR_4; char *VAR_5; int VAR_6; const NetdevUserOptions *VAR_7; const char **VAR_8; assert(VAR_0->kind == NET_CLIENT_OPTIONS_KIND_USER);...
[ "int FUNC_0(const NetClientOptions *VAR_0, const char *VAR_1,\nNetClientState *VAR_2, Error **VAR_3)\n{", "struct slirp_config_str *VAR_4;", "char *VAR_5;", "int VAR_6;", "const NetdevUserOptions *VAR_7;", "const char **VAR_8;", "assert(VAR_0->kind == NET_CLIENT_OPTIONS_KIND_USER);", "VAR_7 = VAR_0->V...
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[ [ 1, 3, 5 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 27, 29, 31 ], [ 35 ], [ 43 ], [ 45 ], [ 49, 51, 53, 55 ], [ 59 ], [ 61 ], [ 63 ], [ 65...
10,225
void bdrv_detach(BlockDriverState *bs, DeviceState *qdev) { assert(bs->peer == qdev); bs->peer = NULL; bs->change_cb = NULL; bs->change_opaque = NULL; }
false
qemu
fa879d62eb51253d00b6920ce1d1d9d261370a49
void bdrv_detach(BlockDriverState *bs, DeviceState *qdev) { assert(bs->peer == qdev); bs->peer = NULL; bs->change_cb = NULL; bs->change_opaque = NULL; }
{ "code": [], "line_no": [] }
void FUNC_0(BlockDriverState *VAR_0, DeviceState *VAR_1) { assert(VAR_0->peer == VAR_1); VAR_0->peer = NULL; VAR_0->change_cb = NULL; VAR_0->change_opaque = NULL; }
[ "void FUNC_0(BlockDriverState *VAR_0, DeviceState *VAR_1)\n{", "assert(VAR_0->peer == VAR_1);", "VAR_0->peer = NULL;", "VAR_0->change_cb = NULL;", "VAR_0->change_opaque = NULL;", "}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ] ]
10,226
static void vmsa_ttbcr_reset(CPUARMState *env, const ARMCPRegInfo *ri) { env->cp15.c2_base_mask = 0xffffc000u; env->cp15.c2_control = 0; env->cp15.c2_mask = 0; }
false
qemu
8d5c773e323b22402abdd0beef4c7d2fc91dd0eb
static void vmsa_ttbcr_reset(CPUARMState *env, const ARMCPRegInfo *ri) { env->cp15.c2_base_mask = 0xffffc000u; env->cp15.c2_control = 0; env->cp15.c2_mask = 0; }
{ "code": [], "line_no": [] }
static void FUNC_0(CPUARMState *VAR_0, const ARMCPRegInfo *VAR_1) { VAR_0->cp15.c2_base_mask = 0xffffc000u; VAR_0->cp15.c2_control = 0; VAR_0->cp15.c2_mask = 0; }
[ "static void FUNC_0(CPUARMState *VAR_0, const ARMCPRegInfo *VAR_1)\n{", "VAR_0->cp15.c2_base_mask = 0xffffc000u;", "VAR_0->cp15.c2_control = 0;", "VAR_0->cp15.c2_mask = 0;", "}" ]
[ 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ] ]
10,227
static inline void helper_ret_protected(int shift, int is_iret, int addend) { uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; uint32_t e1, e2, ss_e1, ss_e2; int cpl, dpl, rpl, eflags_mask; uint8_t *ssp; sp = ESP; if (!(env->se...
false
qemu
7e84c2498f0ff3999937d18d1e9abaa030400000
static inline void helper_ret_protected(int shift, int is_iret, int addend) { uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; uint32_t e1, e2, ss_e1, ss_e2; int cpl, dpl, rpl, eflags_mask; uint8_t *ssp; sp = ESP; if (!(env->se...
{ "code": [], "line_no": [] }
static inline void FUNC_0(int VAR_0, int VAR_1, int VAR_2) { uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss; uint32_t new_es, new_ds, new_fs, new_gs; uint32_t e1, e2, ss_e1, ss_e2; int VAR_3, VAR_4, VAR_5, VAR_6; uint8_t *ssp; sp = ESP; if (!(env->segs[R_SS].flags & ...
[ "static inline void FUNC_0(int VAR_0, int VAR_1, int VAR_2)\n{", "uint32_t sp, new_cs, new_eip, new_eflags, new_esp, new_ss;", "uint32_t new_es, new_ds, new_fs, new_gs;", "uint32_t e1, e2, ss_e1, ss_e2;", "int VAR_3, VAR_4, VAR_5, VAR_6;", "uint8_t *ssp;", "sp = ESP;", "if (!(env->segs[R_SS].flags & D...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19, 21 ], [ 23 ], [ 25 ], [ 29, 31 ], [ 33 ], [ 35 ], [ 37, 39 ], [ 41 ], [ 45, 47 ], [ 49 ], [ 51 ...
10,228
static int vnc_refresh_lossy_rect(VncDisplay *vd, int x, int y) { VncState *vs; int sty = y / VNC_STAT_RECT; int stx = x / VNC_STAT_RECT; int has_dirty = 0; y = y / VNC_STAT_RECT * VNC_STAT_RECT; x = x / VNC_STAT_RECT * VNC_STAT_RECT; QTAILQ_FOREACH(vs, &vd->clients, next) { ...
false
qemu
207f328afc2137d422f59293ba37b8be5d3e1617
static int vnc_refresh_lossy_rect(VncDisplay *vd, int x, int y) { VncState *vs; int sty = y / VNC_STAT_RECT; int stx = x / VNC_STAT_RECT; int has_dirty = 0; y = y / VNC_STAT_RECT * VNC_STAT_RECT; x = x / VNC_STAT_RECT * VNC_STAT_RECT; QTAILQ_FOREACH(vs, &vd->clients, next) { ...
{ "code": [], "line_no": [] }
static int FUNC_0(VncDisplay *VAR_0, int VAR_1, int VAR_2) { VncState *vs; int VAR_3 = VAR_2 / VNC_STAT_RECT; int VAR_4 = VAR_1 / VNC_STAT_RECT; int VAR_5 = 0; VAR_2 = VAR_2 / VNC_STAT_RECT * VNC_STAT_RECT; VAR_1 = VAR_1 / VNC_STAT_RECT * VNC_STAT_RECT; QTAILQ_FOREACH(vs, &VAR_0-...
[ "static int FUNC_0(VncDisplay *VAR_0, int VAR_1, int VAR_2)\n{", "VncState *vs;", "int VAR_3 = VAR_2 / VNC_STAT_RECT;", "int VAR_4 = VAR_1 / VNC_STAT_RECT;", "int VAR_5 = 0;", "VAR_2 = VAR_2 / VNC_STAT_RECT * VNC_STAT_RECT;", "VAR_1 = VAR_1 / VNC_STAT_RECT * VNC_STAT_RECT;", "QTAILQ_FOREACH(vs, &VAR_0...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 29 ], [ 31 ], [ 33 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ], [ 51 ...
10,229
void cpu_exec_step_atomic(CPUState *cpu) { start_exclusive(); /* Since we got here, we know that parallel_cpus must be true. */ parallel_cpus = false; cpu_exec_step(cpu); parallel_cpus = true; end_exclusive(); }
false
qemu
ac03ee5331612e44beb393df2b578c951d27dc0d
void cpu_exec_step_atomic(CPUState *cpu) { start_exclusive(); parallel_cpus = false; cpu_exec_step(cpu); parallel_cpus = true; end_exclusive(); }
{ "code": [], "line_no": [] }
void FUNC_0(CPUState *VAR_0) { start_exclusive(); parallel_cpus = false; cpu_exec_step(VAR_0); parallel_cpus = true; end_exclusive(); }
[ "void FUNC_0(CPUState *VAR_0)\n{", "start_exclusive();", "parallel_cpus = false;", "cpu_exec_step(VAR_0);", "parallel_cpus = true;", "end_exclusive();", "}" ]
[ 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 11 ], [ 13 ], [ 15 ], [ 19 ], [ 21 ] ]
10,230
void acpi_build(AcpiBuildTables *tables) { PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiCpuInfo cpu; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; ...
false
qemu
5fe79386ba3cdc86fd808dde301bfc5bb7e9bded
void acpi_build(AcpiBuildTables *tables) { PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); GArray *table_offsets; unsigned facs, dsdt, rsdt, fadt; AcpiCpuInfo cpu; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; ...
{ "code": [], "line_no": [] }
void FUNC_0(AcpiBuildTables *VAR_0) { PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); GArray *table_offsets; unsigned VAR_1, VAR_2, VAR_3, VAR_4; AcpiCpuInfo cpu; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; ...
[ "void FUNC_0(AcpiBuildTables *VAR_0)\n{", "PCMachineState *pcms = PC_MACHINE(qdev_get_machine());", "PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);", "GArray *table_offsets;", "unsigned VAR_1, VAR_2, VAR_3, VAR_4;", "AcpiCpuInfo cpu;", "AcpiPmInfo pm;", "AcpiMiscInfo misc;", "AcpiMcfgInfo mcfg;"...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 45,...
10,231
static void qnull_destroy_obj(QObject *obj) { assert(0); }
false
qemu
55e1819c509b3d9c10a54678b9c585bbda13889e
static void qnull_destroy_obj(QObject *obj) { assert(0); }
{ "code": [], "line_no": [] }
static void FUNC_0(QObject *VAR_0) { assert(0); }
[ "static void FUNC_0(QObject *VAR_0)\n{", "assert(0);", "}" ]
[ 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ] ]
10,234
void hmp_info_snapshots(Monitor *mon, const QDict *qdict) { BlockDriverState *bs, *bs1; QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s; int nb_sns, i, ret, available; int total; int *available_snapshots; bs = find_vmstate_bs(); if (!bs) { monitor_printf(mon, "No available...
false
qemu
723ccda1a0eecece8e70dbcdd35a603f6c41a475
void hmp_info_snapshots(Monitor *mon, const QDict *qdict) { BlockDriverState *bs, *bs1; QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s; int nb_sns, i, ret, available; int total; int *available_snapshots; bs = find_vmstate_bs(); if (!bs) { monitor_printf(mon, "No available...
{ "code": [], "line_no": [] }
void FUNC_0(Monitor *VAR_0, const QDict *VAR_1) { BlockDriverState *bs, *bs1; QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s; int VAR_2, VAR_3, VAR_4, VAR_5; int VAR_6; int *VAR_7; bs = find_vmstate_bs(); if (!bs) { monitor_printf(VAR_0, "No VAR_5 block device supports sn...
[ "void FUNC_0(Monitor *VAR_0, const QDict *VAR_1)\n{", "BlockDriverState *bs, *bs1;", "QEMUSnapshotInfo *sn_tab, *sn, s, *sn_info = &s;", "int VAR_2, VAR_3, VAR_4, VAR_5;", "int VAR_6;", "int *VAR_7;", "bs = find_vmstate_bs();", "if (!bs) {", "monitor_printf(VAR_0, \"No VAR_5 block device supports sn...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ...
10,235
static void set_fifodepth(MSSSpiState *s) { unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK; if (size <= 8) { s->fifo_depth = 32; } else if (size <= 16) { s->fifo_depth = 16; } else if (size <= 32) { s->fifo_depth = 8; } else { s->fifo_depth = 4; ...
false
qemu
cda607d5e0178d0268066d94dd06b89614304a7d
static void set_fifodepth(MSSSpiState *s) { unsigned int size = s->regs[R_SPI_DFSIZE] & FRAMESZ_MASK; if (size <= 8) { s->fifo_depth = 32; } else if (size <= 16) { s->fifo_depth = 16; } else if (size <= 32) { s->fifo_depth = 8; } else { s->fifo_depth = 4; ...
{ "code": [], "line_no": [] }
static void FUNC_0(MSSSpiState *VAR_0) { unsigned int VAR_1 = VAR_0->regs[R_SPI_DFSIZE] & FRAMESZ_MASK; if (VAR_1 <= 8) { VAR_0->fifo_depth = 32; } else if (VAR_1 <= 16) { VAR_0->fifo_depth = 16; } else if (VAR_1 <= 32) { VAR_0->fifo_depth = 8; } else { VA...
[ "static void FUNC_0(MSSSpiState *VAR_0)\n{", "unsigned int VAR_1 = VAR_0->regs[R_SPI_DFSIZE] & FRAMESZ_MASK;", "if (VAR_1 <= 8) {", "VAR_0->fifo_depth = 32;", "} else if (VAR_1 <= 16) {", "VAR_0->fifo_depth = 16;", "} else if (VAR_1 <= 32) {", "VAR_0->fifo_depth = 8;", "} else {", "VAR_0->fifo_dep...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ] ]
10,236
void qdev_unplug(DeviceState *dev, Error **errp) { DeviceClass *dc = DEVICE_GET_CLASS(dev); if (!dev->parent_bus->allow_hotplug) { error_set(errp, QERR_BUS_NO_HOTPLUG, dev->parent_bus->name); return; } assert(dc->unplug != NULL); qdev_hot_removed = true; if (dc->un...
false
qemu
120dc38f6113b676ecef0a2c9e42fc08cace5bdb
void qdev_unplug(DeviceState *dev, Error **errp) { DeviceClass *dc = DEVICE_GET_CLASS(dev); if (!dev->parent_bus->allow_hotplug) { error_set(errp, QERR_BUS_NO_HOTPLUG, dev->parent_bus->name); return; } assert(dc->unplug != NULL); qdev_hot_removed = true; if (dc->un...
{ "code": [], "line_no": [] }
void FUNC_0(DeviceState *VAR_0, Error **VAR_1) { DeviceClass *dc = DEVICE_GET_CLASS(VAR_0); if (!VAR_0->parent_bus->allow_hotplug) { error_set(VAR_1, QERR_BUS_NO_HOTPLUG, VAR_0->parent_bus->name); return; } assert(dc->unplug != NULL); qdev_hot_removed = true; if (d...
[ "void FUNC_0(DeviceState *VAR_0, Error **VAR_1)\n{", "DeviceClass *dc = DEVICE_GET_CLASS(VAR_0);", "if (!VAR_0->parent_bus->allow_hotplug) {", "error_set(VAR_1, QERR_BUS_NO_HOTPLUG, VAR_0->parent_bus->name);", "return;", "}", "assert(dc->unplug != NULL);", "qdev_hot_removed = true;", "if (dc->unplug...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ] ]
10,237
int rom_add_file(const char *file, const char *fw_dir, const char *fw_file, target_phys_addr_t addr) { Rom *rom; int rc, fd = -1; rom = qemu_mallocz(sizeof(*rom)); rom->name = qemu_strdup(file); rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name); if (rom->path ...
false
qemu
bdb5ee3064d5ae786b0bcb6cf6ff4e3554a72990
int rom_add_file(const char *file, const char *fw_dir, const char *fw_file, target_phys_addr_t addr) { Rom *rom; int rc, fd = -1; rom = qemu_mallocz(sizeof(*rom)); rom->name = qemu_strdup(file); rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name); if (rom->path ...
{ "code": [], "line_no": [] }
int FUNC_0(const char *VAR_0, const char *VAR_1, const char *VAR_2, target_phys_addr_t VAR_3) { Rom *rom; int VAR_4, VAR_5 = -1; rom = qemu_mallocz(sizeof(*rom)); rom->name = qemu_strdup(VAR_0); rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name); if (rom->path ...
[ "int FUNC_0(const char *VAR_0, const char *VAR_1, const char *VAR_2,\ntarget_phys_addr_t VAR_3)\n{", "Rom *rom;", "int VAR_4, VAR_5 = -1;", "rom = qemu_mallocz(sizeof(*rom));", "rom->name = qemu_strdup(VAR_0);", "rom->path = qemu_find_file(QEMU_FILE_TYPE_BIOS, rom->name);", "if (rom->path == NULL) {", ...
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[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 27 ], [ 29 ], [ 31, 33 ], [ 35 ], [ 37 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ...
10,238
static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) { IDEState *ide_if = opaque; IDEState *s; int unit, n; int lba48 = 0; #ifdef DEBUG_IDE printf("IDE: write addr=0x%x val=0x%02x\n", addr, val); #endif addr &= 7; /* ignore writes to command block while bus...
false
qemu
33256a25b3b31915b9038eefe7923c68bb034118
static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) { IDEState *ide_if = opaque; IDEState *s; int unit, n; int lba48 = 0; #ifdef DEBUG_IDE printf("IDE: write addr=0x%x val=0x%02x\n", addr, val); #endif addr &= 7; if (addr != 7 && (ide_if->cur_drive->...
{ "code": [], "line_no": [] }
static void FUNC_0(void *VAR_0, uint32_t VAR_1, uint32_t VAR_2) { IDEState *ide_if = VAR_0; IDEState *s; int VAR_3, VAR_4; int VAR_5 = 0; #ifdef DEBUG_IDE printf("IDE: write VAR_1=0x%x VAR_2=0x%02x\VAR_4", VAR_1, VAR_2); #endif VAR_1 &= 7; if (VAR_1 != 7 && (ide_if->cur...
[ "static void FUNC_0(void *VAR_0, uint32_t VAR_1, uint32_t VAR_2)\n{", "IDEState *ide_if = VAR_0;", "IDEState *s;", "int VAR_3, VAR_4;", "int VAR_5 = 0;", "#ifdef DEBUG_IDE\nprintf(\"IDE: write VAR_1=0x%x VAR_2=0x%02x\\VAR_4\", VAR_1, VAR_2);", "#endif\nVAR_1 &= 7;", "if (VAR_1 != 7 && (ide_if->cur_dri...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15, 17 ], [ 19, 23 ], [ 29, 31 ], [ 35 ], [ 37, 39 ], [ 41, 43 ], [ 47 ], [ 49 ], [ 51 ], [ 53 ], [ 55 ], [ 57, 59 ...
10,241
_syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode) #endif #if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat) _syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode) #endif #if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16) _syscall5(int,sys_f...
false
qemu
ebc996f3b13004e7272c462254522ba0102f09fe
_syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode) #endif #if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat) _syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode) #endif #if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16) _syscall5(int,sys_f...
{ "code": [], "line_no": [] }
_syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode) #endif #if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat) _syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode) #endif #if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16) _syscall5(int,sys_f...
[ "_syscall3(int,sys_faccessat,int,dirfd,const char *,pathname,int,mode)\n#endif\n#if defined(TARGET_NR_fchmodat) && defined(__NR_fchmodat)\n_syscall3(int,sys_fchmodat,int,dirfd,const char *,pathname, mode_t,mode)\n#endif\n#if defined(TARGET_NR_fchownat) && defined(__NR_fchownat) && defined(USE_UID16)\n_syscall5(int,...
[ 0, 0, 0 ]
[ [ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79,...
10,242
static SocketAddress *sd_socket_address(const char *path, const char *host, const char *port) { SocketAddress *addr = g_new0(SocketAddress, 1); if (path) { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); ...
false
qemu
dfd100f242370886bb6732f70f1f7cbd8eb9fedc
static SocketAddress *sd_socket_address(const char *path, const char *host, const char *port) { SocketAddress *addr = g_new0(SocketAddress, 1); if (path) { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); ...
{ "code": [], "line_no": [] }
static SocketAddress *FUNC_0(const char *path, const char *host, const char *port) { SocketAddress *addr = g_new0(SocketAddress, 1); if (path) { addr->type = SOCKET_ADDRESS_KIND_UNIX; addr->u.q_unix.data = g_new0(UnixSocketAddress, 1); add...
[ "static SocketAddress *FUNC_0(const char *path,\nconst char *host, const char *port)\n{", "SocketAddress *addr = g_new0(SocketAddress, 1);", "if (path) {", "addr->type = SOCKET_ADDRESS_KIND_UNIX;", "addr->u.q_unix.data = g_new0(UnixSocketAddress, 1);", "addr->u.q_unix.data->path = g_strdup(path);", "} e...
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[ [ 1, 3, 5 ], [ 7 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 33 ], [ 35 ] ]
10,243
static void configure_alarms(char const *opt) { int i; int cur = 0; int count = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1; char *arg; char *name; if (!strcmp(opt, "help")) { show_available_alarms(); exit(0); } arg = strdup(opt); /* Reorder t...
false
qemu
e2b577e5e548b58740ed5b1d9d12015cb7b233ff
static void configure_alarms(char const *opt) { int i; int cur = 0; int count = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1; char *arg; char *name; if (!strcmp(opt, "help")) { show_available_alarms(); exit(0); } arg = strdup(opt); name =...
{ "code": [], "line_no": [] }
static void FUNC_0(char const *VAR_0) { int VAR_1; int VAR_2 = 0; int VAR_3 = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1; char *VAR_4; char *VAR_5; if (!strcmp(VAR_0, "help")) { show_available_alarms(); exit(0); } VAR_4 = strdup(VAR_0); ...
[ "static void FUNC_0(char const *VAR_0)\n{", "int VAR_1;", "int VAR_2 = 0;", "int VAR_3 = (sizeof(alarm_timers) / sizeof(*alarm_timers)) - 1;", "char *VAR_4;", "char *VAR_5;", "if (!strcmp(VAR_0, \"help\")) {", "show_available_alarms();", "exit(0);", "}", "VAR_4 = strdup(VAR_0);", "VAR_5 = strt...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 27 ], [ 33 ], [ 35 ], [ 37 ], [ 41 ], [ 43, 45 ], [ 47 ], [ 51 ], [ 53 ], [...
10,245
static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nre...
false
qemu
9c5ce8db2e5c2769ed2fd3d91928dd1853b5ce7c
static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, sPAPRMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nre...
{ "code": [], "line_no": [] }
static void FUNC_0(PowerPCCPU *VAR_0, sPAPRMachineState *VAR_1, uint32_t VAR_2, uint32_t VAR_3, target_ulong VAR_4, uint32_t VAR_5, target_ulong VAR...
[ "static void FUNC_0(PowerPCCPU *VAR_0,\nsPAPRMachineState *VAR_1,\nuint32_t VAR_2, uint32_t VAR_3,\ntarget_ulong VAR_4,\nuint32_t VAR_5, target_ulong VAR_6)\n{", "target_ulong parameter = rtas_ld(VAR_4, 0);", "target_ulong buffer = rtas_ld(VAR_4, 1);", "target_ulong length = rtas_ld(VAR_4, 2);", "target_ulo...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5, 7, 9, 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 23 ], [ 25 ], [ 27, 29, 31, 33, 35, 37, 39, 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ], [ 51 ], [ 53 ], [...
10,246
static void test_qemu_strtoull_trailing(void) { const char *str = "123xxx"; char f = 'X'; const char *endptr = &f; uint64_t res = 999; int err; err = qemu_strtoull(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 123); g_assert(endptr == str...
false
qemu
bc7c08a2c375acb7ae4d433054415588b176d34c
static void test_qemu_strtoull_trailing(void) { const char *str = "123xxx"; char f = 'X'; const char *endptr = &f; uint64_t res = 999; int err; err = qemu_strtoull(str, &endptr, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, 123); g_assert(endptr == str...
{ "code": [], "line_no": [] }
static void FUNC_0(void) { const char *VAR_0 = "123xxx"; char VAR_1 = 'X'; const char *VAR_2 = &VAR_1; uint64_t res = 999; int VAR_3; VAR_3 = qemu_strtoull(VAR_0, &VAR_2, 0, &res); g_assert_cmpint(VAR_3, ==, 0); g_assert_cmpint(res, ==, 123); g_assert(VAR_2 == VAR_0 + 3...
[ "static void FUNC_0(void)\n{", "const char *VAR_0 = \"123xxx\";", "char VAR_1 = 'X';", "const char *VAR_2 = &VAR_1;", "uint64_t res = 999;", "int VAR_3;", "VAR_3 = qemu_strtoull(VAR_0, &VAR_2, 0, &res);", "g_assert_cmpint(VAR_3, ==, 0);", "g_assert_cmpint(res, ==, 123);", "g_assert(VAR_2 == VAR_0 ...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ] ]
10,247
void bdrv_set_dirty_bitmap(BdrvDirtyBitmap *bitmap, int64_t cur_sector, int64_t nr_sectors) { assert(bdrv_dirty_bitmap_enabled(bitmap)); hbitmap_set(bitmap->bitmap, cur_sector, nr_sectors); }
false
qemu
b64bd51efa9bbf30df1b2f91477d2805678d0b93
void bdrv_set_dirty_bitmap(BdrvDirtyBitmap *bitmap, int64_t cur_sector, int64_t nr_sectors) { assert(bdrv_dirty_bitmap_enabled(bitmap)); hbitmap_set(bitmap->bitmap, cur_sector, nr_sectors); }
{ "code": [], "line_no": [] }
void FUNC_0(BdrvDirtyBitmap *VAR_0, int64_t VAR_1, int64_t VAR_2) { assert(bdrv_dirty_bitmap_enabled(VAR_0)); hbitmap_set(VAR_0->VAR_0, VAR_1, VAR_2); }
[ "void FUNC_0(BdrvDirtyBitmap *VAR_0,\nint64_t VAR_1, int64_t VAR_2)\n{", "assert(bdrv_dirty_bitmap_enabled(VAR_0));", "hbitmap_set(VAR_0->VAR_0, VAR_1, VAR_2);", "}" ]
[ 0, 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ] ]
10,248
int kvm_has_xsave(void) { return kvm_state->xsave; }
false
qemu
28143b409f698210d85165ca518235ac7e7c5ac5
int kvm_has_xsave(void) { return kvm_state->xsave; }
{ "code": [], "line_no": [] }
int FUNC_0(void) { return kvm_state->xsave; }
[ "int FUNC_0(void)\n{", "return kvm_state->xsave;", "}" ]
[ 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ] ]
10,249
static BlockDriverAIOCB *curl_aio_readv(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { CURLAIOCB *acb; acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque); acb->qiov = qiov; acb->sector_num = sector...
false
qemu
63f0f45f2e89b60ff8245fec81328ddfde42a303
static BlockDriverAIOCB *curl_aio_readv(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { CURLAIOCB *acb; acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque); acb->qiov = qiov; acb->sector_num = sector...
{ "code": [], "line_no": [] }
static BlockDriverAIOCB *FUNC_0(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque) { CURLAIOCB *acb; acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque); acb->qiov = qiov; acb->sector_num = sector_num; ...
[ "static BlockDriverAIOCB *FUNC_0(BlockDriverState *bs,\nint64_t sector_num, QEMUIOVector *qiov, int nb_sectors,\nBlockDriverCompletionFunc *cb, void *opaque)\n{", "CURLAIOCB *acb;", "acb = qemu_aio_get(&curl_aiocb_info, bs, cb, opaque);", "acb->qiov = qiov;", "acb->sector_num = sector_num;", "acb->nb_sect...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5, 7 ], [ 9 ], [ 13 ], [ 17 ], [ 19 ], [ 21 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ] ]
10,250
static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, target_ulong *pages, bool is_write) { bool lowprot = is_write && lowprot_enabled(&cpu->env); uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for...
false
qemu
2bcf018340cbf233f7145e643fc1bb367f23fd90
static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, target_ulong *pages, bool is_write) { bool lowprot = is_write && lowprot_enabled(&cpu->env); uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for...
{ "code": [], "line_no": [] }
static int FUNC_0(S390CPU *VAR_0, vaddr VAR_1, int VAR_2, target_ulong *VAR_3, bool VAR_4) { bool lowprot = VAR_4 && lowprot_enabled(&VAR_0->env); uint64_t asc = VAR_0->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &VAR_0->env; int VAR_5, VAR_6, VAR_7; for (VA...
[ "static int FUNC_0(S390CPU *VAR_0, vaddr VAR_1, int VAR_2,\ntarget_ulong *VAR_3, bool VAR_4)\n{", "bool lowprot = VAR_4 && lowprot_enabled(&VAR_0->env);", "uint64_t asc = VAR_0->env.psw.mask & PSW_MASK_ASC;", "CPUS390XState *env = &VAR_0->env;", "int VAR_5, VAR_6, VAR_7;", "for (VAR_6 = 0; VAR_6 < VAR_2; ...
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[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37, 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ...
10,251
static unsigned int dec_move_sr(DisasContext *dc) { DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1)); cris_cc_mask(dc, 0); tcg_gen_helper_0_2(helper_movl_reg_sreg, tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); return 2; }
false
qemu
a7812ae412311d7d47f8aa85656faadac9d64b56
static unsigned int dec_move_sr(DisasContext *dc) { DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op2, dc->op1)); cris_cc_mask(dc, 0); tcg_gen_helper_0_2(helper_movl_reg_sreg, tcg_const_tl(dc->op1), tcg_const_tl(dc->op2)); return 2; }
{ "code": [], "line_no": [] }
static unsigned int FUNC_0(DisasContext *VAR_0) { DIS(fprintf (logfile, "move $s%u, $r%u\n", VAR_0->op2, VAR_0->op1)); cris_cc_mask(VAR_0, 0); tcg_gen_helper_0_2(helper_movl_reg_sreg, tcg_const_tl(VAR_0->op1), tcg_const_tl(VAR_0->op2)); return 2; }
[ "static unsigned int FUNC_0(DisasContext *VAR_0)\n{", "DIS(fprintf (logfile, \"move $s%u, $r%u\\n\", VAR_0->op2, VAR_0->op1));", "cris_cc_mask(VAR_0, 0);", "tcg_gen_helper_0_2(helper_movl_reg_sreg,\ntcg_const_tl(VAR_0->op1), tcg_const_tl(VAR_0->op2));", "return 2;", "}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9, 11 ], [ 13 ], [ 15 ] ]
10,252
static int xen_pt_msixctrl_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { PCIDevice *d = &s->dev; uint16_t reg_field = 0; /* use I/O device register's value as initial value */ ...
false
qemu
54fd08136e4ac8b88b88b15c397010e3b0de379f
static int xen_pt_msixctrl_reg_init(XenPCIPassthroughState *s, XenPTRegInfo *reg, uint32_t real_offset, uint32_t *data) { PCIDevice *d = &s->dev; uint16_t reg_field = 0; reg_field = pci_get_word(d->config + real_offset); ...
{ "code": [], "line_no": [] }
static int FUNC_0(XenPCIPassthroughState *VAR_0, XenPTRegInfo *VAR_1, uint32_t VAR_2, uint32_t *VAR_3) { PCIDevice *d = &VAR_0->dev; uint16_t reg_field = 0; reg_field = pci_get_word(d->config + VAR_2); if (reg_field...
[ "static int FUNC_0(XenPCIPassthroughState *VAR_0,\nXenPTRegInfo *VAR_1, uint32_t VAR_2,\nuint32_t *VAR_3)\n{", "PCIDevice *d = &VAR_0->dev;", "uint16_t reg_field = 0;", "reg_field = pci_get_word(d->config + VAR_2);", "if (reg_field & PCI_MSIX_FLAGS_ENABLE) {", "XEN_PT_LOG(d, \"MSIX already enabled, disabl...
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10,254
static ssize_t v9fs_synth_readlink(FsContext *fs_ctx, V9fsPath *path, char *buf, size_t bufsz) { errno = ENOSYS; return -1; }
false
qemu
364031f17932814484657e5551ba12957d993d7e
static ssize_t v9fs_synth_readlink(FsContext *fs_ctx, V9fsPath *path, char *buf, size_t bufsz) { errno = ENOSYS; return -1; }
{ "code": [], "line_no": [] }
static ssize_t FUNC_0(FsContext *fs_ctx, V9fsPath *path, char *buf, size_t bufsz) { errno = ENOSYS; return -1; }
[ "static ssize_t FUNC_0(FsContext *fs_ctx, V9fsPath *path,\nchar *buf, size_t bufsz)\n{", "errno = ENOSYS;", "return -1;", "}" ]
[ 0, 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ] ]
10,255
static bool cmd_read_dma(IDEState *s, uint8_t cmd) { bool lba48 = (cmd == WIN_READDMA_EXT); if (!s->bs) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); ide_sector_start_dma(s, IDE_DMA_READ); return false; }
false
qemu
4be746345f13e99e468c60acbd3a355e8183e3ce
static bool cmd_read_dma(IDEState *s, uint8_t cmd) { bool lba48 = (cmd == WIN_READDMA_EXT); if (!s->bs) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); ide_sector_start_dma(s, IDE_DMA_READ); return false; }
{ "code": [], "line_no": [] }
static bool FUNC_0(IDEState *s, uint8_t cmd) { bool lba48 = (cmd == WIN_READDMA_EXT); if (!s->bs) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); ide_sector_start_dma(s, IDE_DMA_READ); return false; }
[ "static bool FUNC_0(IDEState *s, uint8_t cmd)\n{", "bool lba48 = (cmd == WIN_READDMA_EXT);", "if (!s->bs) {", "ide_abort_command(s);", "return true;", "}", "ide_cmd_lba48_transform(s, lba48);", "ide_sector_start_dma(s, IDE_DMA_READ);", "return false;", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
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10,256
static void timer_start(SpiceTimer *timer, uint32_t ms) { qemu_mod_timer(timer->timer, qemu_get_clock(rt_clock) + ms); }
false
qemu
7bd427d801e1e3293a634d3c83beadaa90ffb911
static void timer_start(SpiceTimer *timer, uint32_t ms) { qemu_mod_timer(timer->timer, qemu_get_clock(rt_clock) + ms); }
{ "code": [], "line_no": [] }
static void FUNC_0(SpiceTimer *VAR_0, uint32_t VAR_1) { qemu_mod_timer(VAR_0->VAR_0, qemu_get_clock(rt_clock) + VAR_1); }
[ "static void FUNC_0(SpiceTimer *VAR_0, uint32_t VAR_1)\n{", "qemu_mod_timer(VAR_0->VAR_0, qemu_get_clock(rt_clock) + VAR_1);", "}" ]
[ 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ] ]
10,257
static int pci_pbm_init_device(SysBusDevice *dev) { APBState *s; int pci_mem_config, pci_mem_data, apb_config, pci_ioport; s = FROM_SYSBUS(APBState, dev); /* apb_config */ apb_config = cpu_register_io_memory(apb_config_read, apb_config_write, s); ...
false
qemu
4f5e19e6c570459cd524b29b24374f03860f5149
static int pci_pbm_init_device(SysBusDevice *dev) { APBState *s; int pci_mem_config, pci_mem_data, apb_config, pci_ioport; s = FROM_SYSBUS(APBState, dev); apb_config = cpu_register_io_memory(apb_config_read, apb_config_write, s); sysbus_init_m...
{ "code": [], "line_no": [] }
static int FUNC_0(SysBusDevice *VAR_0) { APBState *s; int VAR_1, VAR_2, VAR_3, VAR_4; s = FROM_SYSBUS(APBState, VAR_0); VAR_3 = cpu_register_io_memory(apb_config_read, apb_config_write, s); sysbus_init_mmio(VAR_0, 0x40ULL, VAR_3); V...
[ "static int FUNC_0(SysBusDevice *VAR_0)\n{", "APBState *s;", "int VAR_1, VAR_2, VAR_3, VAR_4;", "s = FROM_SYSBUS(APBState, VAR_0);", "VAR_3 = cpu_register_io_memory(apb_config_read,\napb_config_write, s);", "sysbus_init_mmio(VAR_0, 0x40ULL, VAR_3);", "VAR_4 = cpu_register_io_memory(pci_apb_ioread,\npci_...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 7 ], [ 9 ], [ 13 ], [ 17, 19 ], [ 21 ], [ 25, 27 ], [ 29 ], [ 33, 35 ], [ 37 ], [ 41, 43 ], [ 45 ], [ 47 ], [ 49 ] ]
10,258
void cpu_reset (CPUMIPSState *env) { memset(env, 0, offsetof(CPUMIPSState, breakpoints)); tlb_flush(env, 1); /* Minimal init */ #if !defined(CONFIG_USER_ONLY) if (env->hflags & MIPS_HFLAG_BMASK) { /* If the exception was raised from a delay slot, * come back to the jump. */...
false
qemu
b29a0341d7ed7e7df4bf77a41db8e614f1ddb645
void cpu_reset (CPUMIPSState *env) { memset(env, 0, offsetof(CPUMIPSState, breakpoints)); tlb_flush(env, 1); #if !defined(CONFIG_USER_ONLY) if (env->hflags & MIPS_HFLAG_BMASK) { env->CP0_ErrorEPC = env->PC - 4; env->hflags &= ~MIPS_HFLAG_BMASK; } else { ...
{ "code": [], "line_no": [] }
void FUNC_0 (CPUMIPSState *VAR_0) { memset(VAR_0, 0, offsetof(CPUMIPSState, breakpoints)); tlb_flush(VAR_0, 1); #if !defined(CONFIG_USER_ONLY) if (VAR_0->hflags & MIPS_HFLAG_BMASK) { VAR_0->CP0_ErrorEPC = VAR_0->PC - 4; VAR_0->hflags &= ~MIPS_HFLAG_BMASK; } ...
[ "void FUNC_0 (CPUMIPSState *VAR_0)\n{", "memset(VAR_0, 0, offsetof(CPUMIPSState, breakpoints));", "tlb_flush(VAR_0, 1);", "#if !defined(CONFIG_USER_ONLY)\nif (VAR_0->hflags & MIPS_HFLAG_BMASK) {", "VAR_0->CP0_ErrorEPC = VAR_0->PC - 4;", "VAR_0->hflags &= ~MIPS_HFLAG_BMASK;", "} else {", "VAR_0->CP0_Er...
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[ [ 1, 3 ], [ 5 ], [ 9 ], [ 15, 17 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35, 37 ], [ 39 ], [ 41, 43 ], [ 47 ], [ 49 ], [ 51 ], [ 53 ], [ 55 ], ...
10,259
static void gen_neon_unzip_u8(TCGv t0, TCGv t1) { TCGv rd, rm, tmp; rd = new_tmp(); rm = new_tmp(); tmp = new_tmp(); tcg_gen_andi_i32(rd, t0, 0xff); tcg_gen_shri_i32(tmp, t0, 8); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, t1, ...
false
qemu
02acedf93da420713a0c4bbeaf32ce9d734a4332
static void gen_neon_unzip_u8(TCGv t0, TCGv t1) { TCGv rd, rm, tmp; rd = new_tmp(); rm = new_tmp(); tmp = new_tmp(); tcg_gen_andi_i32(rd, t0, 0xff); tcg_gen_shri_i32(tmp, t0, 8); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, t1, ...
{ "code": [], "line_no": [] }
static void FUNC_0(TCGv VAR_0, TCGv VAR_1) { TCGv rd, rm, tmp; rd = new_tmp(); rm = new_tmp(); tmp = new_tmp(); tcg_gen_andi_i32(rd, VAR_0, 0xff); tcg_gen_shri_i32(tmp, VAR_0, 8); tcg_gen_andi_i32(tmp, tmp, 0xff00); tcg_gen_or_i32(rd, rd, tmp); tcg_gen_shli_i32(tmp, VAR...
[ "static void FUNC_0(TCGv VAR_0, TCGv VAR_1)\n{", "TCGv rd, rm, tmp;", "rd = new_tmp();", "rm = new_tmp();", "tmp = new_tmp();", "tcg_gen_andi_i32(rd, VAR_0, 0xff);", "tcg_gen_shri_i32(tmp, VAR_0, 8);", "tcg_gen_andi_i32(tmp, tmp, 0xff00);", "tcg_gen_or_i32(rd, rd, tmp);", "tcg_gen_shli_i32(tmp, VA...
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[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47...
10,260
static int nic_can_receive(NetClientState *nc) { EEPRO100State *s = qemu_get_nic_opaque(nc); TRACE(RXTX, logout("%p\n", s)); return get_ru_state(s) == ru_ready; #if 0 return !eepro100_buffer_full(s); #endif }
false
qemu
363db4b249244f31d3c47fbd5a8b128c95ba8fe7
static int nic_can_receive(NetClientState *nc) { EEPRO100State *s = qemu_get_nic_opaque(nc); TRACE(RXTX, logout("%p\n", s)); return get_ru_state(s) == ru_ready; #if 0 return !eepro100_buffer_full(s); #endif }
{ "code": [], "line_no": [] }
static int FUNC_0(NetClientState *VAR_0) { EEPRO100State *s = qemu_get_nic_opaque(VAR_0); TRACE(RXTX, logout("%p\n", s)); return get_ru_state(s) == ru_ready; #if 0 return !eepro100_buffer_full(s); #endif }
[ "static int FUNC_0(NetClientState *VAR_0)\n{", "EEPRO100State *s = qemu_get_nic_opaque(VAR_0);", "TRACE(RXTX, logout(\"%p\\n\", s));", "return get_ru_state(s) == ru_ready;", "#if 0\nreturn !eepro100_buffer_full(s);", "#endif\n}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11, 13 ], [ 15, 17 ] ]
10,261
int omap_validate_emiff_addr(struct omap_mpu_state_s *s, target_phys_addr_t addr) { return addr >= OMAP_EMIFF_BASE && addr < OMAP_EMIFF_BASE + s->sdram_size; }
false
qemu
b854bc196f5c4b4e3299c0b0ee63cf828ece9e77
int omap_validate_emiff_addr(struct omap_mpu_state_s *s, target_phys_addr_t addr) { return addr >= OMAP_EMIFF_BASE && addr < OMAP_EMIFF_BASE + s->sdram_size; }
{ "code": [], "line_no": [] }
int FUNC_0(struct omap_mpu_state_s *VAR_0, target_phys_addr_t VAR_1) { return VAR_1 >= OMAP_EMIFF_BASE && VAR_1 < OMAP_EMIFF_BASE + VAR_0->sdram_size; }
[ "int FUNC_0(struct omap_mpu_state_s *VAR_0,\ntarget_phys_addr_t VAR_1)\n{", "return VAR_1 >= OMAP_EMIFF_BASE && VAR_1 < OMAP_EMIFF_BASE + VAR_0->sdram_size;", "}" ]
[ 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 7 ], [ 9 ] ]
10,262
PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr) { const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr; PCIBus *bus; int devfn; PCIDevice *pci_dev; DeviceState *dev; int i; i = qemu_find_nic_model(nd...
false
qemu
1bb650420021ced718d550559034a5147c053068
PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr) { const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr; PCIBus *bus; int devfn; PCIDevice *pci_dev; DeviceState *dev; int i; i = qemu_find_nic_model(nd...
{ "code": [], "line_no": [] }
PCIDevice *FUNC_0(NICInfo *nd, const char *default_model, const char *default_devaddr) { const char *VAR_0 = nd->VAR_0 ? nd->VAR_0 : default_devaddr; PCIBus *bus; int VAR_1; PCIDevice *pci_dev; DeviceState *dev; int VAR_2; VAR_2 = qemu_find_nic_model(nd, pc...
[ "PCIDevice *FUNC_0(NICInfo *nd, const char *default_model,\nconst char *default_devaddr)\n{", "const char *VAR_0 = nd->VAR_0 ? nd->VAR_0 : default_devaddr;", "PCIBus *bus;", "int VAR_1;", "PCIDevice *pci_dev;", "DeviceState *dev;", "int VAR_2;", "VAR_2 = qemu_find_nic_model(nd, pci_nic_models, default...
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[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23, 25 ], [ 29 ], [ 31 ], [ 33, 35 ], [ 37 ], [ 39 ], [ 43 ], [ 45 ], [ 47, 49 ], [ 51 ...
10,263
static const char *local_mapped_attr_path(FsContext *ctx, const char *path, char *buffer) { char *dir_name; char *tmp_path = g_strdup(path); char *base_name = basename(tmp_path); /* NULL terminate the directory */ dir_name = tmp_path; *(base_na...
false
qemu
4fa4ce7107c6ec432f185307158c5df91ce54308
static const char *local_mapped_attr_path(FsContext *ctx, const char *path, char *buffer) { char *dir_name; char *tmp_path = g_strdup(path); char *base_name = basename(tmp_path); dir_name = tmp_path; *(base_name - 1) = '\0'; snprintf(bu...
{ "code": [], "line_no": [] }
static const char *FUNC_0(FsContext *VAR_0, const char *VAR_1, char *VAR_2) { char *VAR_3; char *VAR_4 = g_strdup(VAR_1); char *VAR_5 = basename(VAR_4); VAR_3 = VAR_4; *(VAR_5 - 1) = '\0'; snprintf(VAR_2, PATH_MAX, "%s/%s/%s/%s", ...
[ "static const char *FUNC_0(FsContext *VAR_0,\nconst char *VAR_1, char *VAR_2)\n{", "char *VAR_3;", "char *VAR_4 = g_strdup(VAR_1);", "char *VAR_5 = basename(VAR_4);", "VAR_3 = VAR_4;", "*(VAR_5 - 1) = '\\0';", "snprintf(VAR_2, PATH_MAX, \"%s/%s/%s/%s\",\nVAR_0->fs_root, VAR_3, VIRTFS_META_DIR, VAR_5);",...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ], [ 17 ], [ 19 ], [ 23, 25 ], [ 27 ], [ 29 ], [ 31 ] ]
10,265
RxFilterInfoList *qmp_query_rx_filter(bool has_name, const char *name, Error **errp) { NetClientState *nc; RxFilterInfoList *filter_list = NULL, *last_entry = NULL; QTAILQ_FOREACH(nc, &net_clients, next) { RxFilterInfoList *entry; RxFilterInfo *...
false
qemu
9083da1d4c9dfff30d411f8c73ea494e9d78de1b
RxFilterInfoList *qmp_query_rx_filter(bool has_name, const char *name, Error **errp) { NetClientState *nc; RxFilterInfoList *filter_list = NULL, *last_entry = NULL; QTAILQ_FOREACH(nc, &net_clients, next) { RxFilterInfoList *entry; RxFilterInfo *...
{ "code": [], "line_no": [] }
RxFilterInfoList *FUNC_0(bool has_name, const char *name, Error **errp) { NetClientState *nc; RxFilterInfoList *filter_list = NULL, *last_entry = NULL; QTAILQ_FOREACH(nc, &net_clients, next) { RxFilterInfoList *entry; RxFilterInfo *info; ...
[ "RxFilterInfoList *FUNC_0(bool has_name, const char *name,\nError **errp)\n{", "NetClientState *nc;", "RxFilterInfoList *filter_list = NULL, *last_entry = NULL;", "QTAILQ_FOREACH(nc, &net_clients, next) {", "RxFilterInfoList *entry;", "RxFilterInfo *info;", "if (has_name && strcmp(nc->name, name) != 0) ...
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[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 47 ], [ 49 ], [ 51 ], [...
10,267
write_f(int argc, char **argv) { struct timeval t1, t2; int Cflag = 0, pflag = 0, qflag = 0, bflag = 0; int c, cnt; char *buf; int64_t offset; int count; /* Some compilers get confused and warn if this is not initialized. */ int total = 0; int pattern = 0xcd; while ((c = getopt(arg...
false
qemu
cf070d7ec0b8fb21faa9a630ed5cc66f90844a08
write_f(int argc, char **argv) { struct timeval t1, t2; int Cflag = 0, pflag = 0, qflag = 0, bflag = 0; int c, cnt; char *buf; int64_t offset; int count; int total = 0; int pattern = 0xcd; while ((c = getopt(argc, argv, "bCpP:q")) != EOF) { switch (c) { case 'b': bflag = ...
{ "code": [], "line_no": [] }
FUNC_0(int VAR_0, char **VAR_1) { struct timeval VAR_2, VAR_3; int VAR_4 = 0, VAR_5 = 0, VAR_6 = 0, VAR_7 = 0; int VAR_8, VAR_9; char *VAR_10; int64_t offset; int VAR_11; int VAR_12 = 0; int VAR_13 = 0xcd; while ((VAR_8 = getopt(VAR_0, VAR_1, "bCpP:q")) != EOF) { switch (VAR_8) ...
[ "FUNC_0(int VAR_0, char **VAR_1)\n{", "struct timeval VAR_2, VAR_3;", "int VAR_4 = 0, VAR_5 = 0, VAR_6 = 0, VAR_7 = 0;", "int VAR_8, VAR_9;", "char *VAR_10;", "int64_t offset;", "int VAR_11;", "int VAR_12 = 0;", "int VAR_13 = 0xcd;", "while ((VAR_8 = getopt(VAR_0, VAR_1, \"bCpP:q\")) != EOF) {", ...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 19 ], [ 21 ], [ 25 ], [ 27 ], [ 29, 31 ], [ 33 ], [ 35, 37 ], [ 39 ], [ 41, 43 ], [ 45 ], [ 47, 49 ...
10,270
void framebuffer_update_display( DisplaySurface *ds, MemoryRegion *address_space, hwaddr base, int cols, /* Width in pixels. */ int rows, /* Height in pixels. */ int src_width, /* Length of source line, in bytes. */ int dest_row_pitch, /* Bytes between adjacent horizontal output pi...
false
qemu
dfde4e6e1a868f60033ece0590b1f75e6c57fa16
void framebuffer_update_display( DisplaySurface *ds, MemoryRegion *address_space, hwaddr base, int cols, int rows, int src_width, int dest_row_pitch, int dest_col_pitch, int invalidate, drawfn fn, void *opaque, int *first_row, int *last_row ) { ...
{ "code": [], "line_no": [] }
void FUNC_0( DisplaySurface *VAR_0, MemoryRegion *VAR_1, hwaddr VAR_2, int VAR_3, int VAR_4, int VAR_5, int VAR_6, int VAR_7, int VAR_8, drawfn VAR_9, void *VAR_10, int *VAR_11, int *VAR_12 ) { hwaddr src_len; uint8_t *dest; uint8_t...
[ "void FUNC_0(\nDisplaySurface *VAR_0,\nMemoryRegion *VAR_1,\nhwaddr VAR_2,\nint VAR_3,\nint VAR_4,\nint VAR_5,\nint VAR_6,\nint VAR_7,\nint VAR_8,\ndrawfn VAR_9,\nvoid *VAR_10,\nint *VAR_11,\nint *VAR_12 )\n{", "hwaddr src_len;", "uint8_t *dest;", "uint8_t *src;", "uint8_t *src_base;", "int VAR_13, VAR_14...
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[ [ 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ], [ 53 ], [ 55 ], [...
10,271
void tcg_region_reset_all(void) { unsigned int i; qemu_mutex_lock(&region.lock); region.current = 0; region.agg_size_full = 0; for (i = 0; i < n_tcg_ctxs; i++) { bool err = tcg_region_initial_alloc__locked(tcg_ctxs[i]); g_assert(!err); } qemu_mutex_unlock(&reg...
false
qemu
3468b59e18b179bc63c7ce934de912dfa9596122
void tcg_region_reset_all(void) { unsigned int i; qemu_mutex_lock(&region.lock); region.current = 0; region.agg_size_full = 0; for (i = 0; i < n_tcg_ctxs; i++) { bool err = tcg_region_initial_alloc__locked(tcg_ctxs[i]); g_assert(!err); } qemu_mutex_unlock(&reg...
{ "code": [], "line_no": [] }
void FUNC_0(void) { unsigned int VAR_0; qemu_mutex_lock(&region.lock); region.current = 0; region.agg_size_full = 0; for (VAR_0 = 0; VAR_0 < n_tcg_ctxs; VAR_0++) { bool err = tcg_region_initial_alloc__locked(tcg_ctxs[VAR_0]); g_assert(!err); } qemu_mutex_unloc...
[ "void FUNC_0(void)\n{", "unsigned int VAR_0;", "qemu_mutex_lock(&region.lock);", "region.current = 0;", "region.agg_size_full = 0;", "for (VAR_0 = 0; VAR_0 < n_tcg_ctxs; VAR_0++) {", "bool err = tcg_region_initial_alloc__locked(tcg_ctxs[VAR_0]);", "g_assert(!err);", "}", "qemu_mutex_unlock(&region...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ] ]
10,272
static int parse_args(int argc, char **argv) { const char *r; int optind; struct qemu_argument *arginfo; for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { if (arginfo->env == NULL) { continue; } r = getenv(arginfo->env); if (r !...
false
qemu
1386d4c0f5ce4c4391f2024a36c77eb8fb152e90
static int parse_args(int argc, char **argv) { const char *r; int optind; struct qemu_argument *arginfo; for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) { if (arginfo->env == NULL) { continue; } r = getenv(arginfo->env); if (r !...
{ "code": [], "line_no": [] }
static int FUNC_0(int VAR_0, char **VAR_1) { const char *VAR_2; int VAR_3; struct qemu_argument *VAR_4; for (VAR_4 = arg_table; VAR_4->handle_opt != NULL; VAR_4++) { if (VAR_4->env == NULL) { continue; } VAR_2 = getenv(VAR_4->env); if (VAR_2 != N...
[ "static int FUNC_0(int VAR_0, char **VAR_1)\n{", "const char *VAR_2;", "int VAR_3;", "struct qemu_argument *VAR_4;", "for (VAR_4 = arg_table; VAR_4->handle_opt != NULL; VAR_4++) {", "if (VAR_4->env == NULL) {", "continue;", "}", "VAR_2 = getenv(VAR_4->env);", "if (VAR_2 != NULL) {", "VAR_4->hand...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ...
10,273
void cpu_loop(CPUOpenRISCState *env) { CPUState *cs = CPU(openrisc_env_get_cpu(env)); int trapnr, gdbsig; for (;;) { cpu_exec_start(cs); trapnr = cpu_openrisc_exec(cs); cpu_exec_end(cs); gdbsig = 0; switch (trapnr) { case EXCP_RESET: ...
false
qemu
120a9848c2f667bf8f1a06772dc9cde064d92a7d
void cpu_loop(CPUOpenRISCState *env) { CPUState *cs = CPU(openrisc_env_get_cpu(env)); int trapnr, gdbsig; for (;;) { cpu_exec_start(cs); trapnr = cpu_openrisc_exec(cs); cpu_exec_end(cs); gdbsig = 0; switch (trapnr) { case EXCP_RESET: ...
{ "code": [], "line_no": [] }
void FUNC_0(CPUOpenRISCState *VAR_0) { CPUState *cs = CPU(openrisc_env_get_cpu(VAR_0)); int VAR_1, VAR_2; for (;;) { cpu_exec_start(cs); VAR_1 = cpu_openrisc_exec(cs); cpu_exec_end(cs); VAR_2 = 0; switch (VAR_1) { case EXCP_RESET: qe...
[ "void FUNC_0(CPUOpenRISCState *VAR_0)\n{", "CPUState *cs = CPU(openrisc_env_get_cpu(VAR_0));", "int VAR_1, VAR_2;", "for (;;) {", "cpu_exec_start(cs);", "VAR_1 = cpu_openrisc_exec(cs);", "cpu_exec_end(cs);", "VAR_2 = 0;", "switch (VAR_1) {", "case EXCP_RESET:\nqemu_log(\"\\nReset request, exit, pc...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 23 ], [ 25, 27 ], [ 29 ], [ 31 ], [ 33, 35 ], [ 37 ], [ 39 ], [ 41, 43, 45 ], [ 47 ], [ 49...
10,275
void msix_save(PCIDevice *dev, QEMUFile *f) { unsigned n = dev->msix_entries_nr; if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) { return; } qemu_put_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE); qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8); ...
false
qemu
44701ab71ad854e6be567a6294f4665f36651076
void msix_save(PCIDevice *dev, QEMUFile *f) { unsigned n = dev->msix_entries_nr; if (!(dev->cap_present & QEMU_PCI_CAP_MSIX)) { return; } qemu_put_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE); qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8); ...
{ "code": [], "line_no": [] }
void FUNC_0(PCIDevice *VAR_0, QEMUFile *VAR_1) { unsigned VAR_2 = VAR_0->msix_entries_nr; if (!(VAR_0->cap_present & QEMU_PCI_CAP_MSIX)) { return; } qemu_put_buffer(VAR_1, VAR_0->msix_table_page, VAR_2 * PCI_MSIX_ENTRY_SIZE); qemu_put_buffer(VAR_1, VAR_0->msix_table_page + MSIX_PA...
[ "void FUNC_0(PCIDevice *VAR_0, QEMUFile *VAR_1)\n{", "unsigned VAR_2 = VAR_0->msix_entries_nr;", "if (!(VAR_0->cap_present & QEMU_PCI_CAP_MSIX)) {", "return;", "}", "qemu_put_buffer(VAR_1, VAR_0->msix_table_page, VAR_2 * PCI_MSIX_ENTRY_SIZE);", "qemu_put_buffer(VAR_1, VAR_0->msix_table_page + MSIX_PAGE_...
[ 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 17 ], [ 19 ], [ 21 ] ]
10,276
int qsv_init(AVCodecContext *s) { InputStream *ist = s->opaque; QSVContext *qsv = ist->hwaccel_ctx; AVQSVContext *hwctx_dec; int ret; if (!qsv) { av_log(NULL, AV_LOG_ERROR, "QSV transcoding is not initialized. " "-hwaccel qsv should only be used for one-to-one QSV t...
false
FFmpeg
03cef34aa66662e2ab3681d290e7c5a6634f4058
int qsv_init(AVCodecContext *s) { InputStream *ist = s->opaque; QSVContext *qsv = ist->hwaccel_ctx; AVQSVContext *hwctx_dec; int ret; if (!qsv) { av_log(NULL, AV_LOG_ERROR, "QSV transcoding is not initialized. " "-hwaccel qsv should only be used for one-to-one QSV t...
{ "code": [], "line_no": [] }
int FUNC_0(AVCodecContext *VAR_0) { InputStream *ist = VAR_0->opaque; QSVContext *qsv = ist->hwaccel_ctx; AVQSVContext *hwctx_dec; int VAR_1; if (!qsv) { av_log(NULL, AV_LOG_ERROR, "QSV transcoding is not initialized. " "-hwaccel qsv should only be used for one-to-o...
[ "int FUNC_0(AVCodecContext *VAR_0)\n{", "InputStream *ist = VAR_0->opaque;", "QSVContext *qsv = ist->hwaccel_ctx;", "AVQSVContext *hwctx_dec;", "int VAR_1;", "if (!qsv) {", "av_log(NULL, AV_LOG_ERROR, \"QSV transcoding is not initialized. \"\n\"-hwaccel qsv should only be used for one-to-one QSV transc...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15 ], [ 17, 19, 21 ], [ 23 ], [ 25 ], [ 29 ], [ 31, 33 ], [ 37 ], [ 39, 41 ], [ 45 ], [ 47 ], [ 49 ], [ 51 ], [ 55 ...
10,277
static void default_drive(int enable, int snapshot, int use_scsi, BlockInterfaceType type, int index, const char *optstr) { QemuOpts *opts; if (type == IF_DEFAULT) { type = use_scsi ? IF_SCSI : IF_IDE; } if (!enable || drive_get_by_...
false
qemu
2d0d2837dcf786da415cf4165d37f4ddd684ff57
static void default_drive(int enable, int snapshot, int use_scsi, BlockInterfaceType type, int index, const char *optstr) { QemuOpts *opts; if (type == IF_DEFAULT) { type = use_scsi ? IF_SCSI : IF_IDE; } if (!enable || drive_get_by_...
{ "code": [], "line_no": [] }
static void FUNC_0(int VAR_0, int VAR_1, int VAR_2, BlockInterfaceType VAR_3, int VAR_4, const char *VAR_5) { QemuOpts *opts; if (VAR_3 == IF_DEFAULT) { VAR_3 = VAR_2 ? IF_SCSI : IF_IDE; } if (!VAR_0 || drive_get_by_index(VAR_3, VAR...
[ "static void FUNC_0(int VAR_0, int VAR_1, int VAR_2,\nBlockInterfaceType VAR_3, int VAR_4,\nconst char *VAR_5)\n{", "QemuOpts *opts;", "if (VAR_3 == IF_DEFAULT) {", "VAR_3 = VAR_2 ? IF_SCSI : IF_IDE;", "}", "if (!VAR_0 || drive_get_by_index(VAR_3, VAR_4)) {", "return;", "}", "opts = drive_add(VAR_3,...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5, 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ] ]
10,279
void css_generate_css_crws(uint8_t cssid) { if (!channel_subsys.sei_pending) { css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, cssid); } channel_subsys.sei_pending = true; }
false
qemu
5c8d6f008c0555b54cf10550fa86199a2cfabbca
void css_generate_css_crws(uint8_t cssid) { if (!channel_subsys.sei_pending) { css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, cssid); } channel_subsys.sei_pending = true; }
{ "code": [], "line_no": [] }
void FUNC_0(uint8_t VAR_0) { if (!channel_subsys.sei_pending) { css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, VAR_0); } channel_subsys.sei_pending = true; }
[ "void FUNC_0(uint8_t VAR_0)\n{", "if (!channel_subsys.sei_pending) {", "css_queue_crw(CRW_RSC_CSS, CRW_ERC_EVENT, 0, VAR_0);", "}", "channel_subsys.sei_pending = true;", "}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ] ]
10,280
int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque) { WaitObjects *w = &wait_objects; if (w->num >= MAXIMUM_WAIT_OBJECTS) return -1; w->events[w->num] = handle; w->func[w->num] = func; w->opaque[w->num] = opaque; w->num++; return 0; }
false
qemu
d3b12f5dec4b27ebab58fb5797cb67bacced773b
int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque) { WaitObjects *w = &wait_objects; if (w->num >= MAXIMUM_WAIT_OBJECTS) return -1; w->events[w->num] = handle; w->func[w->num] = func; w->opaque[w->num] = opaque; w->num++; return 0; }
{ "code": [], "line_no": [] }
int FUNC_0(HANDLE VAR_0, WaitObjectFunc *VAR_1, void *VAR_2) { WaitObjects *w = &wait_objects; if (w->num >= MAXIMUM_WAIT_OBJECTS) return -1; w->events[w->num] = VAR_0; w->VAR_1[w->num] = VAR_1; w->VAR_2[w->num] = VAR_2; w->num++; return 0; }
[ "int FUNC_0(HANDLE VAR_0, WaitObjectFunc *VAR_1, void *VAR_2)\n{", "WaitObjects *w = &wait_objects;", "if (w->num >= MAXIMUM_WAIT_OBJECTS)\nreturn -1;", "w->events[w->num] = VAR_0;", "w->VAR_1[w->num] = VAR_1;", "w->VAR_2[w->num] = VAR_2;", "w->num++;", "return 0;", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9, 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ] ]
10,281
static void scsi_device_unrealize(SCSIDevice *s, Error **errp) { SCSIDeviceClass *sc = SCSI_DEVICE_GET_CLASS(s); if (sc->unrealize) { sc->unrealize(s, errp); } }
false
qemu
fb7b5c0df6e3c501973ce4d57eb2b1d4344a519d
static void scsi_device_unrealize(SCSIDevice *s, Error **errp) { SCSIDeviceClass *sc = SCSI_DEVICE_GET_CLASS(s); if (sc->unrealize) { sc->unrealize(s, errp); } }
{ "code": [], "line_no": [] }
static void FUNC_0(SCSIDevice *VAR_0, Error **VAR_1) { SCSIDeviceClass *sc = SCSI_DEVICE_GET_CLASS(VAR_0); if (sc->unrealize) { sc->unrealize(VAR_0, VAR_1); } }
[ "static void FUNC_0(SCSIDevice *VAR_0, Error **VAR_1)\n{", "SCSIDeviceClass *sc = SCSI_DEVICE_GET_CLASS(VAR_0);", "if (sc->unrealize) {", "sc->unrealize(VAR_0, VAR_1);", "}", "}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ] ]
10,284
void disas(FILE *out, void *code, unsigned long size) { unsigned long pc; int count; struct disassemble_info disasm_info; int (*print_insn)(bfd_vma pc, disassemble_info *info); INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); disasm_info.buffer = code; disasm_info.buffer_vma = (...
false
qemu
0f136d9e060ad879d0b840274ddfd1955e24fc10
void disas(FILE *out, void *code, unsigned long size) { unsigned long pc; int count; struct disassemble_info disasm_info; int (*print_insn)(bfd_vma pc, disassemble_info *info); INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); disasm_info.buffer = code; disasm_info.buffer_vma = (...
{ "code": [], "line_no": [] }
void FUNC_0(FILE *VAR_0, void *VAR_1, unsigned long VAR_2) { unsigned long VAR_7; int VAR_4; struct disassemble_info VAR_5; int (*VAR_6)(bfd_vma VAR_7, disassemble_info *VAR_7); INIT_DISASSEMBLE_INFO(VAR_5, VAR_0, fprintf); VAR_5.buffer = VAR_1; VAR_5.buffer_vma = (unsigned long)...
[ "void FUNC_0(FILE *VAR_0, void *VAR_1, unsigned long VAR_2)\n{", "unsigned long VAR_7;", "int VAR_4;", "struct disassemble_info VAR_5;", "int (*VAR_6)(bfd_vma VAR_7, disassemble_info *VAR_7);", "INIT_DISASSEMBLE_INFO(VAR_5, VAR_0, fprintf);", "VAR_5.buffer = VAR_1;", "VAR_5.buffer_vma = (unsigned long...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15 ], [ 19 ], [ 21 ], [ 23 ], [ 27, 29 ], [ 31, 33 ], [ 35, 37, 39 ], [ 41 ], [ 43, 45 ], [ 47 ], [ 49, 51 ], [ 53,...
10,285
void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp) { if (key) { if (!bdrv_is_encrypted(bs)) { error_setg(errp, "Node '%s' is not encrypted", bdrv_get_device_or_node_name(bs)); } else if (bdrv_set_key(bs, key) < 0) { error_set(e...
false
qemu
61007b316cd71ee7333ff7a0a749a8949527575f
void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp) { if (key) { if (!bdrv_is_encrypted(bs)) { error_setg(errp, "Node '%s' is not encrypted", bdrv_get_device_or_node_name(bs)); } else if (bdrv_set_key(bs, key) < 0) { error_set(e...
{ "code": [], "line_no": [] }
void FUNC_0(BlockDriverState *VAR_0, const char *VAR_1, Error **VAR_2) { if (VAR_1) { if (!bdrv_is_encrypted(VAR_0)) { error_setg(VAR_2, "Node '%s' is not encrypted", bdrv_get_device_or_node_name(VAR_0)); } else if (bdrv_set_key(VAR_0, VAR_1) < 0) { ...
[ "void FUNC_0(BlockDriverState *VAR_0, const char *VAR_1, Error **VAR_2)\n{", "if (VAR_1) {", "if (!bdrv_is_encrypted(VAR_0)) {", "error_setg(VAR_2, \"Node '%s' is not encrypted\",\nbdrv_get_device_or_node_name(VAR_0));", "} else if (bdrv_set_key(VAR_0, VAR_1) < 0) {", "error_set(VAR_2, QERR_INVALID_PASSWO...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9, 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23, 25, 27, 29 ], [ 31 ], [ 33 ], [ 35 ] ]
10,286
static void armv7m_nvic_reset(DeviceState *dev) { nvic_state *s = NVIC(dev); NVICClass *nc = NVIC_GET_CLASS(s); nc->parent_reset(dev); /* Common GIC reset resets to disabled; the NVIC doesn't have * per-CPU interfaces so mark our non-existent CPU interface * as enabled by default, and w...
false
qemu
679aa175e84f5f80b32b307fce5a6b92729e0e61
static void armv7m_nvic_reset(DeviceState *dev) { nvic_state *s = NVIC(dev); NVICClass *nc = NVIC_GET_CLASS(s); nc->parent_reset(dev); s->gic.cpu_enabled[0] = true; s->gic.priority_mask[0] = 0x100; s->gic.enabled = true; systick_reset(s); }
{ "code": [], "line_no": [] }
static void FUNC_0(DeviceState *VAR_0) { nvic_state *s = NVIC(VAR_0); NVICClass *nc = NVIC_GET_CLASS(s); nc->parent_reset(VAR_0); s->gic.cpu_enabled[0] = true; s->gic.priority_mask[0] = 0x100; s->gic.enabled = true; systick_reset(s); }
[ "static void FUNC_0(DeviceState *VAR_0)\n{", "nvic_state *s = NVIC(VAR_0);", "NVICClass *nc = NVIC_GET_CLASS(s);", "nc->parent_reset(VAR_0);", "s->gic.cpu_enabled[0] = true;", "s->gic.priority_mask[0] = 0x100;", "s->gic.enabled = true;", "systick_reset(s);", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 21 ], [ 23 ], [ 27 ], [ 29 ], [ 31 ] ]
10,287
static void float_to_int16_sse(int16_t *dst, const float *src, long len){ int i; for(i=0; i<len; i+=4) { asm volatile( "cvtps2pi %1, %%mm0 \n\t" "cvtps2pi %2, %%mm1 \n\t" "packssdw %%mm1, %%mm0 \n\t" "movq %%mm0, %0 \n\t" :...
false
FFmpeg
35ee72b1d72a4c8fc0ae4e76ad00a71e831b8dbe
static void float_to_int16_sse(int16_t *dst, const float *src, long len){ int i; for(i=0; i<len; i+=4) { asm volatile( "cvtps2pi %1, %%mm0 \n\t" "cvtps2pi %2, %%mm1 \n\t" "packssdw %%mm1, %%mm0 \n\t" "movq %%mm0, %0 \n\t" :...
{ "code": [], "line_no": [] }
static void FUNC_0(int16_t *VAR_0, const float *VAR_1, long VAR_2){ int VAR_3; for(VAR_3=0; VAR_3<VAR_2; VAR_3+=4) { asm volatile( "cvtps2pi %1, %%mm0 \n\t" "cvtps2pi %2, %%mm1 \n\t" "packssdw %%mm1, %%mm0 \n\t" "movq %%mm0, %0 \n\t" ...
[ "static void FUNC_0(int16_t *VAR_0, const float *VAR_1, long VAR_2){", "int VAR_3;", "for(VAR_3=0; VAR_3<VAR_2; VAR_3+=4) {", "asm volatile(\n\"cvtps2pi %1, %%mm0 \\n\\t\"\n\"cvtps2pi %2, %%mm1 \\n\\t\"\n\"packssdw %%mm1, %%mm0 \\n\\t\"\n\"movq %%mm0, %0 \\n\\t\"\n:\"=m\"(VAR_0[VAR_3])\n:\"m\"(VA...
[ 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1 ], [ 3 ], [ 5 ], [ 7, 9, 11, 13, 15, 17, 19, 21 ], [ 23 ], [ 25 ], [ 27 ] ]
10,289
static int migration_rate_limit(void *opaque) { MigrationState *s = opaque; int ret; ret = qemu_file_get_error(s->file); if (ret) { return ret; } if (s->bytes_xfer >= s->xfer_limit) { return 1; } return 0; }
false
qemu
1964a397063967acc5ce71a2a24ed26e74824ee1
static int migration_rate_limit(void *opaque) { MigrationState *s = opaque; int ret; ret = qemu_file_get_error(s->file); if (ret) { return ret; } if (s->bytes_xfer >= s->xfer_limit) { return 1; } return 0; }
{ "code": [], "line_no": [] }
static int FUNC_0(void *VAR_0) { MigrationState *s = VAR_0; int VAR_1; VAR_1 = qemu_file_get_error(s->file); if (VAR_1) { return VAR_1; } if (s->bytes_xfer >= s->xfer_limit) { return 1; } return 0; }
[ "static int FUNC_0(void *VAR_0)\n{", "MigrationState *s = VAR_0;", "int VAR_1;", "VAR_1 = qemu_file_get_error(s->file);", "if (VAR_1) {", "return VAR_1;", "}", "if (s->bytes_xfer >= s->xfer_limit) {", "return 1;", "}", "return 0;", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 29 ], [ 31 ] ]
10,290
void cpu_interrupt(CPUState *env, int mask) { int old_mask; old_mask = env->interrupt_request; env->interrupt_request |= mask; #ifndef CONFIG_USER_ONLY /* * If called from iothread context, wake the target cpu in * case its halted. */ if (!qemu_cpu_self(env)) { ...
false
qemu
b7680cb6078bd7294a3dd86473d3f2fdee991dd0
void cpu_interrupt(CPUState *env, int mask) { int old_mask; old_mask = env->interrupt_request; env->interrupt_request |= mask; #ifndef CONFIG_USER_ONLY if (!qemu_cpu_self(env)) { qemu_cpu_kick(env); return; } #endif if (use_icount) { env->ico...
{ "code": [], "line_no": [] }
void FUNC_0(CPUState *VAR_0, int VAR_1) { int VAR_2; VAR_2 = VAR_0->interrupt_request; VAR_0->interrupt_request |= VAR_1; #ifndef CONFIG_USER_ONLY if (!qemu_cpu_self(VAR_0)) { qemu_cpu_kick(VAR_0); return; } #endif if (use_icount) { VAR_0->ic...
[ "void FUNC_0(CPUState *VAR_0, int VAR_1)\n{", "int VAR_2;", "VAR_2 = VAR_0->interrupt_request;", "VAR_0->interrupt_request |= VAR_1;", "#ifndef CONFIG_USER_ONLY\nif (!qemu_cpu_self(VAR_0)) {", "qemu_cpu_kick(VAR_0);", "return;", "}", "#endif\nif (use_icount) {", "VAR_0->icount_decr.u16.high = 0xff...
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[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 15, 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33, 37 ], [ 39 ], [ 41, 43, 45 ], [ 47 ], [ 49 ], [ 51, 53 ], [ 55 ], [ 57 ], [ 59 ] ]
10,292
static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, int mem_index, TCGMemOp s_bits, tcg_insn_unit **label_ptr, int which) { const TCGReg r0 = TCG_REG_L0; const TCGReg r1 = TCG_REG_L1; TCGType ttype = T...
false
qemu
8cc580f6a0d8c0e2f590c1472cf5cd8e51761760
static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, int mem_index, TCGMemOp s_bits, tcg_insn_unit **label_ptr, int which) { const TCGReg r0 = TCG_REG_L0; const TCGReg r1 = TCG_REG_L1; TCGType ttype = T...
{ "code": [], "line_no": [] }
static inline void FUNC_0(TCGContext *VAR_0, TCGReg VAR_1, TCGReg VAR_2, int VAR_3, TCGMemOp VAR_4, tcg_insn_unit **VAR_5, int VAR_6) { const TCGReg VAR_7 = TCG_REG_L0; const TCGReg VAR_8 = TCG_REG_L1; TCGType ttype = TCG_TYPE_I32...
[ "static inline void FUNC_0(TCGContext *VAR_0, TCGReg VAR_1, TCGReg VAR_2,\nint VAR_3, TCGMemOp VAR_4,\ntcg_insn_unit **VAR_5, int VAR_6)\n{", "const TCGReg VAR_7 = TCG_REG_L0;", "const TCGReg VAR_8 = TCG_REG_L1;", "TCGType ttype = TCG_TYPE_I32;", "TCGType htype = TCG_TYPE_I32;", "int VAR_9 = 0, VAR_10 = 0...
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[ [ 1, 3, 5, 7 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 43 ], [ 45 ], [ 49,...
10,294
static inline void t_gen_sext(TCGv d, TCGv s, int size) { if (size == 1) tcg_gen_ext8s_i32(d, s); else if (size == 2) tcg_gen_ext16s_i32(d, s); else if(GET_TCGV(d) != GET_TCGV(s)) tcg_gen_mov_tl(d, s); }
false
qemu
a7812ae412311d7d47f8aa85656faadac9d64b56
static inline void t_gen_sext(TCGv d, TCGv s, int size) { if (size == 1) tcg_gen_ext8s_i32(d, s); else if (size == 2) tcg_gen_ext16s_i32(d, s); else if(GET_TCGV(d) != GET_TCGV(s)) tcg_gen_mov_tl(d, s); }
{ "code": [], "line_no": [] }
static inline void FUNC_0(TCGv VAR_0, TCGv VAR_1, int VAR_2) { if (VAR_2 == 1) tcg_gen_ext8s_i32(VAR_0, VAR_1); else if (VAR_2 == 2) tcg_gen_ext16s_i32(VAR_0, VAR_1); else if(GET_TCGV(VAR_0) != GET_TCGV(VAR_1)) tcg_gen_mov_tl(VAR_0, VAR_1); }
[ "static inline void FUNC_0(TCGv VAR_0, TCGv VAR_1, int VAR_2)\n{", "if (VAR_2 == 1)\ntcg_gen_ext8s_i32(VAR_0, VAR_1);", "else if (VAR_2 == 2)\ntcg_gen_ext16s_i32(VAR_0, VAR_1);", "else if(GET_TCGV(VAR_0) != GET_TCGV(VAR_1))\ntcg_gen_mov_tl(VAR_0, VAR_1);", "}" ]
[ 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5, 7 ], [ 9, 11 ], [ 13, 15 ], [ 17 ] ]
10,296
static int vio_make_devnode(VIOsPAPRDevice *dev, void *fdt) { VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qdev_get_info(&dev->qdev); int vdevice_off, node_off, ret; char *dt_name; vdevice_off = fdt_path_offset(fdt, "/vdevice"); if (vdevice_off < 0) { ...
false
qemu
3954d33ab7f82f5a5fa0ced231849920265a5fec
static int vio_make_devnode(VIOsPAPRDevice *dev, void *fdt) { VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qdev_get_info(&dev->qdev); int vdevice_off, node_off, ret; char *dt_name; vdevice_off = fdt_path_offset(fdt, "/vdevice"); if (vdevice_off < 0) { ...
{ "code": [], "line_no": [] }
static int FUNC_0(VIOsPAPRDevice *VAR_0, void *VAR_1) { VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qdev_get_info(&VAR_0->qdev); int VAR_2, VAR_3, VAR_4; char *VAR_5; VAR_2 = fdt_path_offset(VAR_1, "/vdevice"); if (VAR_2 < 0) { return VAR_2; } ...
[ "static int FUNC_0(VIOsPAPRDevice *VAR_0,\nvoid *VAR_1)\n{", "VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qdev_get_info(&VAR_0->qdev);", "int VAR_2, VAR_3, VAR_4;", "char *VAR_5;", "VAR_2 = fdt_path_offset(VAR_1, \"/vdevice\");", "if (VAR_2 < 0) {", "return VAR_2;", "}", "VAR_5 = vio_format_dev...
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10,297
void mkimg(const char *file, const char *fmt, unsigned size_mb) { gchar *cli; bool ret; int rc; GError *err = NULL; char *qemu_img_path; gchar *out, *out2; char *abs_path; qemu_img_path = getenv("QTEST_QEMU_IMG"); abs_path = realpath(qemu_img_path, NULL); assert(qemu...
false
qemu
cb11e7b2f3878575f23d49454c02d8dce35c8d35
void mkimg(const char *file, const char *fmt, unsigned size_mb) { gchar *cli; bool ret; int rc; GError *err = NULL; char *qemu_img_path; gchar *out, *out2; char *abs_path; qemu_img_path = getenv("QTEST_QEMU_IMG"); abs_path = realpath(qemu_img_path, NULL); assert(qemu...
{ "code": [], "line_no": [] }
void FUNC_0(const char *VAR_0, const char *VAR_1, unsigned VAR_2) { gchar *cli; bool ret; int VAR_3; GError *err = NULL; char *VAR_4; gchar *out, *out2; char *VAR_5; VAR_4 = getenv("QTEST_QEMU_IMG"); VAR_5 = realpath(VAR_4, NULL); assert(VAR_4); cli = g_strdup...
[ "void FUNC_0(const char *VAR_0, const char *VAR_1, unsigned VAR_2)\n{", "gchar *cli;", "bool ret;", "int VAR_3;", "GError *err = NULL;", "char *VAR_4;", "gchar *out, *out2;", "char *VAR_5;", "VAR_4 = getenv(\"QTEST_QEMU_IMG\");", "VAR_5 = realpath(VAR_4, NULL);", "assert(VAR_4);", "cli = g_str...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 29, 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 57 ], [...
10,298
static inline void RENAME(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, long src_size) { const uint8_t *s = src; const uint8_t *end; #if COMPILE_TEMPLATE_MMX const uint8_t *mm_end; #endif uint16_t *d = (uint16_t *)dst; end = s + src_size; #if COMPILE_TEMPLATE_MMX __asm__ volatile(PRE...
false
FFmpeg
d1adad3cca407f493c3637e20ecd4f7124e69212
static inline void RENAME(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, long src_size) { const uint8_t *s = src; const uint8_t *end; #if COMPILE_TEMPLATE_MMX const uint8_t *mm_end; #endif uint16_t *d = (uint16_t *)dst; end = s + src_size; #if COMPILE_TEMPLATE_MMX __asm__ volatile(PRE...
{ "code": [], "line_no": [] }
static inline void FUNC_0(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, long src_size) { const uint8_t *VAR_0 = src; const uint8_t *VAR_1; #if COMPILE_TEMPLATE_MMX const uint8_t *mm_end; #endif uint16_t *d = (uint16_t *)dst; VAR_1 = VAR_0 + src_size; #if COMPILE_TEMPLATE_MMX __asm__ ...
[ "static inline void FUNC_0(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, long src_size)\n{", "const uint8_t *VAR_0 = src;", "const uint8_t *VAR_1;", "#if COMPILE_TEMPLATE_MMX\nconst uint8_t *mm_end;", "#endif\nuint16_t *d = (uint16_t *)dst;", "VAR_1 = VAR_0 + src_size;", "#if COMPILE_TEMPLATE_MMX\n__a...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9, 11 ], [ 13, 15 ], [ 17 ], [ 19, 21 ], [ 23, 25, 27, 29 ], [ 31 ], [ 33 ], [ 35, 37, 39, 41, 43, 45, 47, 49, 51, 53, 55, 57, 59,...
10,299
static void cris_alu_op_exec(DisasContext *dc, int op, TCGv dst, TCGv a, TCGv b, int size) { /* Emit the ALU insns. */ switch (op) { case CC_OP_ADD: tcg_gen_add_tl(dst, a, b); /* Extended arithmetics. */ t_gen_addx_carry(dc, dst); break; ca...
false
qemu
42a268c241183877192c376d03bd9b6d527407c7
static void cris_alu_op_exec(DisasContext *dc, int op, TCGv dst, TCGv a, TCGv b, int size) { switch (op) { case CC_OP_ADD: tcg_gen_add_tl(dst, a, b); t_gen_addx_carry(dc, dst); break; case CC_OP_ADDC: tcg_gen_add_tl(dst, a, b); ...
{ "code": [], "line_no": [] }
static void FUNC_0(DisasContext *VAR_0, int VAR_1, TCGv VAR_2, TCGv VAR_3, TCGv VAR_4, int VAR_5) { switch (VAR_1) { case CC_OP_ADD: tcg_gen_add_tl(VAR_2, VAR_3, VAR_4); t_gen_addx_carry(VAR_0, VAR_2); break; case CC_OP_ADDC: tcg_g...
[ "static void FUNC_0(DisasContext *VAR_0, int VAR_1,\nTCGv VAR_2, TCGv VAR_3, TCGv VAR_4, int VAR_5)\n{", "switch (VAR_1) {", "case CC_OP_ADD:\ntcg_gen_add_tl(VAR_2, VAR_3, VAR_4);", "t_gen_addx_carry(VAR_0, VAR_2);", "break;", "case CC_OP_ADDC:\ntcg_gen_add_tl(VAR_2, VAR_3, VAR_4);", "t_gen_add_flag(VAR...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 9 ], [ 11, 13 ], [ 17 ], [ 19 ], [ 21, 23 ], [ 25 ], [ 27 ], [ 29, 31 ], [ 33 ], [ 35 ], [ 37, 39 ], [ 43 ], [ 45 ], [ 47, 49 ], [ 51 ], [ 53...
10,300
static void blockdev_backup_prepare(BlkTransactionState *common, Error **errp) { BlockdevBackupState *state = DO_UPCAST(BlockdevBackupState, common, common); BlockdevBackup *backup; BlockBackend *blk, *target; Error *local_err = NULL; assert(common->action->kind == TRANSACTION_ACTION_KIND_BL...
false
qemu
6a8f9661dc3c088ed0d2f5b41d940190407cbdc5
static void blockdev_backup_prepare(BlkTransactionState *common, Error **errp) { BlockdevBackupState *state = DO_UPCAST(BlockdevBackupState, common, common); BlockdevBackup *backup; BlockBackend *blk, *target; Error *local_err = NULL; assert(common->action->kind == TRANSACTION_ACTION_KIND_BL...
{ "code": [], "line_no": [] }
static void FUNC_0(BlkTransactionState *VAR_0, Error **VAR_1) { BlockdevBackupState *state = DO_UPCAST(BlockdevBackupState, VAR_0, VAR_0); BlockdevBackup *backup; BlockBackend *blk, *target; Error *local_err = NULL; assert(VAR_0->action->kind == TRANSACTION_ACTION_KIND_BLOCKDEV_BACKUP); ...
[ "static void FUNC_0(BlkTransactionState *VAR_0, Error **VAR_1)\n{", "BlockdevBackupState *state = DO_UPCAST(BlockdevBackupState, VAR_0, VAR_0);", "BlockdevBackup *backup;", "BlockBackend *blk, *target;", "Error *local_err = NULL;", "assert(VAR_0->action->kind == TRANSACTION_ACTION_KIND_BLOCKDEV_BACKUP);",...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ...
10,301
static int zipl_magic(uint8_t *ptr) { uint32_t *p = (void*)ptr; uint32_t *z = (void*)ZIPL_MAGIC; if (*p != *z) { debug_print_int("invalid magic", *p); virtio_panic("invalid magic"); } return 1; }
false
qemu
abd696e4f74a9d30801c6ae2693efe4e5979c2f2
static int zipl_magic(uint8_t *ptr) { uint32_t *p = (void*)ptr; uint32_t *z = (void*)ZIPL_MAGIC; if (*p != *z) { debug_print_int("invalid magic", *p); virtio_panic("invalid magic"); } return 1; }
{ "code": [], "line_no": [] }
static int FUNC_0(uint8_t *VAR_0) { uint32_t *p = (void*)VAR_0; uint32_t *z = (void*)ZIPL_MAGIC; if (*p != *z) { debug_print_int("invalid magic", *p); virtio_panic("invalid magic"); } return 1; }
[ "static int FUNC_0(uint8_t *VAR_0)\n{", "uint32_t *p = (void*)VAR_0;", "uint32_t *z = (void*)ZIPL_MAGIC;", "if (*p != *z) {", "debug_print_int(\"invalid magic\", *p);", "virtio_panic(\"invalid magic\");", "}", "return 1;", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ] ]
10,302
static void bt_hid_interrupt_sdu(void *opaque, const uint8_t *data, int len) { struct bt_hid_device_s *hid = opaque; if (len > BT_HID_MTU || len < 1) goto bad; if ((data[0] & 3) != BT_DATA_OUTPUT) goto bad; if ((data[0] >> 4) == BT_DATA) { if (hid->intr_state) ...
false
qemu
bf937a7965c1d1a6dce4f615d0ead2e2ab505004
static void bt_hid_interrupt_sdu(void *opaque, const uint8_t *data, int len) { struct bt_hid_device_s *hid = opaque; if (len > BT_HID_MTU || len < 1) goto bad; if ((data[0] & 3) != BT_DATA_OUTPUT) goto bad; if ((data[0] >> 4) == BT_DATA) { if (hid->intr_state) ...
{ "code": [], "line_no": [] }
static void FUNC_0(void *VAR_0, const uint8_t *VAR_1, int VAR_2) { struct bt_hid_device_s *VAR_3 = VAR_0; if (VAR_2 > BT_HID_MTU || VAR_2 < 1) goto bad; if ((VAR_1[0] & 3) != BT_DATA_OUTPUT) goto bad; if ((VAR_1[0] >> 4) == BT_DATA) { if (VAR_3->intr_state) ...
[ "static void FUNC_0(void *VAR_0, const uint8_t *VAR_1, int VAR_2)\n{", "struct bt_hid_device_s *VAR_3 = VAR_0;", "if (VAR_2 > BT_HID_MTU || VAR_2 < 1)\ngoto bad;", "if ((VAR_1[0] & 3) != BT_DATA_OUTPUT)\ngoto bad;", "if ((VAR_1[0] >> 4) == BT_DATA) {", "if (VAR_3->intr_state)\ngoto bad;", "VAR_3->data_t...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9, 11 ], [ 13, 15 ], [ 17 ], [ 19, 21 ], [ 25 ], [ 27 ], [ 29 ], [ 31, 33 ], [ 35 ], [ 37 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49, 51 ], ...
10,303
static void decode_opc (CPUState *env, DisasContext *ctx) { int32_t offset; int rs, rt, rd, sa; uint32_t op, op1, op2; int16_t imm; /* make sure instructions are on a word boundary */ if (ctx->pc & 0x3) { env->CP0_BadVAddr = ctx->pc; generate_exception(ctx, EXCP_AdEL);...
false
qemu
7385ac0ba2456159a52b9b2cbb5f6c71921d0c23
static void decode_opc (CPUState *env, DisasContext *ctx) { int32_t offset; int rs, rt, rd, sa; uint32_t op, op1, op2; int16_t imm; if (ctx->pc & 0x3) { env->CP0_BadVAddr = ctx->pc; generate_exception(ctx, EXCP_AdEL); return; } if ((ctx->hflags & ...
{ "code": [], "line_no": [] }
static void FUNC_0 (CPUState *VAR_0, DisasContext *VAR_1) { int32_t offset; int VAR_2, VAR_3, VAR_4, VAR_5; uint32_t op, op1, op2; int16_t imm; if (VAR_1->pc & 0x3) { VAR_0->CP0_BadVAddr = VAR_1->pc; generate_exception(VAR_1, EXCP_AdEL); return; } ...
[ "static void FUNC_0 (CPUState *VAR_0, DisasContext *VAR_1)\n{", "int32_t offset;", "int VAR_2, VAR_3, VAR_4, VAR_5;", "uint32_t op, op1, op2;", "int16_t imm;", "if (VAR_1->pc & 0x3) {", "VAR_0->CP0_BadVAddr = VAR_1->pc;", "generate_exception(VAR_1, EXCP_AdEL);", "return;", "}", "if ((VAR_1->VAR_...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ], [ 29 ], [ 31 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ...
10,304
static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { Port92State *s = opaque; int oldval = s->outport; DPRINTF("port92: write 0x%02" PRIx64 "\n", val); s->outport = val; qemu_set_irq(*s->a20_out, (val >> 1) & 1); if ((val & 1) && !...
false
qemu
d812b3d68ddf0efe91a088ecc8b177865b0bab8d
static void port92_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { Port92State *s = opaque; int oldval = s->outport; DPRINTF("port92: write 0x%02" PRIx64 "\n", val); s->outport = val; qemu_set_irq(*s->a20_out, (val >> 1) & 1); if ((val & 1) && !...
{ "code": [], "line_no": [] }
static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2, unsigned VAR_3) { Port92State *s = VAR_0; int VAR_4 = s->outport; DPRINTF("port92: write 0x%02" PRIx64 "\n", VAR_2); s->outport = VAR_2; qemu_set_irq(*s->a20_out, (VAR_2 >> 1) & 1); if ((VAR_2 & 1) &...
[ "static void FUNC_0(void *VAR_0, hwaddr VAR_1, uint64_t VAR_2,\nunsigned VAR_3)\n{", "Port92State *s = VAR_0;", "int VAR_4 = s->outport;", "DPRINTF(\"port92: write 0x%02\" PRIx64 \"\\n\", VAR_2);", "s->outport = VAR_2;", "qemu_set_irq(*s->a20_out, (VAR_2 >> 1) & 1);", "if ((VAR_2 & 1) && !(VAR_4 & 1)) {...
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 23 ], [ 25 ] ]
10,305
static uint64_t coroutine_fn mirror_iteration(MirrorBlockJob *s) { BlockDriverState *source = blk_bs(s->common.blk); int64_t sector_num, first_chunk; uint64_t delay_ns = 0; /* At least the first dirty chunk is mirrored in one iteration. */ int nb_chunks = 1; int64_t end = s->bdev_length /...
false
qemu
0965a41e998ab820b5d660c8abfc8c819c97bc1b
static uint64_t coroutine_fn mirror_iteration(MirrorBlockJob *s) { BlockDriverState *source = blk_bs(s->common.blk); int64_t sector_num, first_chunk; uint64_t delay_ns = 0; int nb_chunks = 1; int64_t end = s->bdev_length / BDRV_SECTOR_SIZE; int sectors_per_chunk = s->granularity >> ...
{ "code": [], "line_no": [] }
static uint64_t VAR_0 mirror_iteration(MirrorBlockJob *s) { BlockDriverState *source = blk_bs(s->common.blk); int64_t sector_num, first_chunk; uint64_t delay_ns = 0; int nb_chunks = 1; int64_t end = s->bdev_length / BDRV_SECTOR_SIZE; int sectors_per_chunk = s->granularity >> BDRV_SE...
[ "static uint64_t VAR_0 mirror_iteration(MirrorBlockJob *s)\n{", "BlockDriverState *source = blk_bs(s->common.blk);", "int64_t sector_num, first_chunk;", "uint64_t delay_ns = 0;", "int nb_chunks = 1;", "int64_t end = s->bdev_length / BDRV_SECTOR_SIZE;", "int sectors_per_chunk = s->granularity >> BDRV_SEC...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 39 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ...
10,306
static void flush_encoders(void) { int i, ret; for (i = 0; i < nb_output_streams; i++) { OutputStream *ost = output_streams[i]; AVCodecContext *enc = ost->enc_ctx; AVFormatContext *os = output_files[ost->file_index]->ctx; int stop_encoding = 0; if (!ost->enc...
false
FFmpeg
398f015f077c6a2406deffd9e37ff34b9c7bb3bc
static void flush_encoders(void) { int i, ret; for (i = 0; i < nb_output_streams; i++) { OutputStream *ost = output_streams[i]; AVCodecContext *enc = ost->enc_ctx; AVFormatContext *os = output_files[ost->file_index]->ctx; int stop_encoding = 0; if (!ost->enc...
{ "code": [], "line_no": [] }
static void FUNC_0(void) { int VAR_0, VAR_1; for (VAR_0 = 0; VAR_0 < nb_output_streams; VAR_0++) { OutputStream *ost = output_streams[VAR_0]; AVCodecContext *enc = ost->enc_ctx; AVFormatContext *os = output_files[ost->file_index]->ctx; int stop_encoding = 0; ...
[ "static void FUNC_0(void)\n{", "int VAR_0, VAR_1;", "for (VAR_0 = 0; VAR_0 < nb_output_streams; VAR_0++) {", "OutputStream *ost = output_streams[VAR_0];", "AVCodecContext *enc = ost->enc_ctx;", "AVFormatContext *os = output_files[ost->file_index]->ctx;", "int stop_encoding = 0;", "if (!ost->encoding...
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[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21, 23 ], [ 27, 29 ], [ 33, 35 ], [ 39 ], [ 43 ], [ 45 ], [ 49 ], [ 51, 53 ], [ 55 ], [ 57, 59 ], ...
10,307
AVFormatContext *ff_rtp_chain_mux_open(AVFormatContext *s, AVStream *st, URLContext *handle, int packet_size) { AVFormatContext *rtpctx; int ret; AVOutputFormat *rtp_format = av_guess_format("rtp", NULL, NULL); if (!rtp_format) return NULL; ...
false
FFmpeg
403ee835e7913eb9536b22c2b22edfdd700166a9
AVFormatContext *ff_rtp_chain_mux_open(AVFormatContext *s, AVStream *st, URLContext *handle, int packet_size) { AVFormatContext *rtpctx; int ret; AVOutputFormat *rtp_format = av_guess_format("rtp", NULL, NULL); if (!rtp_format) return NULL; ...
{ "code": [], "line_no": [] }
AVFormatContext *FUNC_0(AVFormatContext *s, AVStream *st, URLContext *handle, int packet_size) { AVFormatContext *rtpctx; int VAR_0; AVOutputFormat *rtp_format = av_guess_format("rtp", NULL, NULL); if (!rtp_format) return NULL; rtpctx ...
[ "AVFormatContext *FUNC_0(AVFormatContext *s, AVStream *st,\nURLContext *handle, int packet_size)\n{", "AVFormatContext *rtpctx;", "int VAR_0;", "AVOutputFormat *rtp_format = av_guess_format(\"rtp\", NULL, NULL);", "if (!rtp_format)\nreturn NULL;", "rtpctx = avformat_alloc_context();", "if (!rtpctx)\nret...
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[ [ 1, 3, 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15, 17 ], [ 23 ], [ 25, 27 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 43 ], [ 47 ], [ 53 ], [ 57 ], [ 61 ], [ 63 ], [...
10,309
static av_cold int avs_decode_init(AVCodecContext * avctx) { AvsContext *s = avctx->priv_data; s->frame = av_frame_alloc(); if (!s->frame) return AVERROR(ENOMEM); avctx->pix_fmt = AV_PIX_FMT_PAL8; ff_set_dimensions(avctx, 318, 198); return 0; }
false
FFmpeg
c7384664ba0cbb12d882effafbc6d321ae706cff
static av_cold int avs_decode_init(AVCodecContext * avctx) { AvsContext *s = avctx->priv_data; s->frame = av_frame_alloc(); if (!s->frame) return AVERROR(ENOMEM); avctx->pix_fmt = AV_PIX_FMT_PAL8; ff_set_dimensions(avctx, 318, 198); return 0; }
{ "code": [], "line_no": [] }
static av_cold int FUNC_0(AVCodecContext * avctx) { AvsContext *s = avctx->priv_data; s->frame = av_frame_alloc(); if (!s->frame) return AVERROR(ENOMEM); avctx->pix_fmt = AV_PIX_FMT_PAL8; ff_set_dimensions(avctx, 318, 198); return 0; }
[ "static av_cold int FUNC_0(AVCodecContext * avctx)\n{", "AvsContext *s = avctx->priv_data;", "s->frame = av_frame_alloc();", "if (!s->frame)\nreturn AVERROR(ENOMEM);", "avctx->pix_fmt = AV_PIX_FMT_PAL8;", "ff_set_dimensions(avctx, 318, 198);", "return 0;", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 9 ], [ 11, 13 ], [ 17 ], [ 19 ], [ 23 ], [ 25 ] ]
10,310
static av_cold int raw_encode_close(AVCodecContext *avctx) { av_frame_free(&avctx->coded_frame); return 0; }
false
FFmpeg
d6604b29ef544793479d7fb4e05ef6622bb3e534
static av_cold int raw_encode_close(AVCodecContext *avctx) { av_frame_free(&avctx->coded_frame); return 0; }
{ "code": [], "line_no": [] }
static av_cold int FUNC_0(AVCodecContext *avctx) { av_frame_free(&avctx->coded_frame); return 0; }
[ "static av_cold int FUNC_0(AVCodecContext *avctx)\n{", "av_frame_free(&avctx->coded_frame);", "return 0;", "}" ]
[ 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ] ]
10,311
int avio_close_dyn_buf(AVIOContext *s, uint8_t **pbuffer) { DynBuffer *d; int size; static const char padbuf[AV_INPUT_BUFFER_PADDING_SIZE] = {0}; int padding = 0; if (!s) { *pbuffer = NULL; return 0; } /* don't attempt to pad fixed-size packet buffers */ if...
false
FFmpeg
b12e4d3bb8df994f042ff1216fb8de2b967aab9e
int avio_close_dyn_buf(AVIOContext *s, uint8_t **pbuffer) { DynBuffer *d; int size; static const char padbuf[AV_INPUT_BUFFER_PADDING_SIZE] = {0}; int padding = 0; if (!s) { *pbuffer = NULL; return 0; } if (!s->max_packet_size) { avio_write(s, padb...
{ "code": [], "line_no": [] }
int FUNC_0(AVIOContext *VAR_0, uint8_t **VAR_1) { DynBuffer *d; int VAR_2; static const char VAR_3[AV_INPUT_BUFFER_PADDING_SIZE] = {0}; int VAR_4 = 0; if (!VAR_0) { *VAR_1 = NULL; return 0; } if (!VAR_0->max_packet_size) { avio_write(VAR_0, VAR_3,...
[ "int FUNC_0(AVIOContext *VAR_0, uint8_t **VAR_1)\n{", "DynBuffer *d;", "int VAR_2;", "static const char VAR_3[AV_INPUT_BUFFER_PADDING_SIZE] = {0};", "int VAR_4 = 0;", "if (!VAR_0) {", "*VAR_1 = NULL;", "return 0;", "}", "if (!VAR_0->max_packet_size) {", "avio_write(VAR_0, VAR_3, sizeof(VAR_3));"...
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[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ], [ 15 ], [ 17 ], [ 19 ], [ 21 ], [ 27 ], [ 29 ], [ 31 ], [ 33 ], [ 37 ], [ 41 ], [ 43 ], [ 45 ], [ 47 ], [ 49 ], [ 51 ...
10,312
void pcie_port_init_reg(PCIDevice *d) { /* Unlike pci bridge, 66MHz and fast back to back don't apply to pci express port. */ pci_set_word(d->config + PCI_STATUS, 0); pci_set_word(d->config + PCI_SEC_STATUS, 0); /* Unlike conventional pci bridge, some bits are hardwired to 0. */ #define ...
false
qemu
45eb768c706d3a5fbe55224c589e8b4e252781d9
void pcie_port_init_reg(PCIDevice *d) { pci_set_word(d->config + PCI_STATUS, 0); pci_set_word(d->config + PCI_SEC_STATUS, 0); #define PCI_BRIDGE_CTL_VGA_16BIT 0x10 pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY | PCI_BRID...
{ "code": [], "line_no": [] }
void FUNC_0(PCIDevice *VAR_0) { pci_set_word(VAR_0->config + PCI_STATUS, 0); pci_set_word(VAR_0->config + PCI_SEC_STATUS, 0); #define PCI_BRIDGE_CTL_VGA_16BIT 0x10 pci_set_word(VAR_0->wmask + PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY | PCI_...
[ "void FUNC_0(PCIDevice *VAR_0)\n{", "pci_set_word(VAR_0->config + PCI_STATUS, 0);", "pci_set_word(VAR_0->config + PCI_SEC_STATUS, 0);", "#define PCI_BRIDGE_CTL_VGA_16BIT 0x10\npci_set_word(VAR_0->wmask + PCI_BRIDGE_CONTROL,\nPCI_BRIDGE_CTL_PARITY |\nPCI_BRIDGE_CTL_ISA |\nPCI_BRIDGE_CTL_VGA |\nPCI_BRIDG...
[ 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 9 ], [ 11 ], [ 17, 19, 21, 23, 25, 27, 29, 31 ], [ 33 ] ]
10,313
static void get_slice_data(ProresContext *ctx, const uint16_t *src, int linesize, int x, int y, int w, int h, DCTELEM *blocks, uint16_t *emu_buf, int mbs_per_slice, int blocks_per_mb, int is_chroma) { const uint16_t *esrc; co...
false
FFmpeg
cee03436e6f1e3d4893841698e73caa92f2a53c9
static void get_slice_data(ProresContext *ctx, const uint16_t *src, int linesize, int x, int y, int w, int h, DCTELEM *blocks, uint16_t *emu_buf, int mbs_per_slice, int blocks_per_mb, int is_chroma) { const uint16_t *esrc; co...
{ "code": [], "line_no": [] }
static void FUNC_0(ProresContext *VAR_0, const uint16_t *VAR_1, int VAR_2, int VAR_3, int VAR_4, int VAR_5, int VAR_6, DCTELEM *VAR_7, uint16_t *VAR_8, int VAR_9, int VAR_10, int VAR_11) { const uint16_t *VAR_12; const int VA...
[ "static void FUNC_0(ProresContext *VAR_0, const uint16_t *VAR_1,\nint VAR_2, int VAR_3, int VAR_4, int VAR_5, int VAR_6,\nDCTELEM *VAR_7, uint16_t *VAR_8,\nint VAR_9, int VAR_10, int VAR_11)\n{", "const uint16_t *VAR_12;", "const int VAR_13 = 4 * VAR_10;", "int VAR_14;", "int VAR_15, VAR_16, VAR_17;", "fo...
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[ [ 1, 3, 5, 7, 9 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 21 ], [ 23 ], [ 25, 27 ], [ 29 ], [ 31 ], [ 33 ], [ 35 ], [ 37 ], [ 39 ], [ 41 ], [ 45 ], [ 47 ], [ 51 ...
10,314
static always_inline void gen_farith3 (void *helper, int ra, int rb, int rc) { if (unlikely(rc == 31)) return; if (ra != 31) { if (rb != 31) tcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], cpu_fir[rb]); else { ...
false
qemu
a7812ae412311d7d47f8aa85656faadac9d64b56
static always_inline void gen_farith3 (void *helper, int ra, int rb, int rc) { if (unlikely(rc == 31)) return; if (ra != 31) { if (rb != 31) tcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], cpu_fir[rb]); else { ...
{ "code": [], "line_no": [] }
static always_inline void FUNC_0 (void *helper, int ra, int rb, int rc) { if (unlikely(rc == 31)) return; if (ra != 31) { if (rb != 31) tcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], cpu_fir[rb]); else { TCGv...
[ "static always_inline void FUNC_0 (void *helper,\nint ra, int rb, int rc)\n{", "if (unlikely(rc == 31))\nreturn;", "if (ra != 31) {", "if (rb != 31)\ntcg_gen_helper_1_2(helper, cpu_fir[rc], cpu_fir[ra], cpu_fir[rb]);", "else {", "TCGv tmp = tcg_const_i64(0);", "tcg_gen_helper_1_2(helper, cpu_fir[rc], cp...
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10,315
static bool vfio_prereg_listener_skipped_section(MemoryRegionSection *section) { if (memory_region_is_iommu(section->mr)) { hw_error("Cannot possibly preregister IOMMU memory"); } return !memory_region_is_ram(section->mr) || memory_region_is_skip_dump(section->mr); }
false
qemu
21e00fa55f3fdfcbb20da7c6876c91ef3609b387
static bool vfio_prereg_listener_skipped_section(MemoryRegionSection *section) { if (memory_region_is_iommu(section->mr)) { hw_error("Cannot possibly preregister IOMMU memory"); } return !memory_region_is_ram(section->mr) || memory_region_is_skip_dump(section->mr); }
{ "code": [], "line_no": [] }
static bool FUNC_0(MemoryRegionSection *section) { if (memory_region_is_iommu(section->mr)) { hw_error("Cannot possibly preregister IOMMU memory"); } return !memory_region_is_ram(section->mr) || memory_region_is_skip_dump(section->mr); }
[ "static bool FUNC_0(MemoryRegionSection *section)\n{", "if (memory_region_is_iommu(section->mr)) {", "hw_error(\"Cannot possibly preregister IOMMU memory\");", "}", "return !memory_region_is_ram(section->mr) ||\nmemory_region_is_skip_dump(section->mr);", "}" ]
[ 0, 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 13, 15 ], [ 17 ] ]
10,318
static void gen_mtc0 (DisasContext *ctx, int reg, int sel) { const char *rn = "invalid"; switch (reg) { case 0: switch (sel) { case 0: gen_op_mtc0_index(); rn = "Index"; break; case 1: // gen_op_mtc0_mvpcontrol(); /* MT ASE *...
false
qemu
3a95e3a7d9a6fd7610fe483778ff7016d23be5ec
static void gen_mtc0 (DisasContext *ctx, int reg, int sel) { const char *rn = "invalid"; switch (reg) { case 0: switch (sel) { case 0: gen_op_mtc0_index(); rn = "Index"; break; case 1: rn = "MVPControl"; case 2:...
{ "code": [], "line_no": [] }
static void FUNC_0 (DisasContext *VAR_0, int VAR_1, int VAR_2) { const char *VAR_3 = "invalid"; switch (VAR_1) { case 0: switch (VAR_2) { case 0: gen_op_mtc0_index(); VAR_3 = "Index"; break; case 1: VAR_3 = "MVPControl"; ...
[ "static void FUNC_0 (DisasContext *VAR_0, int VAR_1, int VAR_2)\n{", "const char *VAR_3 = \"invalid\";", "switch (VAR_1) {", "case 0:\nswitch (VAR_2) {", "case 0:\ngen_op_mtc0_index();", "VAR_3 = \"Index\";", "break;", "case 1:\nVAR_3 = \"MVPControl\";", "case 2:\nVAR_3 = \"MVPConf0\";", "case 3:\...
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10,319
static void test_native_list_integer_helper(TestInputVisitorData *data, const void *unused, UserDefNativeListUnionKind kind) { UserDefNativeListUnion *cvalue = NULL; Visitor *v; GString *gstr_list = g_string_new(""...
false
qemu
b3db211f3c80bb996a704d665fe275619f728bd4
static void test_native_list_integer_helper(TestInputVisitorData *data, const void *unused, UserDefNativeListUnionKind kind) { UserDefNativeListUnion *cvalue = NULL; Visitor *v; GString *gstr_list = g_string_new(""...
{ "code": [], "line_no": [] }
static void FUNC_0(TestInputVisitorData *VAR_0, const void *VAR_1, UserDefNativeListUnionKind VAR_2) { UserDefNativeListUnion *cvalue = NULL; Visitor *v; GString *gstr_list = g_string_new(""); GString *gstr_un...
[ "static void FUNC_0(TestInputVisitorData *VAR_0,\nconst void *VAR_1,\nUserDefNativeListUnionKind VAR_2)\n{", "UserDefNativeListUnion *cvalue = NULL;", "Visitor *v;", "GString *gstr_list = g_string_new(\"\");", "GString *gstr_union = g_string_new(\"\");", "int VAR_3;", "for (VAR_3 = 0; VAR_3 < 32; VAR_3+...
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10,320
pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri) { int i; uint32_t txr_len_log2, rxr_len_log2; uint32_t req_ring_size, cmp_ring_size; m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT; if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES) || (ri->cmpRingNumP...
false
qemu
7f61f4690dd153be98900a2a508b88989e692753
pvscsi_ring_init_data(PVSCSIRingInfo *m, PVSCSICmdDescSetupRings *ri) { int i; uint32_t txr_len_log2, rxr_len_log2; uint32_t req_ring_size, cmp_ring_size; m->rs_pa = ri->ringsStatePPN << VMW_PAGE_SHIFT; if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES) || (ri->cmpRingNumP...
{ "code": [], "line_no": [] }
FUNC_0(PVSCSIRingInfo *VAR_0, PVSCSICmdDescSetupRings *VAR_1) { int VAR_2; uint32_t txr_len_log2, rxr_len_log2; uint32_t req_ring_size, cmp_ring_size; VAR_0->rs_pa = VAR_1->ringsStatePPN << VMW_PAGE_SHIFT; if ((VAR_1->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES) || (VAR_1->cm...
[ "FUNC_0(PVSCSIRingInfo *VAR_0, PVSCSICmdDescSetupRings *VAR_1)\n{", "int VAR_2;", "uint32_t txr_len_log2, rxr_len_log2;", "uint32_t req_ring_size, cmp_ring_size;", "VAR_0->rs_pa = VAR_1->ringsStatePPN << VMW_PAGE_SHIFT;", "if ((VAR_1->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)\n|| (VAR_1->cmpRing...
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10,321
static bool check_overlapping_aiocb(BDRVSheepdogState *s, SheepdogAIOCB *aiocb) { SheepdogAIOCB *cb; QLIST_FOREACH(cb, &s->inflight_aiocb_head, aiocb_siblings) { if (AIOCBOverlapping(aiocb, cb)) { return true; } } QLIST_INSERT_HEAD(&s->inflight_aiocb_head, aiocb, ...
false
qemu
acf6e5f0962c4be670d4a93ede77423512521876
static bool check_overlapping_aiocb(BDRVSheepdogState *s, SheepdogAIOCB *aiocb) { SheepdogAIOCB *cb; QLIST_FOREACH(cb, &s->inflight_aiocb_head, aiocb_siblings) { if (AIOCBOverlapping(aiocb, cb)) { return true; } } QLIST_INSERT_HEAD(&s->inflight_aiocb_head, aiocb, ...
{ "code": [], "line_no": [] }
static bool FUNC_0(BDRVSheepdogState *s, SheepdogAIOCB *aiocb) { SheepdogAIOCB *cb; QLIST_FOREACH(cb, &s->inflight_aiocb_head, aiocb_siblings) { if (AIOCBOverlapping(aiocb, cb)) { return true; } } QLIST_INSERT_HEAD(&s->inflight_aiocb_head, aiocb, aiocb_siblings); ...
[ "static bool FUNC_0(BDRVSheepdogState *s, SheepdogAIOCB *aiocb)\n{", "SheepdogAIOCB *cb;", "QLIST_FOREACH(cb, &s->inflight_aiocb_head, aiocb_siblings) {", "if (AIOCBOverlapping(aiocb, cb)) {", "return true;", "}", "}", "QLIST_INSERT_HEAD(&s->inflight_aiocb_head, aiocb, aiocb_siblings);", "return fal...
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10,323
static void qio_channel_websock_finalize(Object *obj) { QIOChannelWebsock *ioc = QIO_CHANNEL_WEBSOCK(obj); buffer_free(&ioc->encinput); buffer_free(&ioc->encoutput); buffer_free(&ioc->rawinput); buffer_free(&ioc->rawoutput); object_unref(OBJECT(ioc->master)); if (ioc->io_tag) { ...
false
qemu
8dfd5f96515ca20c4eb109cb0ee28e2bb32fc505
static void qio_channel_websock_finalize(Object *obj) { QIOChannelWebsock *ioc = QIO_CHANNEL_WEBSOCK(obj); buffer_free(&ioc->encinput); buffer_free(&ioc->encoutput); buffer_free(&ioc->rawinput); buffer_free(&ioc->rawoutput); object_unref(OBJECT(ioc->master)); if (ioc->io_tag) { ...
{ "code": [], "line_no": [] }
static void FUNC_0(Object *VAR_0) { QIOChannelWebsock *ioc = QIO_CHANNEL_WEBSOCK(VAR_0); buffer_free(&ioc->encinput); buffer_free(&ioc->encoutput); buffer_free(&ioc->rawinput); buffer_free(&ioc->rawoutput); object_unref(OBJECT(ioc->master)); if (ioc->io_tag) { g_source_rem...
[ "static void FUNC_0(Object *VAR_0)\n{", "QIOChannelWebsock *ioc = QIO_CHANNEL_WEBSOCK(VAR_0);", "buffer_free(&ioc->encinput);", "buffer_free(&ioc->encoutput);", "buffer_free(&ioc->rawinput);", "buffer_free(&ioc->rawoutput);", "object_unref(OBJECT(ioc->master));", "if (ioc->io_tag) {", "g_source_remo...
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10,324
static av_cold int vaapi_encode_h265_init_internal(AVCodecContext *avctx) { static const VAConfigAttrib default_config_attributes[] = { { .type = VAConfigAttribRTFormat, .value = VA_RT_FORMAT_YUV420 }, { .type = VAConfigAttribEncPackedHeaders, .value = (VA_ENC_PACKED_HEAD...
false
FFmpeg
c8241e730f116f1c9cfc0b34110aa7f052e05332
static av_cold int vaapi_encode_h265_init_internal(AVCodecContext *avctx) { static const VAConfigAttrib default_config_attributes[] = { { .type = VAConfigAttribRTFormat, .value = VA_RT_FORMAT_YUV420 }, { .type = VAConfigAttribEncPackedHeaders, .value = (VA_ENC_PACKED_HEAD...
{ "code": [], "line_no": [] }
static av_cold int FUNC_0(AVCodecContext *avctx) { static const VAConfigAttrib VAR_0[] = { { .type = VAConfigAttribRTFormat, .value = VA_RT_FORMAT_YUV420 }, { .type = VAConfigAttribEncPackedHeaders, .value = (VA_ENC_PACKED_HEADER_SEQUENCE | VA_ENC_PAC...
[ "static av_cold int FUNC_0(AVCodecContext *avctx)\n{", "static const VAConfigAttrib VAR_0[] = {", "{ .type = VAConfigAttribRTFormat,", ".value = VA_RT_FORMAT_YUV420 },", "{ .type = VAConfigAttribEncPackedHeaders,", ".value = (VA_ENC_PACKED_HEADER_SEQUENCE |\nVA_ENC_PACKED_HEADER_SLICE) },", "};", "V...
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10,325
void qmp_migrate_set_downtime(double value, Error **errp) { value *= 1e9; value = MAX(0, MIN(UINT64_MAX, value)); max_downtime = (uint64_t)value; }
false
qemu
2ff30257974e19ebe2a97baad32ac29c06da5fb9
void qmp_migrate_set_downtime(double value, Error **errp) { value *= 1e9; value = MAX(0, MIN(UINT64_MAX, value)); max_downtime = (uint64_t)value; }
{ "code": [], "line_no": [] }
void FUNC_0(double VAR_0, Error **VAR_1) { VAR_0 *= 1e9; VAR_0 = MAX(0, MIN(UINT64_MAX, VAR_0)); max_downtime = (uint64_t)VAR_0; }
[ "void FUNC_0(double VAR_0, Error **VAR_1)\n{", "VAR_0 *= 1e9;", "VAR_0 = MAX(0, MIN(UINT64_MAX, VAR_0));", "max_downtime = (uint64_t)VAR_0;", "}" ]
[ 0, 0, 0, 0, 0 ]
[ [ 1, 3 ], [ 5 ], [ 7 ], [ 9 ], [ 11 ] ]
10,326
static void qemu_cpu_kick_thread(CPUState *env) { #ifndef _WIN32 int err; err = pthread_kill(env->thread->thread, SIG_IPI); if (err) { fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); exit(1); } #else /* _WIN32 */ if (!qemu_cpu_is_self(env)) { SuspendThre...
false
qemu
1ecf47bf0a091700e45f1b7d1f5ad85abc0acd22
static void qemu_cpu_kick_thread(CPUState *env) { #ifndef _WIN32 int err; err = pthread_kill(env->thread->thread, SIG_IPI); if (err) { fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); exit(1); } #else if (!qemu_cpu_is_self(env)) { SuspendThread(env->thre...
{ "code": [], "line_no": [] }
static void FUNC_0(CPUState *VAR_0) { #ifndef _WIN32 int VAR_1; VAR_1 = pthread_kill(VAR_0->thread->thread, SIG_IPI); if (VAR_1) { fprintf(stderr, "qemu:%s: %s", __func__, strerror(VAR_1)); exit(1); } #else if (!qemu_cpu_is_self(VAR_0)) { SuspendThread(VAR_0->th...
[ "static void FUNC_0(CPUState *VAR_0)\n{", "#ifndef _WIN32\nint VAR_1;", "VAR_1 = pthread_kill(VAR_0->thread->thread, SIG_IPI);", "if (VAR_1) {", "fprintf(stderr, \"qemu:%s: %s\", __func__, strerror(VAR_1));", "exit(1);", "}", "#else\nif (!qemu_cpu_is_self(VAR_0)) {", "SuspendThread(VAR_0->thread->th...
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[ [ 1, 3 ], [ 5, 7 ], [ 11 ], [ 13 ], [ 15 ], [ 17 ], [ 19 ], [ 21, 23 ], [ 25 ], [ 27 ], [ 29 ], [ 31 ], [ 33, 35 ] ]
10,328
void helper_evaluate_flags_alu_4(void) { uint32_t src; uint32_t dst; uint32_t res; uint32_t flags = 0; src = env->cc_src; dst = env->cc_dest; /* Reconstruct the result. */ switch (env->cc_op) { case CC_OP_SUB: res = dst - src; break; case CC_OP_ADD: res = dst + src; break;...
false
qemu
a8cf66bb393ff420d40ae172a4c817bf2752918a
void helper_evaluate_flags_alu_4(void) { uint32_t src; uint32_t dst; uint32_t res; uint32_t flags = 0; src = env->cc_src; dst = env->cc_dest; switch (env->cc_op) { case CC_OP_SUB: res = dst - src; break; case CC_OP_ADD: res = dst + src; break; default: res = env->cc...
{ "code": [], "line_no": [] }
void FUNC_0(void) { uint32_t src; uint32_t dst; uint32_t res; uint32_t flags = 0; src = env->cc_src; dst = env->cc_dest; switch (env->cc_op) { case CC_OP_SUB: res = dst - src; break; case CC_OP_ADD: res = dst + src; break; default: res = env->cc_result; break; ...
[ "void FUNC_0(void)\n{", "uint32_t src;", "uint32_t dst;", "uint32_t res;", "uint32_t flags = 0;", "src = env->cc_src;", "dst = env->cc_dest;", "switch (env->cc_op)\n{", "case CC_OP_SUB:\nres = dst - src;", "break;", "case CC_OP_ADD:\nres = dst + src;", "break;", "default:\nres = env->cc_res...
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10,329
static void pmac_ide_atapi_transfer_cb(void *opaque, int ret) { DBDMA_io *io = opaque; MACIOIDEState *m = io->opaque; IDEState *s = idebus_active_if(&m->bus); int unaligned; if (ret < 0) { m->aiocb = NULL; qemu_sglist_destroy(&s->sg); ide_atapi_io_error(s, ret); ...
false
qemu
4be746345f13e99e468c60acbd3a355e8183e3ce
static void pmac_ide_atapi_transfer_cb(void *opaque, int ret) { DBDMA_io *io = opaque; MACIOIDEState *m = io->opaque; IDEState *s = idebus_active_if(&m->bus); int unaligned; if (ret < 0) { m->aiocb = NULL; qemu_sglist_destroy(&s->sg); ide_atapi_io_error(s, ret); ...
{ "code": [], "line_no": [] }
static void FUNC_0(void *VAR_0, int VAR_1) { DBDMA_io *io = VAR_0; MACIOIDEState *m = io->VAR_0; IDEState *s = idebus_active_if(&m->bus); int VAR_2; if (VAR_1 < 0) { m->aiocb = NULL; qemu_sglist_destroy(&s->sg); ide_atapi_io_error(s, VAR_1); io->VAR_3 = 0;...
[ "static void FUNC_0(void *VAR_0, int VAR_1)\n{", "DBDMA_io *io = VAR_0;", "MACIOIDEState *m = io->VAR_0;", "IDEState *s = idebus_active_if(&m->bus);", "int VAR_2;", "if (VAR_1 < 0) {", "m->aiocb = NULL;", "qemu_sglist_destroy(&s->sg);", "ide_atapi_io_error(s, VAR_1);", "io->VAR_3 = 0;", "goto do...
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10,330
static void pit_reset(void *opaque) { PITState *pit = opaque; PITChannelState *s; int i; for(i = 0;i < 3; i++) { s = &pit->channels[i]; s->mode = 3; s->gate = (i != 2); pit_load_count(s, 0); } }
false
qemu
64d7e9a421fea0ac50b44541f5521de455e7cd5d
static void pit_reset(void *opaque) { PITState *pit = opaque; PITChannelState *s; int i; for(i = 0;i < 3; i++) { s = &pit->channels[i]; s->mode = 3; s->gate = (i != 2); pit_load_count(s, 0); } }
{ "code": [], "line_no": [] }
static void FUNC_0(void *VAR_0) { PITState *pit = VAR_0; PITChannelState *s; int VAR_1; for(VAR_1 = 0;VAR_1 < 3; VAR_1++) { s = &pit->channels[VAR_1]; s->mode = 3; s->gate = (VAR_1 != 2); pit_load_count(s, 0); } }
[ "static void FUNC_0(void *VAR_0)\n{", "PITState *pit = VAR_0;", "PITChannelState *s;", "int VAR_1;", "for(VAR_1 = 0;VAR_1 < 3; VAR_1++) {", "s = &pit->channels[VAR_1];", "s->mode = 3;", "s->gate = (VAR_1 != 2);", "pit_load_count(s, 0);", "}", "}" ]
[ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
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