repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
svsm | github_2023 | others | 390 | coconut-svsm | stefano-garzarella | @@ -39,13 +39,21 @@ pub struct SevIdBlockBuilder {
impl SevIdBlockBuilder {
pub fn build(igvm: &IgvmFile, measure: &IgvmMeasure) -> Result<Self, Box<dyn Error>> {
- let ld = measure.digest();
let compatibility_mask = get_compatibility_mask(igvm, IgvmPlatformType::SEV_SNP).ok_or(
Str... | What about using `copy_from_slice`?
```suggestion
ld.copy_from_slice(&digest);
``` |
svsm | github_2023 | others | 390 | coconut-svsm | stefano-garzarella | @@ -128,14 +129,17 @@ pub struct IgvmMeasure {
show_progress: bool,
check_kvm: bool,
native_zero: bool,
- digest: [u8; 48],
+ digest_snp: [u8; 48],
+ digest_es: Sha256,
+ digest: Vec<u8>, | I haven't looked in detail, but could we make it so that we only have `digest: Vec<u8>`? |
svsm | github_2023 | others | 390 | coconut-svsm | stefano-garzarella | @@ -39,13 +39,15 @@ pub struct SevIdBlockBuilder {
impl SevIdBlockBuilder {
pub fn build(igvm: &IgvmFile, measure: &IgvmMeasure) -> Result<Self, Box<dyn Error>> {
- let ld = measure.digest();
let compatibility_mask = get_compatibility_mask(igvm, IgvmPlatformType::SEV_SNP).ok_or(
Str... | Should we put back the check on the length as you did in the previous version?
copy_from_slice() should panic if the two slices have different sizes. |
svsm | github_2023 | others | 356 | coconut-svsm | deeglaze | @@ -10,19 +10,22 @@
pub enum SvsmPlatformType {
Native = 0,
Snp = 1,
+ Tdp = 2, | What's Tdp? Not meant to be Tdx? |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -24,6 +29,10 @@ pub struct CmdOptions {
#[arg(short, long)]
pub firmware: Option<String>,
+ /// Platform to generate IGVM file for | This makes it impossible to build a multi-platform IGVM file, as only one platform can be selected here. It would be much better to have --snp and --tdx as options that are not mutually exclusive, just like --native is already an optional platform target argument that creates multi-platform files. It would be reasona... |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -0,0 +1,80 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (C) 2024 Intel Corporation
+//
+// Author: Peter Fang <peter.fang@intel.com>
+
+use crate::address::{PhysAddr, VirtAddr};
+use crate::cpu::percpu::PerCpu;
+use crate::error::SvsmError;
+use crate::io::IOPort;
+use crate::platform::{PageEn... | Shouldn't this include the shared GPA bit 47? I understand this code isn't actually used for anything yet, but we might as well get the obvious stuff right from the beginning. |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -62,9 +61,9 @@ impl IgvmBuilder {
// revision.
let mut use_igvm_v2 = false;
- // SNP is always included in the compatibility mask regardless of the
+ // SNP/TDP is always included in the compatibility mask regardless of the | I think we'd like to avoid forcing the inclusion of any specific platform. I think a better approach would be to default to no platforms and require specific command-line options for every platform that should be included. The IGVM builder should generate an error if no platforms are selected. Then the Makefile can ... |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -36,16 +36,30 @@ else
BUILD_FW =
endif
+PLATFORM ?= sev-snp
+ifeq ($(PLATFORM), tdp)
+BUILD_PLATFORM = --stage1 bin/stage1-trampoline.bin | Since your change intends to include TDP by default in the generated IGVM file, then shouldn't this also be built by default without requiring a specific `PLATFORM=` argument? |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -253,6 +244,17 @@ impl IgvmBuilder {
},
));
}
+ if COMPATIBILITY_MASK.contains(TDP_COMPATIBILITY_MASK) {
+ self.platforms.push(IgvmPlatformHeader::SupportedPlatform(
+ IGVM_VHS_SUPPORTED_PLATFORM {
+ compatibility_mask: TDP_CO... | The value for `shared_gpa_boundary` must be architecturally valid for TDX, but you're just copying the SNP value of 1<<46. I think you will need to design the file to have two different parameter blocks, one for SNP and one for TDX, which have different VTOM values. Alternatively, you could decide that the VTOM param... |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -68,16 +82,16 @@ $(IGVMBUILDER):
$(IGVMMEASURE):
cargo build ${CARGO_ARGS} --target=x86_64-unknown-linux-gnu -p igvmmeasure
-bin/coconut-qemu.igvm: $(IGVMBUILDER) $(IGVMMEASURE) bin/svsm-kernel.elf bin/stage2.bin ${FS_BIN}
- $(IGVMBUILDER) --sort --policy 0x30000 --output $@ --stage2 bin/stage2.bin --kernel bin... | Stage 1 needs to be included in the Hyper-V command line as well as the QEMU command line. |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -391,6 +393,11 @@ impl IgvmBuilder {
)?;
}
+ // Add optional stage 1 binary.
+ if let Some(stage1) = &self.options.stage1 {
+ self.add_data_pages_from_file(&stage1.clone(), self.gpa_map.stage1_image.get_start())?; | The stage 1 image must only be included for TDP platforms, not for SNP platforms. Since the desire is to create a multi-platform IGVM file, the stage 1 TDP image will be included on the command line even if SNP is available as a target platform. But including stage 1 for SNP will cause the IGVM file to fail to load, ... |
svsm | github_2023 | others | 356 | coconut-svsm | msft-jlange | @@ -8,6 +8,10 @@ use clap::{Parser, ValueEnum};
#[derive(Parser, Debug)]
pub struct CmdOptions {
+ /// Optional stage 1 binary file
+ #[arg(long)]
+ pub stage1: Option<String>, | Now that this file has been made specific to TDX, I wonder if we should rename this parameter to `--tdx-stage1` or something similar. I can envision that in the future, there may be another platform that requires use of a stage 1, which must be a different binary than the TDX stage 1, and we don't want any collision t... |
svsm | github_2023 | others | 356 | coconut-svsm | stefano-garzarella | @@ -32,8 +32,9 @@ use crate::stage2_stack::Stage2Stack;
use crate::vmsa::{construct_start_context, construct_vmsa};
use crate::GpaMap;
-pub const SNP_COMPATIBILITY_MASK: u32 = 1;
-pub const NATIVE_COMPATIBILITY_MASK: u32 = 2;
+pub const SNP_COMPATIBILITY_MASK: u32 = 1u32 << 0;
+pub const NATIVE_COMPATIBILITY_MASK: ... | nit: I would have made these changes in a separate patch |
svsm | github_2023 | others | 356 | coconut-svsm | stefano-garzarella | @@ -158,7 +168,7 @@ clippy:
clean:
cargo clean
rm -f stage1/*.o stage1/*.bin stage1/*.elf
- rm -f ${STAGE1_OBJS} utils/gen_meta utils/print-meta
+ rm -f utils/gen_meta utils/print-meta | Why we don't need to remove `${STAGE1_OBJS}` anymore? |
svsm | github_2023 | others | 387 | coconut-svsm | msft-jlange | @@ -108,31 +107,6 @@ impl PerCpuAreas {
}
}
-#[derive(Copy, Clone, Debug, Default)]
-pub struct VmsaRef { | I'm a little reluctant to lose all of the information associated with the VMSA. Today, the `guest_owned` field is not used, and the `paddr` is only needed in a couple of specific places where the VMSA is created or bound. However, in the future, when we support a paravisor mode in addition to the SVSM mode, it will b... |
svsm | github_2023 | others | 387 | coconut-svsm | msft-jlange | @@ -311,13 +285,20 @@ impl PerCpuShared {
const _: () = assert!(size_of::<PerCpu>() <= PAGE_SIZE);
+/// CPU-local data.
+///
+/// This type is not [`Sync`], as its contents will only be accessed from the
+/// local CPU, much like thread-local data in an std environment. The only
+/// part of the struct that may be... | Once the SVSM VMSA has been allocated and initialized, it can never be changed again. Perhaps `OnceCell` would be more appropriate here to eliminate the possibility that any code tries to change the VMSA.
It is also the case that once the VMSA has been initialized and communicated to the host, it can never even be ... |
svsm | github_2023 | others | 388 | coconut-svsm | roy-hopkins | @@ -236,7 +236,16 @@ $ make test
Unit tests can be run inside the SVSM by
```
-$ QEMU=/path/to/qemu OVMF=/path/to/firmware/ make test-in-svsm
+$ QEMU=/path/to/qemu make test-in-svsm
+```
+
+Note: to compile the test kernel used for unit tests, we use the nightly
+toolchain, so if the test kernel build fails, try in... | Typo: `nighlty`. |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -734,4 +734,78 @@ impl LocalApic {
}
}
}
+
+ fn handoff_to_host(&mut self) {
+ let hv_doorbell = this_cpu().hv_doorbell().unwrap();
+ let descriptor = &hv_doorbell.per_vmpl[GUEST_VMPL - 1];
+ // Establish the IRR as holding multiple vectors regardless of the
+ ... | Should self.irr[0] be `anded` with `0x8000 0000` instead of `0x8000` to check for vector 31?
While at vector 31, can you please clarify its usage? Both AMD and Intel spec state vector 31 as reserved. |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -21,13 +21,40 @@ pub struct HVDoorbellFlags {
pub no_further_signal: bool,
}
+#[bitfield(u32)]
+pub struct HVExtIntStatus {
+ pub pending_vector: u8,
+ pub nmi_pending: bool,
+ pub mc_pending: bool,
+ pub level_sensitive: bool,
+ #[bits(3)]
+ rsvd_13_11: u32,
+ pub multiple_vectors: bool... | From the alternate injection spec, it looks like extended interrupt descriptor for VMPL1 is between `64-95` bytes and only contains IRR info. Is there a newer version of spec where bytes `96-127 ` represent ISR info? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -21,13 +21,40 @@ pub struct HVDoorbellFlags {
pub no_further_signal: bool,
}
+#[bitfield(u32)]
+pub struct HVExtIntStatus {
+ pub pending_vector: u8,
+ pub nmi_pending: bool,
+ pub mc_pending: bool,
+ pub level_sensitive: bool,
+ #[bits(3)]
+ rsvd_13_11: u32,
+ pub multiple_vectors: bool... | should `reserved_31_4` -> `reserved_63_4`? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -0,0 +1,166 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::platform::guest_cpu::GuestCpuState;
+
+#[derive(Clone, Copy, Debug, Default)]
+pub struct LocalApic {
+ irr: [u32; 8],
+ isr_stack_index: usiz... | Sorry if I overlooked but is `interrupt_delivered` is set anywhere? I only see it being initialized to `false`. |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -306,12 +317,14 @@ impl LocalApic {
// Mark this interrupt in-service. It will be recalled if
// the ISR is examined again before the interrupt is actually
// delivered.
- self.remove_irr(irq);
+ Self::remove_vector_register(&mut self.... | Should it should be `!`Self::test_vector_register(&self.tmr, irq) right? As lazy EOI is not possible for level-sensitive interrupts. |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -227,17 +279,47 @@ impl LocalApic {
if (irq & 0xF0) > (current_priority & 0xF0) {
// Determine whether this interrupt can be injected
// immediately. If not, queue it for delivery when possible.
- if !self.deliver_interrupt_immediately(irq, cpu_state) {
... | Should this setting ` self.lazy_eoi_pending = true` be removed as it is set again after checking from calling area? Also, comment may need to be updated? |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -117,6 +129,76 @@ impl SvsmPlatform for SnpPlatform {
pvalidate_range(region, PvalidateOp::Invalid)
}
+ fn configure_alternate_injection(&mut self, alt_inj_requested: bool) -> Result<(), SvsmError> {
+ // If alternate injection was requested, then it must be supported by
+ // the hyp... | ```suggestion
current_ghcb().hv_ipi(icr)
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -117,6 +129,76 @@ impl SvsmPlatform for SnpPlatform {
pvalidate_range(region, PvalidateOp::Invalid)
}
+ fn configure_alternate_injection(&mut self, alt_inj_requested: bool) -> Result<(), SvsmError> {
+ // If alternate injection was requested, then it must be supported by
+ // the hyp... | `SvsmError` is already imported, so simply:
```suggestion
return Err(SvsmError::NotSupported);
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | We can simply add `repr(u64)` and implement these conversions with the `From` trait.
```suggestion
#[repr(u64)]
#[derive(Debug, PartialEq)]
enum IcrDestFmt {
Dest = 0,
OnlySelf = 1,
AllWithSelf = 2,
AllButSelf = 3,
}
impl From<IcrDestFmt> for u64 {
fn from(val: IcrDestFmt) -> Self {
... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | Same thing here, use `repr(u64)` and `From` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | ```suggestion
/// Scan to find the highest pending IRR vector.
fn scan_irr(&self) -> u8 {
for (i, irr) in self.irr.into_iter().enumerate().rev() {
if irr != 0 {
let bit_index = 31 - irr.leading_zeros();
let vector = (i as u32) * 32 + bit_index;
... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | Using `checked_sub()` (and using a safe array accessor) is probably more readable:
```suggestion
let stack_index = self.isr_stack_index.checked_sub(1).unwrap();
assert!(self.isr_stack.get(stack_index) == Some(irq));
Self::insert_vector_register(&mut self.irr, irq);
self.isr_stack_... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | If `caa_addr` is None you can just return early with `?`:
```suggestion
let virt_addr = caa_addr?;
let calling_area = GuestPtr::<SvsmCaa>::new(virt_addr);
// Ignore errors here, since nothing can be done if an error occurs.
if let Ok(caa) = calling_area.read() {
let _... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | ```suggestion
for (i, irr) in self.irr.iter_mut().enumerate() {
*irr |= cpu_shared.ipi_irr_vector(i);
}
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,851 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::ghcb::current_ghcb;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{get_current_apic_id,... | ```suggestion
for irq in self.isr_stack.into_iter().take(self.isr_stack_index) {
if (usize::from(irq >> 5)) == index {
value |= 1 << (irq & 0x1F)
}
}
``` |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -4,12 +4,98 @@
//
// Author: Jon Lange (jlange@microsoft.com)
+use crate::cpu::percpu::PerCpuShared;
use crate::platform::guest_cpu::GuestCpuState;
-#[derive(Clone, Copy, Debug, Default)]
+use bitfield_struct::bitfield;
+
+const APIC_REGISTER_APIC_ID: u64 = 0x802;
+const APIC_REGISTER_TPR: u64 = 0x808;
+const... | Aren't bits `16-17 (remote_read_status)` reserved? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -393,6 +410,128 @@ impl LocalApic {
self.update_required = true;
}
+ fn send_logical_ipi(&mut self, icr: ApicIcr) -> bool {
+ let vector = icr.vector();
+ let mut signal = false;
+
+ // Check whether the current CPU matches the destination.
+ let destination = icr.desti... | If current cpu matches the logical destination, can the code return instead of checking other cpus? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -449,4 +457,102 @@ impl LocalApic {
self.allowed_irr[index] &= !mask;
}
}
+
+ fn signal_one_host_interrupt(&mut self, vector: u8) {
+ let index = (vector >> 5) as usize;
+ let mask = 1 << (vector & 31); | Nit: Not sure if this is an issue but for uniformity in the patch it may be better to `1` -> `1u32`? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -165,4 +251,117 @@ impl LocalApic {
self.update_required = true;
}
}
+
+ fn get_isr(&self, index: usize) -> u32 {
+ let mut value = 0;
+ for i in 0..self.isr_stack_index {
+ if (usize::from(self.isr_stack[i] >> 5)) == index {
+ value |= 1 << (self... | Nit: `1` -> `1u32`? |
svsm | github_2023 | others | 368 | coconut-svsm | vijaydhanraj | @@ -167,4 +253,117 @@ impl LocalApic {
self.update_required = true;
}
}
+
+ fn get_isr(&self, index: usize) -> u32 {
+ let mut value = 0;
+ for isr in self.isr_stack.into_iter().take(self.isr_stack_index) {
+ if (usize::from(isr >> 5)) == index {
+ v... | I think this might be a typo, `APIC_REGISTER_IRR_0` -> `APIC_REGISTER_ISR_0`? |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -221,6 +221,10 @@ impl IgvmBuilder {
kernel_size: self.gpa_map.kernel.get_size() as u32,
kernel_base: self.gpa_map.kernel.get_start(),
vtom,
+ use_alternate_injection: match self.options.alt_injection {
+ true => 1,
+ false => 0,
+ ... | [`u8` implements `From<bool>`](https://doc.rust-lang.org/std/primitive.u8.html#impl-From%3Cbool%3E-for-u8)
```suggestion
use_alternate_injection: u8::from(self.options.alt_injection),
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,103 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::cpu::percpu::this_cpu;
+use crate::platform::SVSM_PLATFORM;
+use crate::protocols::errors::SvsmReqError;
+use crate::protocols::RequestParams;
+
+co... | We're already performing this check in `apic_protocol_request()`, I'd say it's redundant, since the function is not pub. Same thing with a few of the other APIC request handling functions. |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,850 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{current_ghcb, this_cpu, PerCpuShared, PERCPU_AREAS};
+use... | ```suggestion
let tpr = u8::try_from(value).ok_or(ApicError::ApicError)?;
cpu_state.set_tpr(tpr);
Ok(())
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,850 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{current_ghcb, this_cpu, PerCpuShared, PERCPU_AREAS};
+use... | Same here, lets make it more concise:
```suggestion
let value = u8::try_from(value).ok_or(ApicError::ApicError)?;
self.post_interrupt(value);
Ok(())
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,850 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{current_ghcb, this_cpu, PerCpuShared, PERCPU_AREAS};
+use... | Let's return early here, e.g.
```rust
// Ignore events other than for the guest VMPL.
if vmpl_event_mask & (1 << (GUEST_VMPL - 1)) == 0 {
return;
}
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,850 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{current_ghcb, this_cpu, PerCpuShared, PERCPU_AREAS};
+use... | Let's return early here, e.g.
```rust
if (irq & 0xF0) <= (current_priority & 0xF0) {
return;
}
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -0,0 +1,850 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use crate::address::VirtAddr;
+use crate::cpu::idt::common::INT_INJ_VECTOR;
+use crate::cpu::percpu::{current_ghcb, this_cpu, PerCpuShared, PERCPU_AREAS};
+use... | Let's return early here, e.g.
```rust
if self.isr_stack_index == 0 {
return;
}
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -53,6 +57,10 @@ impl PerCpuInfo {
cpu_shared,
}
}
+
+ pub fn unwrap(&self) -> &'static PerCpuShared {
+ self.cpu_shared
+ } | Let's name this something else, it's too similar to `Option::unwrap()` or `Result::unwrap()`. |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -201,18 +214,39 @@ impl GuestVmsaRef {
#[derive(Debug)]
pub struct PerCpuShared {
+ apic_id: u32,
guest_vmsa: SpinLock<GuestVmsaRef>,
online: AtomicBool,
+ ipi_irr: [AtomicU32; 8],
+ ipi_pending: AtomicBool,
+ nmi_pending: AtomicBool,
}
impl PerCpuShared {
- fn new() -> Self {
+ f... | ```suggestion
ipi_irr: core::array::from_fn(|_| AtomicU32::new(0)),
``` |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -270,6 +330,8 @@ pub struct PerCpu {
runqueue: RefCell<RunQueue>,
/// WaitQueue for request processing
request_waitqueue: RefCell<WaitQueue>,
+ /// Local APIC state for APIC emulation
+ apic: RefCell<LocalApic>, | I wonder if we should have it be `RefCell<Option<LocalApic>>`. That way the type itself conveys whether APIC emulation is enabled, so we could get rid of the `apic_emulation` field. This would also force callers to check the `Option`, avoiding future mistakes where the `apic_emulation` field is not checked.
Enabling... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -426,6 +489,19 @@ impl PerCpu {
Ok(())
}
+ pub fn hv_doorbell(&self) -> Option<&'static HVDoorbell> {
+ unsafe {
+ let hv_doorbell = self.hv_doorbell.get();
+ if hv_doorbell.is_null() {
+ None
+ } else {
+ // The HV doorbell pag... | [`as_ref()`](https://doc.rust-lang.org/std/primitive.pointer.html#method.as_ref) already does the null check for us:
```suggestion
// SAFETY: The HV doorbell page can only ever be borrowed shared, never
// mutable, and can safely have a static lifetime.
unsafe {
self.hv_doorbe... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -614,6 +699,69 @@ impl PerCpu {
Ok(())
}
+ pub fn disable_apic_emulation(&self) -> Result<(), SvsmError> {
+ if self.apic_emulation.get() {
+ // APIC emulation cannot be disabled if the platform has locked
+ // the use of APIC emulation.
+ SVSM_PLATFORM.as_d... | We could return early here, but also with the change I proposed around wrapping `LocalApic` in an `Option` it looks even better:
```rust
pub fn disable_apic_emulation(&self) -> Result<(), SvsmError> {
let Some(apic) = self.apic.borrow_mut().take() else {
return Ok(());
};
// ...
Ok(())
... |
svsm | github_2023 | others | 368 | coconut-svsm | 00xc | @@ -614,6 +699,69 @@ impl PerCpu {
Ok(())
}
+ pub fn disable_apic_emulation(&self) -> Result<(), SvsmError> {
+ if self.apic_emulation.get() {
+ // APIC emulation cannot be disabled if the platform has locked
+ // the use of APIC emulation.
+ SVSM_PLATFORM.as_d... | For example, here we are not performing the emulation enablement check, which looks inconsistent compared to other methods. It's fine, because we are doing it in the request handling function (`apic_read_register()`), and before that in `apic_protocol_request()`, before calling into this method, but you can see why it'... |
svsm | github_2023 | others | 366 | coconut-svsm | Freax13 | @@ -186,20 +196,14 @@ impl IDT {
unsafe {
asm!("lidt (%rax)", in("rax") &desc, options(att_syntax));
}
-
- self
}
+}
+impl ReadLockGuard<'static, IDT> {
pub fn base_limit(&self) -> (u64, u32) {
- let base = (self as *const IDT) as u64;
+ let base: *const I... | ```suggestion
let base: *const IDT = self;
```
Unless your intention is to be explicit, `core::ptr::from_ref` isn't required for converting a reference to its pointer type. |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -45,14 +45,10 @@ impl StackUnwinder {
options(att_syntax));
};
- let (top_of_init_stack, top_of_df_stack, current_stack) = unsafe {
- let cpu_unsafe = &*this_cpu_unsafe();
- (
- cpu_unsafe.get_top_of_stack(),
- cpu_unsafe.get_top... | This appears to be subject to reentrancy problems. The stack unwinder can be called from the panic handler, and the panic handler can be invoked while the current CPU is mutably borrowed. The reference to `this_cpu()` would create a borrow conflict resulting in a nested panic. The reason I put the stack limits into ... |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -250,154 +249,108 @@ impl PerCpuShared {
}
}
+const _: () = assert!(size_of::<PerCpu>() <= PAGE_SIZE);
+
#[derive(Debug)]
-pub struct PerCpuUnsafe {
+pub struct PerCpu {
shared: PerCpuShared,
- private: RefCell<PerCpu>,
- ghcb: *mut GHCB,
- hv_doorbell: *mut HVDoorbell,
- init_stack: Option... | It would be really helpful to have comments about why some of these fields are not protected with a `Cell`. While I suspect it has to do with which structures support interior mutability and can always be accessed through a shared reference, this fact is not immediately clear from reading the code here. |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -250,154 +249,108 @@ impl PerCpuShared {
}
}
+const _: () = assert!(size_of::<PerCpu>() <= PAGE_SIZE);
+
#[derive(Debug)]
-pub struct PerCpuUnsafe {
+pub struct PerCpu {
shared: PerCpuShared, | Is `PerCpuShared` still necessary if the entire structure is shared-only? I pushed this initially so that cross-CPU access (via shared references) was always possible even if the owning CPU held a mutable reference, but now that this is no longer possible, it seems like we no longer need a separate structure. |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -250,154 +249,108 @@ impl PerCpuShared {
}
}
+const _: () = assert!(size_of::<PerCpu>() <= PAGE_SIZE);
+
#[derive(Debug)]
-pub struct PerCpuUnsafe {
+pub struct PerCpu {
shared: PerCpuShared,
- private: RefCell<PerCpu>,
- ghcb: *mut GHCB,
- hv_doorbell: *mut HVDoorbell,
- init_stack: Option... | Can we reconsider whether to keep this unsafe accessor? This is written this way largely to follow the `PerCpuUnsafe` pattern, but the `HVDoorbell` structure is marked as `const` (and handles its own interior mutability through `Sync`-safe structures like atomics) so changing this to return a `&'static HVDoorbell` wou... |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -250,154 +249,108 @@ impl PerCpuShared {
}
}
+const _: () = assert!(size_of::<PerCpu>() <= PAGE_SIZE);
+
#[derive(Debug)]
-pub struct PerCpuUnsafe {
+pub struct PerCpu {
shared: PerCpuShared,
- private: RefCell<PerCpu>,
- ghcb: *mut GHCB,
- hv_doorbell: *mut HVDoorbell,
- init_stack: Option... | Does this actually need a `Cell`? I believe this is only ever written to while the CPU is being constructed, at which point a mutable reference should be safe (because it cannot possibly be referenced by anyone other than the constructing code). Once the CPU is constructed, and becomes visible in multiple placesk, th... |
svsm | github_2023 | others | 372 | coconut-svsm | msft-jlange | @@ -16,27 +15,22 @@ use crate::utils::immut_after_init::immut_after_init_set_multithreaded;
fn start_cpu(platform: &dyn SvsmPlatform, apic_id: u32, vtom: u64) {
let start_rip: u64 = (start_ap as *const u8) as u64;
- let mut percpu = PerCpu::alloc(apic_id).expect("Failed to allocate AP per-cpu data"); | I'm not convinced this is the right approach. During construction, when the CPU is not visible to other threads, it seems perfectly reasonable for this reference to be mutable to facilitate construction. The existing code makes this unnecessarily messy by having `PerCpu::alloc()` take responsibility for inserting the... |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -36,6 +39,23 @@ impl<const T: usize> FixedString<T> {
pub fn length(&self) -> usize {
self.len
}
+
+ pub fn as_str(&self) -> String {
+ let mut terminator = false;
+ let s: String = self
+ .data
+ .iter()
+ .filter(|c| {
+ if termina... | Actually `FixedString` implements `fmt::Display`, which automatically includes an implementation for `to_string()`, so this method is not needed:
https://doc.rust-lang.org/std/fmt/trait.Display.html
|
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -1489,26 +1498,32 @@ impl Elf64LoadSegments {
///
/// # Parameters
/// - `segment`: An [`Elf64AddrRange`] representing the address range of the segment to insert.
+ /// - `file_range`: An [`Elf64FileRange`] representing the range of the segment being inserted.
/// - `phdr_index`: An [`Elf64Hal... | This is breaking tests I think |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -35,8 +35,10 @@ pub enum SvsmError {
Acpi,
// Errors from file systems
FileSystem(FsError),
- // Task management errors,
+ // Task management errors
Task(TaskError),
// Errors from #VC handler
Vc(VcError),
+ // Errors related to modules | ```suggestion
// Errors related to loadable modules
``` |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | ```suggestion
let Ok(mut m) = Module::load(path.as_str()) else {
log::info!("Module {} load failed", path);
continue;
}
create_task_for_module(&mut m, 0, None)?;
modules.push(m);
log::info!("Module {} loaded ok", path);
... |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | I think we can derive Clone, Copy and Debug here |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | This avoids a clone of the `Arc`:
```suggestion
let task_node = self.task_node.insert(task_node);
let mut task = task_node.task.lock_write();
``` |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | I think this deserves a comment explaining the conversion. |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | Nit: the compiler can already infer the `SegmentInfo` generic. |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -0,0 +1,140 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Roy Hopkins <rhopkins@suse.de>
+
+extern crate alloc;
+
+use crate::address::VirtAddr;
+use crate::cpu::percpu::this_cpu_mut;
+use crate::elf;
+use crate::error::SvsmError;
+use crate::fs::{list_dir... | Same here, the compiler can infer the generic. |
svsm | github_2023 | others | 158 | coconut-svsm | 00xc | @@ -260,6 +279,28 @@ impl Task {
self.vm_kernel_range.handle_page_fault(vaddr, write)
}
+ pub fn vmr_user(&mut self) -> &mut VMR {
+ &mut self.vm_user_range
+ }
+
+ pub fn virtual_alloc(
+ &mut self,
+ size_bytes: usize,
+ _alignment: usize,
+ ) -> Result<VirtAddr... | ```suggestion
todo!("Implement virtual_free");
``` |
svsm | github_2023 | others | 377 | coconut-svsm | msft-jlange | @@ -163,7 +165,8 @@ pub fn sev_status_verify() {
| SEVStatusFlags::REST_INJ
| SEVStatusFlags::PREV_HOST_IBS
| SEVStatusFlags::BTB_ISOLATION
- | SEVStatusFlags::VMSA_REG_PROT;
+ | SEVStatusFlags::VMSA_REG_PROT
+ | SEVStatusFlags::SMT_PROT; | Enabling register protection will cause the guest VMSA contents to be scrambled such that they are unusable without significant extra code, which I don't see as part of this PR. It is not safe to declare this feature as supported without having such code in the SVSM or else nothing will work. |
svsm | github_2023 | others | 377 | coconut-svsm | stefano-garzarella | @@ -78,7 +78,17 @@ pub fn init_svsm_vmsa(vmsa: &mut VMSA, vtom: u64) {
vmsa.vmpl = 0;
vmsa.vtom = vtom;
- vmsa.sev_features = sev_flags().as_sev_features();
+ let sev_status = sev_flags();
+
+ if sev_status.contains(SEVStatusFlags::VMSA_REG_PROT) {
+ let nonce = rdrand::RdRand::new() | IIRC when I tried `rdrand/rdseed` from that crate (some months ago) I had an issue with SVSM, since they use `cpuid` to check if the instruction is supported, but in SVSM we didn't support `cpuid`, so I added a `new_unchecked()` API: https://github.com/nagisa/rust_rdrand/pull/21
Is `rdrand::RdRand::new()` working we... |
svsm | github_2023 | others | 364 | coconut-svsm | p4zuu | @@ -384,28 +384,24 @@ impl GHCB {
Ok(())
}
- fn write_buffer<T>(&mut self, data: &T, offset: isize) -> Result<(), GhcbError>
+ fn write_buffer<T>(&mut self, data: &T, offset: usize) -> Result<(), GhcbError>
where
- T: Sized,
+ T: Copy,
{
- let size: isize = mem::size... | Would it make sense to also check the alignment of `data`? In other words, could the caller trick this to give something not T-aligned? |
svsm | github_2023 | others | 358 | coconut-svsm | 00xc | @@ -0,0 +1,210 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2024 Intel Corporation
+//
+// Author: Chuanxiao Dong <chuanxiao.dong@intel.com>
+
+use super::decode::OpCodeBytes;
+use bitflags::bitflags;
+
+bitflags! {
+ #[derive(Clone, Copy, Debug, Default, PartialEq)]
+ pub struct OpCode... | Please add some documentation for pub items like these |
svsm | github_2023 | others | 358 | coconut-svsm | 00xc | @@ -0,0 +1,377 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Thomas Leroy <tleroy@suse.de>
+
+use super::decode::DecodedInsnCtx;
+use super::{InsnError, InsnMachineCtx};
+use crate::types::Bytes;
+
+/// An immediate value in an instruction
+#[derive(Clone, Co... | Could you move this outside the test module and gate it behind `#[cfg(any(test, fuzzing))]`? This way if you make it `pub` we should be able to import it from the fuzzing harness. |
svsm | github_2023 | others | 358 | coconut-svsm | 00xc | @@ -0,0 +1,377 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2022-2023 SUSE LLC
+//
+// Author: Thomas Leroy <tleroy@suse.de>
+
+use super::decode::DecodedInsnCtx;
+use super::{InsnError, InsnMachineCtx};
+use crate::types::Bytes;
+
+/// An immediate value in an instruction
+#[derive(Clone, Co... | Any reason we're not using static dispatch here?
```diff
diff --git a/kernel/src/insn_decode/decode.rs b/kernel/src/insn_decode/decode.rs
index 6097fef..bd3c871 100644
--- a/kernel/src/insn_decode/decode.rs
+++ b/kernel/src/insn_decode/decode.rs
@@ -133,7 +133,7 @@ impl CpuMode {
}
}
-fn get_cpu_mod... |
svsm | github_2023 | others | 358 | coconut-svsm | 00xc | @@ -0,0 +1,746 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2024 Intel Corporation.
+//
+// Author: Chuanxiao Dong <chuanxiao.dong@intel.com>
+//
+// The instruction decoding is implemented by refering instr_emul.c
+// from the Arcn project, with some modifications. A copy of license
+// is i... | Style nitpick:
```suggestion
self.bytes
.get(self.nr_processed)
.copied()
.ok_or(InsnError::InsnPeek)
``` |
svsm | github_2023 | others | 338 | coconut-svsm | 00xc | @@ -94,6 +99,20 @@ pub fn early_idt_init() {
pub fn idt_init() {
// Set IST vectors
init_ist_vectors();
+
+ // Capture an address that can be used by assembly code to read the #HV
+ // doorbell page. The address of each CPU's doorbell page may be
+ // different, but the address of the field in the ... | We can just do this if we set `HV_DOORBELL_ADDR` to be `static mut`.
```suggestion
unsafe {
let global_ref = ptr::addr_of_mut!(HV_DOORBELL_ADDR);
*global_ref = (*this_cpu_unsafe()).hv_doorbell_addr();
}
``` |
svsm | github_2023 | others | 338 | coconut-svsm | cxdong | @@ -25,51 +31,183 @@
pushq %r15
.endm
-.macro pop_regs
- popq %r15
- popq %r14
- popq %r13
- popq %r12
- popq %r11
- popq %r10
- popq %r9
- popq %r8
- popq %rbp
- popq %rdi
- popq %rsi
- po... | I was going through the default_return, and it seems to me that a "push $0" may be needed here (representing an error code). I might be missing something, please correct me if my understanding is wrong. "push_regs" pushes 15 registers, but default_return checks CS from 17*8(rsp) and "begin_iret_return" increases the rs... |
svsm | github_2023 | others | 338 | coconut-svsm | cxdong | @@ -445,6 +458,32 @@ impl PerCpu {
}
}
+ pub fn setup_hv_doorbell(&self) -> Result<(), SvsmError> {
+ let paddr = allocate_zeroed_page()?;
+ let ghcb = &mut current_ghcb();
+ if let Err(e) = HVDoorbell::init(paddr, ghcb) {
+ free_page(paddr);
+ return Err(e)... | Wondering if this is something feasible to be implemented in the platform abstraction layer? |
svsm | github_2023 | others | 338 | coconut-svsm | 00xc | @@ -94,6 +99,20 @@ pub fn early_idt_init() {
pub fn idt_init() {
// Set IST vectors
init_ist_vectors();
+
+ // Capture an address that can be used by assembly code to read the #HV
+ // doorbell page. The address of each CPU's doorbell page may be
+ // different, but the address of the field in the ... | Now that I think about it, is there any reason why we're not just doing this?
```rust
HV_DOORBELL_ADDR = (*this_cpu_unsafe()).hv_doorbell_addr();
```
For some reason I thought `HV_DOORBELL_ADDR` was an extern symbol, but it just being a global we can just directly assign. |
svsm | github_2023 | others | 338 | coconut-svsm | roy-hopkins | @@ -33,4 +44,46 @@ impl HVDoorbell {
Ok(())
}
+
+ pub fn process_pending_events(&self) {
+ // Clear the NoFurtherSignal bit before processing. If any additional
+ // signal comes in after processing has commenced, it may be missed by
+ // this loop, but it will be detected when ... | Reading through the GHCB specification and particularly the host pseudocode in section 5.5.1, it looks like this loop may not work as expected.
Firstly, `no_further_signal` is cleared above before reading the vector and exchanging it with zero. This means that if a further NMI is pending then another #HV can be issu... |
svsm | github_2023 | others | 354 | coconut-svsm | vijaydhanraj | @@ -115,8 +116,12 @@ impl SvsmPlatform for SnpPlatform {
}
fn eoi(&self) {
- // 0x80E is the X2APIC EOI MSR.
- // Errors here cannot be handled but should not be grounds for panic.
- let _ = current_ghcb().wrmsr(0x80E, 0);
+ // Issue an explicit EOI unless no explicit EOI is requ... | Both AMD and Intel SDM mention X2APIC EOI MSR address as `0x80B`. Is `0x80E` intentional? |
svsm | github_2023 | others | 354 | coconut-svsm | vijaydhanraj | @@ -75,6 +76,43 @@ impl HVDoorbell {
common_isr_handler(vector as usize);
}
}
+
+ pub fn no_eoi_required(&self) -> bool {
+ // Check to see if the "no EOI required" flag is set to determine
+ // whether an explicit EOI can be avoided.
+ let mut no_eoi_required = self.n... | cleareed->cleared? |
svsm | github_2023 | others | 354 | coconut-svsm | vijaydhanraj | @@ -115,8 +116,12 @@ impl SvsmPlatform for SnpPlatform {
}
fn eoi(&self) {
- // 0x80E is the X2APIC EOI MSR.
- // Errors here cannot be handled but should not be grounds for panic.
- let _ = current_ghcb().wrmsr(0x80E, 0);
+ // Issue an explicit EOI unless no explicit EOI is requ... | Currently, code base has different implementations of write MSR like `write_msr()` and `wrmsr()`. Would implementing `wrmsr` as a platform abstracted trait function be better? |
svsm | github_2023 | others | 342 | coconut-svsm | stefano-garzarella | @@ -1,8 +1,10 @@
FEATURES ?= "default"
SVSM_ARGS = --features ${FEATURES}
-FEATURES_TEST ?= "default-test"
-SVSM_ARGS_TEST = --no-default-features --features ${FEATURES_TEST}
+SVSM_ARGS_TEST = --no-default-features
+ifdef FEATURES_TEST
+ SVSM_ARGS_TEST := ${SVSM_ARGS_TEST} --features ${FEATURES_TEST} | What about using `+=` to concatenate the new part?
```suggestion
SVSM_ARGS_TEST += --features ${FEATURES_TEST}
``` |
svsm | github_2023 | others | 272 | coconut-svsm | stefano-garzarella | @@ -214,23 +242,28 @@ pub enum Mapping<'a> {
Level0(&'a mut PTEntry),
}
+/// Page table structure containing a root page with multiple entries.
#[repr(C)]
#[derive(Default, Debug)]
pub struct PageTable {
root: PTPage,
}
impl PageTable {
+ /// Load the current page table into the CR3 register.
... | ```suggestion
/// parts.
///
/// # Errors
/// Returns `SvsmError` if the page cannot be allocated.
///
``` |
svsm | github_2023 | others | 272 | coconut-svsm | stefano-garzarella | @@ -296,6 +365,14 @@ impl PageTable {
};
}
+ /// Walks the page table to find a mapping for a given virtual address.
+ ///
+ /// # Parameters | ```suggestion
/// # Parameters
/// - `page`: A mutable reference to the root page table.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | stefano-garzarella | @@ -268,12 +326,22 @@ impl PageTable {
Some(unsafe { &mut *address.as_mut_ptr::<PTPage>() })
}
+ /// Walks a page table at level 0 to find a mapping.
+ ///
+ /// # Parameters
+ /// - `page`: A mutable reference to the root page table.
+ /// - `vaddr`: The virtual address to find a mapping... | Should we add `# Parameters` and `# Returns` section also here, or is it redundant?
Ditto for `walk_addr_lvl2` |
svsm | github_2023 | others | 272 | coconut-svsm | stefano-garzarella | @@ -307,6 +384,7 @@ impl PageTable {
};
}
+ /// Walk the virtual address and return the corresponding mapping. | ```suggestion
/// Walk the virtual address and return the corresponding mapping.
///
/// # Parameters
/// - `vaddr`: The virtual address to find a mapping for.
///
/// # Returns
/// A `Mapping` representing the found mapping.
///
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -192,6 +217,7 @@ impl Default for PTPage {
}
}
+/// Can be used to access page table entries by index.
impl Index<usize> for PTPage {
type Output = PTEntry; | This is a self-explanatory trait implementation, so I'd remove this. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -200,12 +226,14 @@ impl Index<usize> for PTPage {
}
}
+/// Can be used to modify page table entries by index.
impl IndexMut<usize> for PTPage {
fn index_mut(&mut self, index: usize) -> &mut PTEntry { | Same thing, I'd say this is self-explanatory. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -245,19 +282,44 @@ impl PageTable {
})
}
+ /// Copy an entry `entry` from another [`PageTable`]. | ```suggestion
/// Copy an entry at index `entry` from another [`PageTable`].
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -245,19 +282,44 @@ impl PageTable {
})
}
+ /// Copy an entry `entry` from another [`PageTable`].
pub fn copy_entry(&mut self, other: &PageTable, entry: usize) {
self.root.entries[entry] = other.root.entries[entry];
}
+ /// Allocates a zeroed page table and returns a mutable... | ```suggestion
/// Computes the index within a page table at level `L` for a
/// virtual address `vaddr`.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -431,6 +548,17 @@ impl PageTable {
Ok(())
}
+ /// Splits a page into 4KB pages if it is part of a larger mapping.
+ ///
+ /// # Parameters
+ /// - `mapping`: The mapping to split.
+ ///
+ /// # Returns
+ /// A result indicating success or an error code.
+ ///
+ /// # Errors... | This function signature is pretty self-explanatory I'd say.
```suggestion
/// Attempts to split a larger mapping into page-sized mappings.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -456,6 +584,17 @@ impl PageTable {
entry.set(set_c_bit(addr), flags);
}
+ /// Sets the shared state for a 4KB page.
+ ///
+ /// # Parameters
+ /// - `vaddr`: The virtual address of the page.
+ ///
+ /// # Returns
+ /// A result indicating success or an error code.
+ ///
+ /... | This is too verbose as well.
```suggestion
/// Attempts to clear the C-bit for the page at `vaddr`.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -480,6 +630,14 @@ impl PageTable {
}
}
+ /// Checks the mapping of a given virtual address.
+ ///
+ /// # Parameters
+ /// - `vaddr`: The virtual address to check.
+ ///
+ /// # Returns
+ /// An option containing the physical address if a mapping exists, or `None`.
+ /// | ```suggestion
/// Gets the physical address of for a mapped `vaddr`, or `None` if
/// no such mapping exists.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -865,6 +1238,13 @@ impl RawPageTablePart {
}
}
+ /// Unmaps a 2MB page.
+ ///
+ /// # Parameters
+ /// - `vaddr`: The virtual address of the mapping to unmap.
+ ///
+ /// # Returns
+ /// An optional [`PTEntry`] representing the unmapped page table entry.
pub fn unmap_2m(&mut... | Missing `# Panics` section. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -844,6 +1207,16 @@ impl RawPageTablePart {
}
}
+ /// Maps a 2MB page.
+ ///
+ /// # Parameters
+ /// - `vaddr`: The virtual address to map.
+ /// - `paddr`: The physical address to map to.
+ /// - `flags`: The flags to apply to the mapping.
+ /// - `shared`: Indicates whether the... | Missing `# Panics` section. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -767,18 +1083,40 @@ impl RawPageTablePart {
}
}
+ /// Frees the resources associated with this page table part.
fn free(&self) {
RawPageTablePart::free_lvl2(&self.page);
}
+ /// Gets the physical address `PhysAddr` of this page table part.
+ ///
+ /// # Returns
+ /... | ```suggestion
/// # Panics
/// Panics if `vaddr` corresponds to a level 3 mapping.
``` |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -756,6 +1068,10 @@ impl RawPageTablePart {
}
}
+ /// Frees a level 2 page table, including all level 1 tables beneath it.
+ ///
+ /// # Parameters
+ /// - `page`: A reference to the level 2 page table to be freed.
fn free_lvl2(page: &PTPage) { | I'd say `# Parameters` is overexplaining here. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -746,6 +1054,10 @@ impl RawPageTablePart {
Some(unsafe { &mut *address.as_mut_ptr::<PTPage>() })
}
+ /// Frees a level 1 page table.
+ ///
+ /// # Parameters
+ /// - `page`: A reference to the level 1 page table to be freed. | I'd say `# Parameters` is overexplaining here. |
svsm | github_2023 | others | 272 | coconut-svsm | 00xc | @@ -677,32 +930,65 @@ impl PageTable {
static INIT_PGTABLE: SpinLock<PageTableRef> = SpinLock::new(PageTableRef::unset());
+/// Sets the initial page table unless it is already set.
+///
+/// # Parameters
+/// - `pgtable`: The page table reference to set as the initial page table.
+///
+/// # Panics
+/// Panics if... | The function signature here is pretty self-explanatory, I'd remove the `# Returns`. |
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