repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
svsm | github_2023 | others | 625 | coconut-svsm | deeglaze | @@ -312,16 +313,17 @@ pub extern "C" fn svsm_main() {
populate_ram_fs(LAUNCH_INFO.kernel_fs_start, LAUNCH_INFO.kernel_fs_end)
.expect("Failed to unpack FS archive");
- let cpus = config.load_cpu_info().expect("Failed to load ACPI tables");
- let mut nr_cpus = 0;
-
- for cpu in cpus.iter() {
- ... | ```suggestion
// support the operation, get them from the config instead.
``` |
svsm | github_2023 | python | 621 | coconut-svsm | stefano-garzarella | @@ -647,13 +648,19 @@ def build(args):
build_one(recipe, helpers, args)
except FileNotFoundError as f:
- print(f"Error: {f}")
+ print(f"Error: {recipe}: {f}")
+ return False
except json.JSONDecodeError as e:
print(f"Error: {recipe}: {e}")
+ return False
... | Can you add a `Return` section in the function documentation (line 637, uff GH don't allow commenting on lines not touched) |
svsm | github_2023 | others | 620 | coconut-svsm | stefano-garzarella | @@ -2,7 +2,7 @@
//
// Copyright (c) 2022-2023 SUSE LLC
//
-// Authors: Joerg Roedel <jroedel@suse.de> | I'd suggest fixing this in another patch/PR.
While there, I think we have several occurrences to fix:
```
$ git grep Authors
kernel/src/cpu/idt/entry.S:// Authors: Joerg Roedel <jroedel@suse.de>
kernel/src/cpu/idt/svsm.rs:// Authors: Joerg Roedel <jroedel@suse.de>
kernel/src/cpu/x86/mod.rs:// Authors: Thomas ... |
svsm | github_2023 | others | 613 | coconut-svsm | joergroedel | @@ -1369,3 +1372,30 @@ pub fn process_requests() {
pub fn current_task() -> TaskPointer {
this_cpu().runqueue.lock_read().current_task()
}
+
+#[no_mangle]
+pub extern "C" fn cpu_idle_loop() {
+ // Start request processing on this CPU if required.
+ if SVSM_PLATFORM.start_svsm_request_loop() {
+ star... | Can we add the APIC id of the CPU to the task-names, maybe using `format!()`? |
svsm | github_2023 | others | 613 | coconut-svsm | joergroedel | @@ -181,7 +185,7 @@ pub fn request_loop() {
drop(guard);
} else {
log::debug!("No VMSA or CAA! Halting");
- halt();
+ go_idle(); | So this is a workaround until COCONUT gets a decent event system and IPIs on all platforms, right? |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -20,13 +22,39 @@ use crate::tdx::TdxError;
use crate::types::{PageSize, PAGE_SIZE};
use crate::utils::immut_after_init::ImmutAfterInitCell;
use crate::utils::{is_aligned, MemoryRegion};
+use bootlib::kernel_launch::{ApStartContext, SIPI_STUB_GPA};
+use core::arch::x86_64::_mm_sfence;
+use core::{mem, ptr};
#[c... | The store fences here are not required because Intel platforms guarantee that writes from one processor are always visible to other processors in the order they appear in the program. A store fence would only be required if a subsequent read in this routine could depend on another processor observing these stores comp... |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +250,32 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
+ movl ${MAILBOX_COMMAND_ADDR}, %ecx
+ movl ${MAILBOX_APICID_ADDR}, %edx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly here.
+ */
.... | These load fences are unnecessary for the same reason that the store fences are unnecessary (see my other comments). |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +250,32 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
+ movl ${MAILBOX_COMMAND_ADDR}, %ecx
+ movl ${MAILBOX_APICID_ADDR}, %edx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly here.
+ */
.... | This logic appears to assume that the VP index in RSI will always have the same value as the APIC ID. That is not the case on NUMA systems that do not have a power-of-two CPU count in each node. The NUMA APIC architecture specifies that the APIC ID is divided into some bits that represent the processor node and some ... |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +250,32 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
+ movl ${MAILBOX_COMMAND_ADDR}, %ecx
+ movl ${MAILBOX_APICID_ADDR}, %edx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly here.
+ */
.... | Why is it necessary to have both a command and a VP index? There is only one command, meaning "start", so isn't it sufficient for each vCPU to spin until it sees its APIC ID in the mailbox without also needing to compare a command identifier? |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -98,19 +110,16 @@ global_asm!(
orl %edx, %eax
movl %eax, 0xF6C(%edi)
- /* Signal APs */
- movl $setup_flag, %edi
- movl $1, (%edi)
jmp 2f
-.Lskip_paging_setup:
- movl $setup_flag, %edi
-.Lap_wait:
+ .Lskip_paging_setup:
+ movl $ap_flag, %edi | Why is this flag necessary? The BSP will never write a non-zero VP index into the mailbox until it is ready to start APs, so shouldn't the VP index check be enough to guarantee that all APs spin until they are ready to start? |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -98,19 +110,16 @@ global_asm!(
orl %edx, %eax
movl %eax, 0xF6C(%edi)
- /* Signal APs */
- movl $setup_flag, %edi
- movl $1, (%edi)
jmp 2f
-.Lskip_paging_setup:
- movl $setup_flag, %edi
-.Lap_wait:
+ .Lskip_paging_setup:
+ movl $ap_flag, %edi
+ .... | Can you add a `PAUSE` in the spin loop? There are scenarios in which this helps with spin loop management. |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +250,23 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
- .Lcheck_command:
- /* TODO */
- jmp .Lcheck_command
+ movl ${MAILBOX_VPIDX_ADDR}, %ecx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly... | Can you add a `PAUSE` here as well? |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -43,6 +46,7 @@ use svsm::utils::{is_aligned, MemoryRegion};
use release::COCONUT_VERSION;
extern "C" {
+ static mut ap_flag: u32; | You might consider making this `static ap_flag: AtomicU32`. If you change the later store to read `ap_flag.store(1, Ordering::Release)` then you can avoid the use of `unsafe` (and you will also not need to worry about compiler ordering). |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -98,19 +110,18 @@ global_asm!(
orl %edx, %eax
movl %eax, 0xF6C(%edi)
- /* Signal APs */
- movl $setup_flag, %edi
- movl $1, (%edi)
jmp 2f
-.Lskip_paging_setup:
- movl $setup_flag, %edi
-.Lap_wait:
+ .Lskip_paging_setup:
+ movl $ap_flag, %edi
+ .... | ```suggestion
pause
jz .Lap_wait_for_env
```
There's nothing wrong with executing `PAUSE` if the loop isn't taken; `PAUSE` hint exiting occurs when the same `PAUSE` is run too many times in a row. If you follow my suggestion, you can drop an extra branch and make the code tighter. |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +251,26 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
- .Lcheck_command:
- /* TODO */
- jmp .Lcheck_command
+ movl ${MAILBOX_VPIDX_ADDR}, %ecx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly... | ```suggestion
pause
jne .Lap_wait_for_signal
```
Same as earlier suggestion. |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -241,9 +251,26 @@ global_asm!(
test %esi, %esi
jz .Lbsp_main
- .Lcheck_command:
- /* TODO */
- jmp .Lcheck_command
+ movl ${MAILBOX_VPIDX_ADDR}, %ecx
+
+ /*
+ * The following wait-for-signal code must be written in asm because
+ * APs run stacklessly... | ```suggestion
cmpl (%ecx), %esi
```
You can compare directly with memory and save the extra load. |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -98,19 +110,18 @@ global_asm!(
orl %edx, %eax
movl %eax, 0xF6C(%edi)
- /* Signal APs */
- movl $setup_flag, %edi
- movl $1, (%edi)
jmp 2f
-.Lskip_paging_setup:
- movl $setup_flag, %edi
-.Lap_wait:
+ .Lskip_paging_setup:
+ movl $ap_flag, %edi
+ .... | ```suggestion
cmpl (%edi), $0
```
It's better to perform the comparison in a single instruction instead of load followed by a compare. This code predates your change, but you may as well clean it up while you're in this code. |
svsm | github_2023 | others | 598 | coconut-svsm | msft-jlange | @@ -22,13 +24,33 @@ use crate::tdx::TdxError;
use crate::types::{PageSize, PAGE_SIZE};
use crate::utils::immut_after_init::ImmutAfterInitCell;
use crate::utils::{is_aligned, MemoryRegion};
+use bootlib::kernel_launch::{ApStartContext, SIPI_STUB_GPA};
+use core::{mem, ptr};
#[cfg(test)]
use bootlib::platform::Svs... | I find that `packed` creates compilation issues because the compiler will assume that all fields are unaligned (which isn't true), and therefore `packed` should only be used if it's really necessary. A structure that has only a single field will never encounter packing issues, so it clearly isn't necessary. But it's ... |
svsm | github_2023 | others | 592 | coconut-svsm | peterfang | @@ -150,7 +150,7 @@ impl SvsmPlatform for TdpPlatform {
}
fn configure_alternate_injection(&mut self, _alt_inj_requested: bool) -> Result<(), SvsmError> {
- Err(TdxError::Unimplemented.into())
+ Ok(()) | Do we need to make sure `alt_inj_requested` isn't `true`? I'm not quite sure what to do if for some odd reason this was requested in the IGVM file. |
svsm | github_2023 | others | 595 | coconut-svsm | joergroedel | @@ -34,19 +35,19 @@ impl Console {
static WRITER: SpinLock<Console> = SpinLock::new(Console {
writer: &DEFAULT_SERIAL_PORT,
});
-static CONSOLE_INITIALIZED: ImmutAfterInitCell<bool> = ImmutAfterInitCell::new(false);
+static CONSOLE_INITIALIZED: AtomicBool = AtomicBool::new(false);
static CONSOLE_SERIAL: ImmutAf... | `Ordering::Relaxed` is okay because the write to `WRITER` is locked separately, right? Please add a comment here as a reminder. |
svsm | github_2023 | others | 595 | coconut-svsm | joergroedel | @@ -52,141 +42,136 @@ pub enum ImmutAfterInitError {
/// # use svsm::utils::immut_after_init::ImmutAfterInitCell;
/// static X: ImmutAfterInitCell<i32> = ImmutAfterInitCell::uninit();
/// pub fn main() {
-/// unsafe { X.init(&123) };
-/// assert_eq!(*X, 123);
-/// }
-/// ```
-///
-/// Also, to support early/... | I think this requires `Ordering::Acquire` to make sure all changes before the `Ordering::Release` store in `complete_init` are visible. |
svsm | github_2023 | others | 595 | coconut-svsm | joergroedel | @@ -52,141 +42,136 @@ pub enum ImmutAfterInitError {
/// # use svsm::utils::immut_after_init::ImmutAfterInitCell;
/// static X: ImmutAfterInitCell<i32> = ImmutAfterInitCell::uninit();
/// pub fn main() {
-/// unsafe { X.init(&123) };
-/// assert_eq!(*X, 123);
-/// }
-/// ```
-///
-/// Also, to support early/... | I am not sure about this `Ordering::Relaxed` either, as I have seen the compiler eliminating an `Ordering::Acquire` load in favor of a previous `Ordering::Release` load. |
svsm | github_2023 | others | 601 | coconut-svsm | peterfang | @@ -0,0 +1,16 @@
+// SPDX-License-Identifier: MIT
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange <jlange@microsoft.com>
+
+pub const APIC_MSR_EOI: u32 = 0x80B;
+pub const APIC_MSR_ISR: u32 = 0x810;
+pub const APIC_MSR_ICR: u32 = 0x830;
+
+// Returns the MSR offset and bitmask to identify a specif... | nit: I believe the following would suffice since Rust always truncates in this case
```suggestion
let index = vector as u8;
``` |
svsm | github_2023 | others | 590 | coconut-svsm | msft-jlange | @@ -75,6 +75,19 @@ impl IgvmParams<'_> {
}
pub fn find_kernel_region(&self) -> Result<MemoryRegion<PhysAddr>, SvsmError> {
+ // First check the memory map if there's a paravisor region to use. | I don't think this can safely be done first. The contents of the IGVM memory map are untrusted (they are provided by the host) which means that examining this list first will give the host the opportunity to override any region specifically chosen in the IGVM file, even if the guest is expecting to use the specificall... |
svsm | github_2023 | others | 590 | coconut-svsm | msft-jlange | @@ -75,6 +75,19 @@ impl IgvmParams<'_> {
}
pub fn find_kernel_region(&self) -> Result<MemoryRegion<PhysAddr>, SvsmError> {
+ // First check the memory map if there's a paravisor region to use.
+ for entry in self.igvm_memory_map.memory_map.iter() {
+ if entry.entry_type == MemoryMap... | This logic will always latch onto the first memory region that is described in the memory map as reserved for the paravisor. Is that the right choice? Is it better to find the biggest region? Regardless of what choice is made, there should be a comment to acknowledge the fact that since the memory map is untrusted, ... |
svsm | github_2023 | others | 581 | coconut-svsm | joergroedel | @@ -0,0 +1,83 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) 2024 Microsoft Corporation
+//
+// Author: Jon Lange <jlange@microsoft.com>
+
+use bootlib::kernel_launch::SIPI_STUB_GPA;
+use igvm::IgvmDirectiveHeader;
+use igvm_defs::{IgvmPageDataFlags, IgvmPageDataType, PAGE_SIZE_4K};
+
+pub fn a... | When moving to a state closer to a non-draft PR this array should be generated (ideally via `build.rs`). I suggest having an `trampoline.s` file and build a binary out of that which can then be included into one of SVSMs `.s` files. This will make this code much more maintainable. |
svsm | github_2023 | others | 581 | coconut-svsm | joergroedel | @@ -172,6 +181,35 @@ impl SvsmPlatform for NativePlatform {
return hyperv_start_cpu(cpu, context);
}
- todo!();
+ // Translate this context into an AP start context and place it it in
+ // the AP startup transition page.
+ let ap_context = create_ap_start_context(cont... | The low-level APIC accesses should happen in the APIC code. |
svsm | github_2023 | others | 581 | coconut-svsm | peterfang | @@ -180,6 +189,35 @@ impl SvsmPlatform for NativePlatform {
return hyperv_start_cpu(cpu, context);
}
- todo!();
+ // Translate this context into an AP start context and place it it in
+ // the AP startup transition page.
+ let ap_context = create_ap_start_context(cont... | This can be replaced with `PerCPUPageMappingGuard::create_4k()` |
svsm | github_2023 | others | 581 | coconut-svsm | peterfang | @@ -46,6 +50,69 @@ pub fn start_secondary_cpus(platform: &dyn SvsmPlatform, cpus: &[ACPICPUInfo]) {
log::info!("Brought {} AP(s) online", count);
}
+#[no_mangle]
+fn start_ap_setup() {
+ // Initialize the GDT, TSS, and IDT.
+ this_cpu().load_gdt_tss(true);
+ idt().load();
+}
+
+extern "C" {
+ fn sta... | Is it possible to avoid using a hypervisor-specific structure here and instead use a hypervisor-agnostic one? |
svsm | github_2023 | others | 574 | coconut-svsm | 00xc | @@ -239,6 +239,7 @@ fn vtpm_command_request(params: &RequestParams) -> Result<(), SvsmReqError> {
return Err(SvsmReqError::unsupported_call());
}
+ // SAFETY: vaddr is just mapped, and its size is PAGE_SIZE
let buffer = unsafe { from_raw_parts_mut(vaddr.as_mut_ptr::<u8>(), PAGE_SIZE) }; | Is this truly safe though? Isn't this a shared buffer? Creating a mutable reference to it is unsound if the contents can be modified by the guest. |
svsm | github_2023 | others | 574 | coconut-svsm | 00xc | @@ -45,7 +59,29 @@ pub extern "C" fn calloc(items: c_ulong, size: c_ulong) -> *mut c_void {
pub unsafe extern "C" fn realloc(p: *mut c_void, size: c_ulong) -> *mut c_void {
let ptr = p as *mut u8;
let new_size = size as usize;
+
+ if p.is_null() {
+ return malloc(size);
+ }
+
if let Some(la... | We can probably de-indent this, e.g.
```rust
let Some(layout) = layout_from_ptr(ptr) else {
return ptr::null_mut();
};
if new_size == 0 {
// SAFETY: layout_from_ptr() call ensures that `ptr` was allocated
// with this allocator and we are using the same `layout` used to
// allocate `ptr`.
... |
svsm | github_2023 | others | 588 | coconut-svsm | joergroedel | @@ -137,6 +171,11 @@ pub struct Task {
/// Page table that is loaded when the task is scheduled
pub page_table: SpinLock<PageBox<PageTable>>,
+ /// Virtual address region that has been allocated for this task.
+ /// This is not referenced but must be stored so that it is dropped when
+ /// the Task... | Suggestion for a follow-on change: Reference this member by reading the start and end addresses from it where needed and avoid the redundant struct members for that. |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use core::sync::atomic::{AtomicU64, Ordering};
+
+/// Represents a set of CPUs, based on CPU index. A maximum of 1024 CPUs can
+/// be represented.
+#[derive(... | I think it is better to derive the `16` from a global `MAX_CPUS` constant, so that it can easily be changed. |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,566 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use super::apic::{ApicIcr, IcrDestFmt};
+use super::cpuset::{AtomicCpuSet, CpuSet};
+use super::idt::common::IPI_VECTOR;
+use super::percpu::this_cpu;
+use sup... | That is a rather big data structure (128 bytes or 2 cache lines), would it be more efficient to disallow `Copy` and `Clone` and force this to be passed around by reference? |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,566 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use super::apic::{ApicIcr, IcrDestFmt};
+use super::cpuset::{AtomicCpuSet, CpuSet};
+use super::idt::common::IPI_VECTOR;
+use super::percpu::this_cpu;
+use sup... | Request `Copy` trait here? Also true for the other `copy_*` methods. |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,566 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use super::apic::{ApicIcr, IcrDestFmt};
+use super::cpuset::{AtomicCpuSet, CpuSet};
+use super::idt::common::IPI_VECTOR;
+use super::percpu::this_cpu;
+use sup... | This can cause rather expensive copies for each function call, is it better to just borrow `IpiTarget`? |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,107 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use core::ops::{Deref, DerefMut};
+
+/// `ScopedRef` and `ScopedMut` are designed to solve the problem of managing
+/// lifetimes of references created from po... | Typo `enfoce` -> `enforce` |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,161 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use core::sync::atomic::{AtomicU64, Ordering};
+
+pub const MAX_CPUS: usize = 1024;
+
+/// Represents a set of CPUs, based on CPU index. A maximum of `MAX_CPU... | The array size needs to take `MAX_CPUS` into account. |
svsm | github_2023 | others | 579 | coconut-svsm | joergroedel | @@ -0,0 +1,623 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+//
+// Copyright (c) Microsoft Corporation
+//
+// Author: Jon Lange (jlange@microsoft.com)
+
+use super::apic::{ApicIcr, IcrDestFmt};
+use super::cpuset::{AtomicCpuSet, CpuSet};
+use super::idt::common::IPI_VECTOR;
+use super::percpu::this_cpu;
+use sup... | Turns out that the `SnpPlatform` assumes IRQs supported when it finds restricted injection enabled. Unfortunately this does not hold true with our latest development environment on the KVM side (which enables restricted injection, but has not yet full IRQ support). So these test-cases run on KVM as well and panic the t... |
svsm | github_2023 | others | 587 | coconut-svsm | joergroedel | @@ -41,6 +44,11 @@ impl NativePlatform {
impl Default for NativePlatform {
fn default() -> Self {
+ // Execution is not possible unless X2APIC is supported.
+ let features = CpuidResult::get(1, 0);
+ if (features.ecx & 0x200000) == 0 {
+ panic!("X2APIC is not supported");
+ ... | The SVSM really needs a proper CPU feature checking framework. No need to implement it in this PR, though. |
svsm | github_2023 | others | 568 | coconut-svsm | joergroedel | @@ -344,11 +345,28 @@ pub extern "C" fn common_isr_handler_entry(vector: usize) {
cpu.irqs_pop_nesting();
}
-pub fn common_isr_handler(_vector: usize) {
- // Interrupt injection requests currently require no processing; they occur
- // simply to ensure an exit from the guest.
+pub fn common_isr_handler(ve... | Please introduce an inline helper to calculate the IRQ priority to improve readability. There is also another place in this PR where this needs to be used. |
svsm | github_2023 | others | 568 | coconut-svsm | joergroedel | @@ -87,8 +121,10 @@ pub fn irqs_disabled() -> bool {
pub struct IrqState {
/// IRQ state when count was `0`
state: AtomicBool,
- /// Depth of IRQ-disabled nesting
- count: AtomicIsize,
+ /// Depth of IRQ-disabled nesting. Index 0 specifies the count of
+ /// IRQ disables and the remaining indice... | It is already in the comment, but to further improve readability please introduce a constant for the `16`. Something along the lines of `IRQ_PRIORITY_COUNT`. |
svsm | github_2023 | others | 572 | coconut-svsm | 00xc | @@ -100,17 +100,23 @@ fn invalidate_boot_memory_region(
config: &SvsmConfig<'_>,
region: MemoryRegion<PhysAddr>,
) -> Result<(), SvsmError> {
+ // Caller must ensure the memory region's starting address is page-aligned
+ let valid_region = MemoryRegion::new(region.start(), page_align_up(region.len()));... | I think these already do the right thing underneath, right? They go through the region in jumps of at least `PAGE_SIZE`, so even if the end is not page-aligned, the full page will be invalidated / updated. |
svsm | github_2023 | others | 572 | coconut-svsm | joergroedel | @@ -100,17 +100,23 @@ fn invalidate_boot_memory_region(
config: &SvsmConfig<'_>,
region: MemoryRegion<PhysAddr>,
) -> Result<(), SvsmError> {
+ // Caller must ensure the memory region's starting address is page-aligned
+ let valid_region = MemoryRegion::new(region.start(), page_align_up(region.len())); | The naming is a bit unfortunate, can you rename it to `aligned_region`? |
svsm | github_2023 | others | 567 | coconut-svsm | joergroedel | @@ -28,6 +28,9 @@
"objcopy": "binary"
}
},
+ "firmware": {
+ "env": "FW_FILE"
+ }, | This will break building the hyper-v target in a QEMU development environment. There the `FW_FILE` environment variable usually points to OVMF, which has an incompatible format and can not be packed into a hyper-v IGVM file. Can you rename the variable to `HV_FW_FILE` to avoid this issue? |
svsm | github_2023 | others | 562 | coconut-svsm | p4zuu | @@ -182,8 +183,8 @@ impl ACPITable {
///
/// This method returns the 4-character signature of the ACPI table, such as "APIC."
#[expect(dead_code)]
- fn signature(&self) -> FixedString<4> {
- FixedString::from(self.header.sig)
+ fn signature(&self) -> String {
+ String::from_utf8(Vec::... | Since this is dead code, I think we can afford changing the signature:
```suggestion
fn signature(&self) -> Result<String, FromUtf8Error> {
String::from_utf8(Vec::from(&self.header.sig))
``` |
svsm | github_2023 | others | 562 | coconut-svsm | p4zuu | @@ -36,8 +38,17 @@ pub fn sys_readdir(obj_id: u32, dirents: usize, size: usize) -> Result<u64, SysC
};
let mut new_entry = DirEnt::default();
- let fname = FileNameArray::from(name);
- new_entry.file_name[..fname.len()].copy_from_slice(&fname);
+ // DirEnt.file_name must be nul-... | Since `&new_entry.file_name` looks user-provided, I guess there would be a way for a user to trigger the `unwrap()` by providing garbage string, I would prefer returning the error here instead of triggering a panic through `unwrap()`. |
svsm | github_2023 | others | 562 | coconut-svsm | p4zuu | @@ -123,10 +124,10 @@ impl ACPITableHeader {
/// Print a human-readable summary of the ACPI table header's fields
#[expect(dead_code)]
fn print_summary(&self) {
- let sig = FixedString::from(self.sig);
- let oem_id = FixedString::from(self.oem_id);
- let oem_table_id = FixedString::f... | Same here about `unwrap()`s, I would prefer returning the error (we would need to change the function signature) instead of a possible panic |
svsm | github_2023 | others | 562 | coconut-svsm | p4zuu | @@ -36,8 +38,17 @@ pub fn sys_readdir(obj_id: u32, dirents: usize, size: usize) -> Result<u64, SysC
};
let mut new_entry = DirEnt::default();
- let fname = FileNameArray::from(name);
- new_entry.file_name[..fname.len()].copy_from_slice(&fname);
+ // DirEnt.file_name must be nul-... | Same remark as `&new_entry.file_name` about the `unwrap()` |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -244,6 +244,9 @@ impl LocalApic {
// (core_remap_ca(), core_create_vcpu() or prepare_fw_launch()) so
// they're safe to use.
if let Ok(caa) = unsafe { calling_area.read() } {
+ // SAFETY: guest vmsa and ca are always validated before beeing updated
+ // (core_remap_ca... | The `calling_area` is actually a case where the unsafe behavior can be hidden in the write functions. The calling area itself is volatile and not covered by safety guarantees at runtime or by the compiler. I think the read/write methods should be exposed as safe. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -370,6 +373,9 @@ impl LocalApic {
// (core_remap_ca(), core_create_vcpu() or prepare_fw_launch())
// so they're safe to use.
if let Ok(caa) = unsafe { calling_area.read() } {
+ // SAFETY: guest vmsa and ca are alway... | Same applies here. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -106,6 +108,9 @@ pub fn read_cr0() -> CR0Flags {
pub fn write_cr0(cr0: CR0Flags) {
let reg = cr0.bits();
+ // SAFETY: The inline assembly set the processors CR0 register with flags
+ // defined by `struct CR0Flags`.
+ // FIXME: is this enough? | The caller needs to make sure to not change any execution-state relevant bits like PE or PG. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -124,6 +132,10 @@ pub fn read_cr2() -> usize {
}
pub fn write_cr2(cr2: usize) {
+ // SAFETY: The inline assembly set the processors CR2 register.
+ // FIXME: should this function be marked unsafe? | Changing CR2 can impact the execution flow of the #PF handler. Since there is no user for this function, the safest is to just remove it. If there is a reason to write CR2 the code needs to make sure to restore the old value afterwards, which essentially needs a guard implementation. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -142,6 +157,10 @@ pub fn read_cr3() -> PhysAddr {
}
pub fn write_cr3(cr3: PhysAddr) {
+ // SAFETY: The inline assembly set the processors CR3 register.
+ // FIXME: should this function be marked unsafe?
+ // could change the state of the system, can that compromise
+ // the memory safet... | Yes, changing the page-table is one of the core behavior which can impact memory safety. The SAFETY comment should state that writing CR3 needs to be accompanied by other actions to make sure a memory safe execution state is warranted (like changing the stack and register state). |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -191,6 +212,9 @@ pub fn read_cr4() -> CR4Flags {
pub fn write_cr4(cr4: CR4Flags) {
let reg = cr4.bits();
+ // SAFETY: The inline assembly set the processors CR4 register with flags
+ // defined by `struct CR4Flags`.
+ // FIXME: is this enough? | Same comment as for `CR0` applies here as well. Setting CR4 needs to make sure to not alter any execution state affecting memory safety (e.g. PSE or PAE). |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -55,6 +55,9 @@ impl CpuidResult {
let mut result_ebx: u32;
let mut result_ecx: u32;
let mut result_edx: u32;
+ // SAFETY: Inline assembly to execute the CPUID instruction.
+ // Input registers (EAX, ECX) and output registers (EAX, EBX, ECX, EDX)
+ // are safely managed... | I would add that the CPUID instruction does not alter or affect any memory state. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -74,9 +74,12 @@ impl X86ExceptionContext {
self.frame.rip = new_rip;
if is_cet_ss_supported() {
- // Update the instruction pointer on the shadow stack.
let return_on_stack = (self.ssp + 8) as *const usize;
let return_on_stack_val = new_rip;
+ // SA... | Yeah, this is tricky. For `set_rip` the requirement is to not bypass compiler guarantees by changing the executions flow. For advancing the RIP in inline-assembly parts this is given, for instructions generated by the compiler the caller needs to make sure to update the rest of the execution state as actual hardware wo... |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -378,6 +383,7 @@ pub fn triple_fault() {
address: VirtAddr::from(0u64),
};
+ // SAFETY: Inline assembly to load an invalid IDT to trigger a triple fault. | Better comment: This ends execution, this function will not return so memory safety is not an issue. |
svsm | github_2023 | others | 537 | coconut-svsm | joergroedel | @@ -228,15 +229,21 @@ extern "C" fn ex_handler_control_protection(ctxt: &mut X86ExceptionContext, _vec
code @ (NEAR_RET | FAR_RET_IRET) => {
// Read the return address on the normal stack.
let ret_ptr: GuestPtr<u64> = GuestPtr::new(VirtAddr::from(ctxt.frame.rsp));
+ // SAFE... | `s/should be/is/` |
svsm | github_2023 | others | 537 | coconut-svsm | p4zuu | @@ -497,7 +497,12 @@ pub struct PageTable {
impl PageTable {
/// Load the current page table into the CR3 register.
pub fn load(&self) { | I tend to say that we should set `PageTable::load()` unsafe. Loading an invalid page table can break memory safety. We should ensure this call is safe by forcing the caller to check that the new page table is correctly allocated, with the correct lifetime, etc. |
svsm | github_2023 | others | 537 | coconut-svsm | p4zuu | @@ -191,7 +191,9 @@ pub mod svsm_gdbstub {
let cr3 = read_cr3();
let task = tl.get_task(id);
if let Some(task) = task {
- task.page_table.lock().load();
+ unsafe { | Is this intended that clippy didn't catch the missing safety comment here? |
svsm | github_2023 | others | 551 | coconut-svsm | vijaydhanraj | @@ -637,6 +637,34 @@ impl Task {
Ok(id)
}
+ /// Adds an object to the current task an maps it to a given object-id. | an -> and? |
svsm | github_2023 | others | 551 | coconut-svsm | vijaydhanraj | @@ -145,6 +146,10 @@ pub struct Task {
/// State relevant for scheduler
sched_state: RWLock<TaskSchedState>,
+ /// User-visible name of task
+ #[allow(dead_code)] | Could this be removed now? |
svsm | github_2023 | others | 551 | coconut-svsm | vijaydhanraj | @@ -0,0 +1,121 @@
+// SPDX-License-Identifier: MIT
+//
+// Copyright (c) 2024
+//
+// Author: Joerg Roedel <jroedel@suse.de>
+
+extern crate alloc;
+
+use super::{Buffer, File, FsError};
+use crate::console::console_write;
+use crate::cpu::percpu::current_task;
+use crate::error::SvsmError;
+use crate::locking::SpinLoc... | Not an issue but can the recursion be avoided to simplify? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -972,6 +973,75 @@ impl PageRef {
}
}
+ /// Write to page from [`Buffer`] object
+ ///
+ /// Arguments:
+ ///
+ /// - `buffer`: Reference to buffer object.
+ /// - `buffer_offset`: Offset into the buffer to start writing from.
+ /// - `page_offset`: Offset into the page where to s... | For either of the `offset` boundary checks, would it be better to gracefully return an error instead of a panic? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -90,6 +90,36 @@ impl RawRamFile {
self.pages[index].read(page_index, buf);
}
+ /// Read data from a file page and store it in a Buffer object.
+ ///
+ /// # Arguments:
+ ///
+ /// - `buffer`: [`Buffer`] object to store read data.
+ /// - `buffer_offset`: Offset into the buffer.
+ ... | no -> not? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -379,6 +388,40 @@ impl UserPtr<c_char> {
}
}
+pub fn copy_from_user(src: VirtAddr, dst: &mut [u8]) -> Result<(), SvsmError> {
+ let source = src.bits();
+ let destination = dst.as_mut_ptr() as usize;
+ let size = dst.len();
+
+ if src + size > USER_MEM_END {
+ return Err(SvsmError::Invalid... | Would it be better to introduce a generalized function like `check_bounds_range(start: VirtAddr, size: usize)` rather than manually checking? `check_bounds` can also be wrapped around this function. |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -49,6 +49,12 @@ impl FsObj {
}
}
+ pub fn new_file(file_handle: FileHandle) -> Self {
+ Self {
+ entry: FsObjEntry::File(file_handle), | Since we use `File` variant now, can we remove `#[allow(dead_code)]` for `enum FsObjEntry`? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -8,13 +8,50 @@ extern crate alloc;
use super::obj::{obj_add, obj_get};
use crate::address::VirtAddr;
-use crate::fs::{find_dir, DirEntry, FileNameArray, FsObj};
+use crate::fs::{create_root, find_dir, open_root, truncate, DirEntry, FileNameArray, FsObj};
use crate::mm::guestmem::UserPtr;
use crate::task::curre... | Nit: Would it be better to rename `flags` -> `open_flags`? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -73,3 +73,9 @@ pub fn write(fd: &FsObjHandle, buffer: &[u8]) -> Result<usize, SysCallError> {
.map(|ret| ret.try_into().unwrap())
}
}
+
+pub fn seek(fd: &FsObjHandle, offset: i64, flags: usize) -> Result<u64, SysCallError> { | Syscall spec says flags is of type `SFLAGS` instead of `usize`. Should this type be added? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -59,3 +59,17 @@ pub fn read(fd: &FsObjHandle, buffer: &mut [u8]) -> Result<usize, SysCallError>
.map(|ret| ret.try_into().unwrap())
}
}
+
+pub fn write(fd: &FsObjHandle, buffer: &[u8]) -> Result<usize, SysCallError> { | Although size parameter may not be needed with below implementation, syscall spec mentions `size` as the third parameter. Should we add `size` parameter? |
svsm | github_2023 | others | 548 | coconut-svsm | vijaydhanraj | @@ -45,3 +45,17 @@ pub fn open(path: &CStr, mode: usize, flags: usize) -> Result<FsObjHandle, SysCa
.map(|ret| FsObjHandle(ObjHandle::new(ret as u32)))
}
}
+
+pub fn read(fd: &FsObjHandle, buffer: &mut [u8]) -> Result<usize, SysCallError> { | Same here as well, should we add `size` parameter as mentioned in the syscall spec? |
svsm | github_2023 | others | 517 | coconut-svsm | joergroedel | @@ -141,42 +139,26 @@ ifneq ($(FS_FILE), none)
endif
touch ${FS_BIN}
-stage1/stage1.o: stage1/stage1.S bin/stage2.bin bin/svsm-fs.bin bin/svsm-kernel.elf bin
+bin/svsm.bin: bin/stage2.bin bin/svsm-fs.bin bin/svsm-kernel.elf bin/meta.bin
ln -sf svsm-kernel.elf bin/kernel.elf
- cc -c -DLOAD_STAGE2 -o $@ $<
+ cargo... | Do you see a change of making this work with the `x86-64-unknown-none` target? I'd like to avoid pull in another rust target into our build process. |
svsm | github_2023 | others | 517 | coconut-svsm | msft-jlange | @@ -44,6 +44,9 @@ impl SvsmPlatform for TdpPlatform {
}
fn env_setup(&mut self, debug_serial_port: u16, vtom: usize) -> Result<(), SvsmError> {
+ if vtom == 0 { | May be preferable to `assert_ne!(vtom, 0)` so that we can panic and get it over with (with a clear error message) instead of making some other component deal with a generic error. |
svsm | github_2023 | others | 549 | coconut-svsm | stefano-garzarella | @@ -202,9 +202,9 @@ impl LocalApic {
if self.lazy_eoi_pending {
if let Some(virt_addr) = caa_addr {
let calling_area = GuestPtr::<SvsmCaa>::new(virt_addr);
- // SAFETY: guest vmsa and ca are always validated before beeing updated
- // (core_remap_ca()... | Okay, I also touched that comment in https://github.com/coconut-svsm/svsm/pull/537 , but I agree that a single unsafe block is better.
BTW @joergroedel had a few comments, can you take a look too at https://github.com/coconut-svsm/svsm/pull/537#discussion_r1860456553 ? |
svsm | github_2023 | others | 549 | coconut-svsm | stefano-garzarella | @@ -110,6 +110,7 @@ impl SvsmPlatform for TdpPlatform {
return Err(SvsmError::InvalidAddress);
}
match op {
+ // SAFETY: safety work on the address is yet to be completed. | If it's still work in progress and safety is not guaranteed, would it be better to avoid the safety comment to remind us to check this better? |
svsm | github_2023 | others | 553 | coconut-svsm | p4zuu | @@ -29,6 +31,8 @@ pub fn write_msr(msr: u32, val: u64) {
let eax = (val & 0x0000_0000_ffff_ffff) as u32;
let edx = (val >> 32) as u32;
+ // SAFETY: Inline assembly to write the specified MSR. It does not change | I'm not sure for this one. I think it's possible to break memory safety by writing to some MSRs, like LSTAR, so I would set write_msr() unsafe and forward wrmsr safety check to the caller |
svsm | github_2023 | others | 546 | coconut-svsm | stefano-garzarella | @@ -52,12 +52,20 @@ where
x1 <= y2 && y1 <= x2
}
-pub fn zero_mem_region(start: VirtAddr, end: VirtAddr) {
- let size = end - start;
+/// # Safety
+///
+/// Caller should ensure [`core::ptr::write_bytes`] safety rules with `count` | What about replacing `size` with `count` in the code?
That way it's clearer to link the comment to the code and documentation of `core::ptr::write_bytes`. |
svsm | github_2023 | others | 546 | coconut-svsm | msft-jlange | @@ -52,10 +52,17 @@ pub fn flush_tlb_global_sync() {
do_tlbsync();
}
-pub fn flush_tlb_global_percpu() {
+/// # Safety
+///
+/// Caller should ensure this function is called in a per-cpu context only.
+pub unsafe fn flush_tlb_global_percpu() { | This does not need to be `unsafe`. Performing CR4 modifications to toggle PGE always safe. You can document that fact in the `unsafe` block below that performs the actual writes to CR4. |
svsm | github_2023 | others | 546 | coconut-svsm | stefano-garzarella | @@ -103,7 +124,13 @@ pub fn read_cr0() -> CR0Flags {
CR0Flags::from_bits_truncate(cr0)
}
-pub fn write_cr0(cr0: CR0Flags) {
+/// # Safety | We're also documenting and marking unsafe `write_cr*` functions in https://github.com/coconut-svsm/svsm/pull/537
Should I remove that changes?
Or feel free to pickup that patch in this PR. |
svsm | github_2023 | others | 539 | coconut-svsm | vijaydhanraj | @@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * Copyright (c) 2024 SUSE LLC
+ *
+ * Author: Joerg Roedel <jroedel@suse.de>
+ */
+
+OUTPUT_ARCH(i386:x86-64)
+
+SECTIONS
+{
+ . = 64k;
+ _stext = .;
+ .text : {
+ *(.text)
+ *(.text.*)
+ . = ALIGN(16);
+ }
+ _etext = .;
+ . = ALIGN(4096);
+ .got : {
+ *(... | Tested PR https://github.com/coconut-svsm/svsm/pull/547 based on the changes of this PR. With this linker script, observe that even though the offset is page aligned, the `p_filesz` is not aligned to page boundary. So, we may still need to zero the region `[p_filesz..PAGE_SIZE)` .
Here is the output from my test,
... |
svsm | github_2023 | others | 538 | coconut-svsm | stefano-garzarella | @@ -4,19 +4,44 @@
//
// Author: Joerg Roedel <jroedel@suse.de>
+use crate::address::VirtAddr;
+use crate::types::PAGE_SIZE;
use crate::utils::immut_after_init::ImmutAfterInitRef;
use cpuarch::snp_cpuid::SnpCpuidTable;
use core::arch::asm;
static CPUID_PAGE: ImmutAfterInitRef<'_, SnpCpuidTable> = ImmutAfterI... | Please add a `SAFETY` comment here. I know it's redundant because the function itself is unsafe, but if we enable `undocumented_unsafe_blocks` clippy lint we will have a warning, see https://github.com/coconut-svsm/svsm/pull/537 |
svsm | github_2023 | others | 538 | coconut-svsm | stefano-garzarella | @@ -116,6 +121,30 @@ impl SvsmPlatform for SnpPlatform {
Ok(())
}
+ fn prepare_fw(
+ &self,
+ config: &SvsmConfig<'_>,
+ kernel_region: MemoryRegion<PhysAddr>,
+ ) -> Result<(), SvsmError> {
+ if let Some(fw_meta) = &config.get_fw_metadata() {
+ print_fw_meta... | I see that this is pre-existing, but since now this function return an `SvsmError`, can we avoid the `expect()` here and propagate the error to the caller? |
svsm | github_2023 | others | 543 | coconut-svsm | p4zuu | @@ -38,10 +40,32 @@ impl X86Tss {
}
}
- pub fn set_ist_stack(&mut self, index: NonZeroU8, addr: VirtAddr) {
+ pub fn set_ist_stack(&self, index: NonZeroU8, addr: VirtAddr) { | Would it make sense to set `set_ist_stack()` and `set_rsp0()` `unsafe`? Incorrectly called, I guess they can both create memory issues, thus UB.
It's not an issue with these changes of course, it's also relevant with `main` branch code |
svsm | github_2023 | others | 550 | coconut-svsm | p4zuu | @@ -29,6 +31,8 @@ pub fn write_msr(msr: u32, val: u64) {
let eax = (val & 0x0000_0000_ffff_ffff) as u32;
let edx = (val >> 32) as u32;
+ // SAFETY: Inline assembly to write the specified MSR. It does not change | I'm not sure for this one. I think it's possible to break memory safety by writing to some MSRs, like LSTAR, so I would set `write_msr()` unsafe and forward `wrmsr` safety check to the caller |
svsm | github_2023 | others | 520 | coconut-svsm | joergroedel | @@ -77,5 +80,9 @@ pub fn exec_user(binary: &str) -> Result<(), SvsmError> {
schedule();
- Ok(())
+ if task.is_terminated() {
+ Err(SvsmError::Task(TaskError::Terminated))
+ } else {
+ Ok(task.get_task_id())
+ } | This is okay for now, but going forward this needs to return the TID of the new task even if it is already terminated at this point. But for that to make sense COCONUT needs to learn the concept of a parent->child relationship between tasks, so that the parent task can use TID to check the exit code of the child task. |
svsm | github_2023 | others | 531 | coconut-svsm | stefano-garzarella | @@ -143,10 +143,6 @@ pub const PGTABLE_LVL3_IDX_SHARED: usize = 511;
/// Base Address of shared memory region
pub const SVSM_SHARED_BASE: VirtAddr = virt_from_idx(PGTABLE_LVL3_IDX_SHARED); | Should we remove also this in the first commit, which is used only by `SVSM_SHARED_STACK_BASE`?
As we add them back in the next commit, do we really need a patch to remove them? |
svsm | github_2023 | others | 531 | coconut-svsm | stefano-garzarella | @@ -143,6 +143,12 @@ pub const PGTABLE_LVL3_IDX_SHARED: usize = 511;
/// Base Address of shared memory region
pub const SVSM_SHARED_BASE: VirtAddr = virt_from_idx(PGTABLE_LVL3_IDX_SHARED);
+/// Shared mappings region start
+pub const SVSM_SHARED_MAPPING_BASE: VirtAddr = SVSM_SHARED_BASE.const_add(256 * SIZE_1G);
+
... | Should we rename in `SVSM_GLOBAL_*`? |
svsm | github_2023 | others | 343 | coconut-svsm | 00xc | @@ -384,6 +386,27 @@ impl GHCB {
Ok(())
}
+ fn read_buffer_as<T>(&mut self, offset: isize) -> Result<T, GhcbError>
+ where
+ T: Sized + Copy,
+ {
+ let size: isize = mem::size_of::<T>() as isize;
+
+ if offset < 0 || offset + size > (GHCB_BUFFER_SIZE as isize) {
+ ... | We do not need to use `isize` here for the offset. I understand this was perhaps done to mirror `write_buffer()` below, but we can do the right thing here (and the caller), i.e., use `usize`, and thus [`add()`](https://doc.rust-lang.org/std/primitive.pointer.html#method.add-1) instead of `offset()`
Also, there are s... |
svsm | github_2023 | others | 343 | coconut-svsm | 00xc | @@ -0,0 +1,204 @@
+// SPDX-License-Identifier: MIT
+//
+// Copyright (c) 2024 Red Hat, Inc.
+//
+// Author: Oliver Steffen <osteffen@redhat.com>
+
+use core::ptr::NonNull;
+
+use virtio_drivers::{
+ device::blk::{VirtIOBlk, SECTOR_SIZE},
+ transport::{
+ mmio::{MmioTransport, VirtIOHeader},
+ Device... | Not sure I understand this, why are we not going through `virt_to_phys()`? |
svsm | github_2023 | others | 343 | coconut-svsm | 00xc | @@ -0,0 +1,204 @@
+// SPDX-License-Identifier: MIT
+//
+// Copyright (c) 2024 Red Hat, Inc.
+//
+// Author: Oliver Steffen <osteffen@redhat.com>
+
+use core::ptr::NonNull;
+
+use virtio_drivers::{
+ device::blk::{VirtIOBlk, SECTOR_SIZE},
+ transport::{
+ mmio::{MmioTransport, VirtIOHeader},
+ Device... | Same here, why are we converting a regular reference to a `PhysAddr` directly? |
svsm | github_2023 | others | 343 | coconut-svsm | 00xc | @@ -384,9 +386,31 @@ impl GHCB {
Ok(())
}
+ fn read_buffer_as<T>(&mut self, offset: usize) -> Result<T, GhcbError>
+ where
+ T: Sized + Copy, | `Sized` is opt-out, so it is always implied unless something like `?Sized` is used. |
svsm | github_2023 | others | 343 | coconut-svsm | 00xc | @@ -0,0 +1,204 @@
+// SPDX-License-Identifier: MIT
+//
+// Copyright (c) 2024 Red Hat, Inc.
+//
+// Author: Oliver Steffen <osteffen@redhat.com>
+
+use core::ptr::NonNull;
+
+use virtio_drivers::{
+ device::blk::{VirtIOBlk, SECTOR_SIZE},
+ transport::{
+ mmio::{MmioTransport, VirtIOHeader},
+ Device... | I think just using `allocate_pages()` with some extra logic to zero them and make them all shared should work. right? |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -322,6 +322,10 @@ impl VirtAddr {
VirtAddr::new(self.0 + offset)
}
+ pub const fn const_sub(&self, offset: usize) -> Self { | Should we add `verus` macro on top as `const_add()`?
We may need to extend `kernel/src/address.verus.rs` with a new `const_sub_ensures()`.
Not sure if it's something for this PR.
@ziqiaozhou can help. |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -4,18 +4,147 @@
//
// Author: Jon Lange (jlange@microsoft.com)
-use crate::address::VirtAddr;
+use crate::address::{VirtAddr, VirtPhysPair};
use crate::cpu::cpuid::CpuidResult;
use crate::cpu::msr::write_msr;
use crate::cpu::percpu::this_cpu;
+use crate::cpu::IrqGuard;
use crate::error::SvsmError;
+use crate... | Enabling `-W clippy::undocumented_unsafe_blocks` I have:
```
warning: unsafe block missing a safety comment
--> kernel/src/hyperv/hv.rs:91:9
|
91 | unsafe {
| ^^^^^^^^
|
= help: consider adding a safety comment on the preceding line
= help: for further information visit https:/... |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -4,18 +4,147 @@
//
// Author: Jon Lange (jlange@microsoft.com)
-use crate::address::VirtAddr;
+use crate::address::{VirtAddr, VirtPhysPair};
use crate::cpu::cpuid::CpuidResult;
use crate::cpu::msr::write_msr;
use crate::cpu::percpu::this_cpu;
+use crate::cpu::IrqGuard;
use crate::error::SvsmError;
+use crate... | Ditto |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -49,5 +178,84 @@ pub fn hyperv_setup_hypercalls() -> Result<(), SvsmError> {
let pa = virt_to_phys(page);
write_msr(HyperVMsr::Hypercall.into(), u64::from(pa) | 1);
+ // Obtain the current VTL for use in future hypercalls.
+ let vsm_status_value = get_vp_register(hyperv::HvRegisterName::VsmVpStatus... | I know the function itself is unsafe, but enabling `-W clippy::undocumented_unsafe_blocks`, clippy issues a warning for these cases as well. Can you add a safety comment here as well? |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -49,5 +178,84 @@ pub fn hyperv_setup_hypercalls() -> Result<(), SvsmError> {
let pa = virt_to_phys(page);
write_msr(HyperVMsr::Hypercall.into(), u64::from(pa) | 1);
+ // Obtain the current VTL for use in future hypercalls.
+ let vsm_status_value = get_vp_register(hyperv::HvRegisterName::VsmVpStatus... | Ditto |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -59,6 +59,20 @@ impl<'a> HypercallPagesGuard<'a> {
}
}
+ /// Casts a hypercall input page into a header of type `H` and returns a
+ /// reference to that header object.
+ ///
+ /// This function requires the use of `mut self` because it generates
+ /// mutable references to the address... | Can you add a `SAFETY` comment here? |
svsm | github_2023 | others | 533 | coconut-svsm | stefano-garzarella | @@ -259,3 +275,99 @@ pub fn get_vp_register(name: hyperv::HvRegisterName) -> Result<u64, SvsmError> {
Ok(reg)
}
+
+#[repr(C)]
+#[derive(Clone, Copy, Debug, Default)]
+struct HvInputEnableVpVtl {
+ partition_id: u64,
+ vp_index: u32,
+ vtl: u8,
+ _rsvd: [u8; 3],
+ context: hyperv::HvInitialVpConte... | Ditto |
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