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H: '1011' Overlapping (Mealy) Sequence Detector in Verilog
I'm designing a "1011" overlapping sequence detector,using Mealy Model in Verilog.
The FSM that I'm trying to implement is as shown below :-
Verilog Module :-
`timescale 1ns / 1ps
module seq_detector(
input x,clk,reset,
output reg z
);
parameter S0 = 0 , S1 = 1 , S2 = 2 , S3 = 3 ;
reg [1:0] PS,NS ;
always@(posedge clk or posedge reset)
begin
if(reset)
PS <= S0;
else
PS <= NS ;
end
always@(PS or x)
begin
case(PS)
S0 : begin
z = 0 ;
NS = x ? S1 : S0 ;
$display(PS);
end
S1 : begin
z = 0 ;
NS = x ? S1 : S2 ;
$display(PS);
end
S2 : begin
z = 0 ;
NS = x ? S3 : S0 ;
$display(PS);
end
S3 : begin
z = x ? 1 : 0 ;
NS = x ? S1 : S2 ;
$display(PS);
end
endcase
end
endmodule
Testbench :-
`timescale 1ns / 1ps
module testbench;
// Inputs
reg x;
reg clk;
reg reset;
// Outputs
wire z;
// Instantiate the Unit Under Test (UUT)
seq_detector uut (
.x(x),
.clk(clk),
.reset(reset),
.z(z)
);
initial
begin
clk = 1'b0;
reset = 1'b1;
#15 reset = 1'b0;
end
always #5 clk = ~ clk;
initial begin
#12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
#12 x = 1;#10 x = 1 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 1;#10 x = 0 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 0;#10 x = 1 ; #10 x = 1 ; #10 x = 0 ;
#10 $finish;
end
endmodule
Simulation Output :-
The issue is that, I'm getting the number of '1011' detected to be correct (i.e. 3 according to the testbench). But the timing where the output is going high is wrong. The output 'z' is going high when '101' is being detected, when it's expected to go high when '1011' occurs. What's the possible modification that I'd have to do, so as to eliminate this error ?
AI: The error is caused by mixing the combinational State assignment block with the sequential output block. The combinational state assignment block and the sequential output block have different sensitivity lists.
Following these guidelines helped me design glitch-gree FSMs.
Sequential blocks use nonblocking assignments.
Combinational blocks use blocking assignments.
It's better to use registered outputs.
Use combinational logic for the state assignment block
Link to the design on EDA Playground
Design:
`timescale 1ns / 1ps
module seq_detector(
input x,clk,reset,
output reg z
);
parameter S0 = 0 , S1 = 1 , S2 = 2 , S3 = 3 ;
reg [1:0] PS,NS ;
//sequential state register block
always @ (posedge clk or posedge reset)
if (reset)
PS <= S0;
else
PS <= NS;
//sequential output block
always @ (posedge clk or posedge reset)
if (reset)
z <= 1'b0;
else
z <= (PS == S3) && x;
//combinational state assignment block
always @ (*)
begin
case(PS)
S0 : NS = x ? S1 : S0 ;
S1 : NS = x ? S1 : S2 ;
S2 : NS = x ? S3 : S0 ;
S3 : NS = x ? S1 : S2 ;
endcase
$monitor(PS);
end
endmodule
Testbench:
`timescale 1ns / 1ps
module testbench;
// Inputs
reg x;
reg clk;
reg reset;
// Outputs
wire z;
// Instantiate the Unit Under Test (UUT)
seq_detector uut (
.x(x),
.clk(clk),
.reset(reset),
.z(z)
);
always #5 clk = ~ clk;
initial begin
$dumpfile("dump.vcd");
$dumpvars(1, testbench);
fork
clk = 1'b0;
reset = 1'b1;
#15 reset = 1'b0;
begin
#12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
#12 x = 1;#10 x = 1 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 1;#10 x = 0 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 0;#10 x = 1 ; #10 x = 1 ; #10 x = 0 ;
#10 $finish;
end
join
end
endmodule
Waveform:
https://www.edaplayground.com/w/x/3Pj
|
H: How voltage and power transfer in cascaded amplifiers work?
When there are three amplifiers that are cascaded to produce higher gain:
The source resistance should be lower than input impedance of first amplifier
The output impedance of first amplifier should be lower than input impedance of second amplifier
The output impedance of second amplifier should be lower than input impedance of the last amplifier
Then the output impedance of last amplifier should be matched/equal to load resistance for max power transfer
In short,am I correct to conclude that: On the way to the load resistance, we maximize voltage transferred but when in front of the load resistance, we maximize power transferred by matching the impedances, but this means the output voltage will then be half of what the last amplifier should have gained.
I also wonder why we don't match impedance between two amplifiers(just like how we match impedance of the last amplifier to load resistance) to also transfer max power?
AI: [I discuss Noise Voltage versus Noise Figure at end of this answer.]
simply stated
matching will cost you 6dB per interface on the voltage levels
I once lead a team doing RF design on silicon; we concluded there was no need to match over our 500 micron distances on the silicon
I guided the team (all coming from past PCB work, where matching WAS needed), to view the silicon design as broadband opamps where you can use an emitter follower to achieve low Rout, and use diffpairs (bipolar or FET; we have biCMOS process) for input circuit, thus HIGH_RIN, to the next signal_processing circuit
we learned, in our simulations, the matching made no sense after building a precision gain/phase circuit at substantial power consumption and THEN to throw away 6dB voltage level
===================
At the time of this design team's learning of RFIC methods, a big topic at technical conferences was Noise Figure versus Noise Voltage.
simply put:
Noise Figure requires a given noise density at the signal source
a "noise density" seems to require an Output Resistor
we don't want to insert lossy resistors, just to add noise
so we went with the OpAmp_as_broadband_amplifier for our mindset; we did no matching; we used Noise Voltage as our UHF (300MHz to 3,000MHz) design goal
|
H: How to implement C language driver for SPI peripheral
I have been implementing device driver for the SPI peripheral of the MCU in C language. I would like to exploit interrupt mechanism for reception and also for transmission.
As far as the reception part I think that I can implement this via exposing the function SpiRegisterCallback into the SPI driver interface. This function enables the client register its function which will be invoked as soon as data byte is received (reception buffer full interrupt is invoked).
As far as the transmission part I would like to use some SpiTransmit function which will receive pointer to the data bytes to be transmitted and number of bytes to be transmitted. As far as implementation I am going to define some internal callback function of the SPI driver. This internall callback will be registered for transmission buffer empty interrupt. In this callback function the passed data bytes will be gradually placed into the transmission buffer. I am not sure whether this approach is appropriate. Can anybody give me an advice how to implement SPI peripheral driver which exploits interrupts for data transmission? Thanks in advance for any suggestions.
AI: The SPI protocol ties reading to writing. For each transmitted byte, a byte is received. Thus transmission and reception aren't independent and your SPI design should reflect that.
Therefore, you don't want a callback for each received byte as the link to the transmission is lost. Furthermore, it's far too slow to achieve data rates of 10 MHz or more.
In my experience, two approaches work:
Blocking byte operations
An Arduino like spi_transfer_byte() function: it sends a byte and returns the byte received at the same time. The function blocks until the byte has been received. Additionally, there are functions to start and end the SPI transaction (for the chip select signal). This pattern is easy to use, easy to implement, small in code size and often good enough.
Asynchronous SPI transactions
A higher-level API to execute entire SPI transactions. An array of bytes can be sent (similar to the way you have proposed). The function returns immediately as the transmission happens asynchronously. When the transmission has completed, a callback is called providing the received bytes (the same number as transmitted). For maximum performance, it should be possible to queue several SPI transactions. The callback should contain a reference to the submitted transaction.
This approach is more complex and usually requires DMA support for implementation (an interrupt for each byte is usually too slow). It can achieve higher throughput, is efficient for large SPI transactions (e.g. for LCD displays), does not block the rest of the code and is also suitable for RTOS.
|
H: FM modulator LTspice
I am designing an FM modulator circuit using Colpitts topology. Unfortunately I encountered difficulties and do not know how to solve them as I am new in electronics.
Firstly I don't get a clean sine wave on ouput. Also, the FFT of the output differs from what is being expected - I get only one frequency for the whole input sine wave. So the circuit "shifts" the frequency but doesn't really modulate it.
I might be wrong but thanks for your help anyway.
AI: The MV2201 has a nominal capacitance of 6.8 pF at 4 volt DC and can span a range of 1.9 to one when the DC control voltage changes from 1 volt to 10 volt. So, the range might be from 8 pF (@1 volt) to about 4 pF (@10 volts).
Now ask yourself how much that is going to change the main frequency of the oscillator given that the varactor diode is, in effect, in parallel with C22 and C23 (series elements). C22 and C23 are both circa 5 nF hence, the net capacitance to L1 is about 2.5 nF and you are expecting to "observe" a frequency deviation due to that capacitance (2.5 nF) rising a couple of pico farads and falling a couple of pico farads.
My calculations tell me that a 2 pF change in 2.5 nF will result in a frequency change of 1.0004 so if your centre frequency is 1000 Hz then I would expect to see it rise to 1000.4 Hz and fall to 999.6 Hz. Is your spectrum analyser able to spot this change? It's very small.
If you made L1 ten times bigger and C22 and C23 ten times smaller, the effect might be visible.
Firstly i don't get a clean sine wave on output.
Nobody expects it to have a clean frequency. The Colpitts oscillator is a phase shift oscillator and it doesn't run at the resonant frequency of the tank but to one side of it hence, the sinewave will always be distorted to some extent. The waveform I see in your picture is not unreasonable given your circuit.
|
H: PCB Antenna Design Calculations
I have read the basics of antenna theory and lectures.
I just want some practical PCB antenna design & its calculations /design considerations so as to understand the design calculations better.
Any PCB antenna design regardless of the frequency of the operation and the size will do.
I searched a lot but unable to find one antenna design which showed me the design calculations and the steps.
Can anyone provide me a detailed example of any PCB antenna design that you have designed or any link which provides me what I am searching for?
AI: Here you can find some references for microstrip patch antenna design.
Firstly you had to determine target frequency and substrate material. For starter you can use standards like FR-4 substrate material with epsilon_r = 4.3 and 1.6mm thick.
Then you need to calculate patch sizes, you can do it by hand with formulas given in references below or you can use microstrip patch antenna calculator (also given below)
After this easy design steps you can simulate it with simulators (I use CST Studio Suite) to optimize the design parameters
Most appropriate reference for you
Reference 2
Online Calculator
Trailer Video
After some practice with these, you can go forward with array antennas or different shaped patch antennas like circle. Note that, other shapes than rectengular patch antennas need more complex calculations to design.
|
H: Anyway to reduce pulse trigger time width without using ne555timer
Is there any other way to reduce the time width of the trigger pulse wave without using 555timer?
AI: Your comparator circuit is flawed because of this: -
I've marked a red arrow showing what you have done wrong when using an op-amp with an AC signal source. You are attempting to feed in an input signal that rises 2 volts above and falls 2 volts below 0 volts. That will destroy the op-amp because it's most negative pin (the negative supply rail pin) is at 0 volts.
If you look at the data sheet for the LM358 you will see that you should not take any input lower than 0.3 volts below the negative supply pin.
OK, having said that it doesn't mean that a simulation will burn but, it also won't do anything like what a real circuit can be expected to do. After-all, why should a sim model try and emulate exactly what the real thing does when operated incorrectly? That would be beyond what a simulator is intended for and incur massive math processing overheads just to cater for the inexperienced. Sims are targeted at pro EEs hence you have to use the op-amp within its expected limitations.
So, if you are modeling a circuit in a sim you have to obey the rules for the device and, unfortunately, you are not doing this. I know you want a zero crossing detector but this isn't the way to go about it. The only reason it halfheartedly appears to be (somewhat) working is because the model (the simulation model) is throwing up nonsense results that cannot be relied upon.
You need to start from scratch, rethink your idea and implement a proper circuit (possibly using a window comparator or a regular comparator plus an exclusive or-gate and RC time constant to produce a thin pulse each time the comparator square wave output changes state).
|
H: '1011' Overlapping (Moore) Sequence Detector in Verilog
I'm designing a "1011" overlapping sequence detector, using Moore Model in Verilog .
The FSM that I am trying to implement is as shown below :-
Verilog Module :-
`timescale 1ns / 1ps
module seq_detector(
input x,clk,reset,
output reg z
);
parameter S0 = 0 , S1 = 1 , S2 = 2 , S3 = 3 , S4 = 4;
reg [1:0] PS,NS ;
always@(posedge clk or posedge reset)
begin
if(reset)
PS <= S0;
else
PS <= NS ;
end
always@(PS or x)
begin
case(PS)
S0 : begin
z <= 0 ;
NS <= x ? S1 : S0 ;
$display(PS);
end
S1 : begin
z <= 0 ;
NS <= x ? S1 : S2 ;
$display(PS);
end
S2 : begin
z <= 0 ;
NS <= x ? S3 : S0 ;
$display(PS);
end
S3 : begin
z <= 0;
NS <= x ? S4 : S2 ;
$display(PS);
end
S4 : begin
z <= 1;
NS <= x ? S1 : S2 ;
$display(PS);
end
endcase
end
endmodule
Testbench :-
`timescale 1ns / 1ps
module testbench;
// Inputs
reg x;
reg clk;
reg reset;
// Outputs
wire z;
// Instantiate the Unit Under Test (UUT)
seq_detector uut (
.x(x),
.clk(clk),
.reset(reset),
.z(z)
);
initial
begin
clk = 1'b0;
reset = 1'b1;
#15 reset = 1'b0;
end
always #5 clk = ~ clk;
initial begin
#12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
#12 x = 1;#10 x = 1 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 1;#10 x = 0 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 0;#10 x = 1 ; #10 x = 1 ; #10 x = 0 ;
#10 $finish;
end
endmodule
Simulation Output :-
The issue is that, the output 'z' is staying low always, even when I've applied an input sequence which has three '1011' patterns in it . What's the possible modification that I'd have to do, so as to eliminate this error ?
AI: In Moore Machines the output depends only on the current state. So when you are changing your output, (z in this case), the sensitivity list should be only the current state.
You should add the default case so that your FSM remains idle when there is no change in the current state.
In your combinational block, you should use blocking statements to prevent your simulation from running into infinite loops and getting locked up.
Simulate the circuit here on my eda playground:
Design:
`timescale 1ns / 1ps
module seq_detector(
input x,clk,reset,
output reg z
);
parameter S0 = 0 , S1 = 1 , S2 = 2 , S3 = 3 , S4 = 4;
reg [2:0] PS,NS ;
always @(posedge clk or posedge reset)
begin
if(reset)
PS <= S0;
else
PS <= NS ;
end
always @(PS, x)
begin
case(PS)
S0 : begin
NS = x ? S1 : S0 ;
$display(PS);
end
S1 : begin
NS = x ? S1 : S2 ;
$display(PS);
end
S2 : begin
NS = x ? S3 : S0 ;
$display(PS);
end
S3 : begin
NS = x ? S4 : S2 ;
$display(PS);
end
S4 : begin
NS = x ? S1 : S2 ;
$display(PS);
end
default: NS = S0;
endcase
end
always @(PS)
begin
case(PS)
S4: z = 1;
default: z = 0;
endcase
end
endmodule
Testbench:
`timescale 1ns / 1ps
module testbench;
// Inputs
reg x;
reg clk;
reg reset;
// Outputs
wire z;
// Instantiate the Unit Under Test (UUT)
seq_detector uut (
.x(x),
.clk(clk),
.reset(reset),
.z(z)
);
always #5 clk = ~ clk;
initial begin
$dumpfile("dump.vcd");
$dumpvars(1, testbench);
fork
clk = 1'b0;
reset = 1'b1;
#15 reset = 1'b0;
begin
#12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
#12 x = 1;#10 x = 1 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 1;#10 x = 0 ; #10 x = 0 ; #10 x = 1 ;
#12 x = 0;#10 x = 1 ; #10 x = 1 ; #10 x = 0 ;
#10 $finish;
end
join
end
endmodule
`
Waveform:
https://www.edaplayground.com/w/x/kk
There are totally 32 possibilities to test for this Overlapping FSM because there are 5 states. Alternative: Use a formal property to verify the FSM.
property CHK_SEQ_DETECT;
@(posedge clk) disable iff (reset) x ##1 !x ##1 x[*2] |=> z;
endproperty;
ASSERT_CHK_SEQ_DETECT: assert property (CHK_SEQ_DETECT);
Add these lines in the design module, complete setup of formal tool and run it.
Note:
As mentioned in Coding And Scripting Techniques For FSM Designs With
Synthesis-Optimized, Glitch-Free Outputs by Clifford Cummings, Sunburst Design, Inc,
The combinational outputs generated by these two coding styles (Example 1 and Example 2)
suffer two principal disadvantages:
Combinational outputs can glitch between states.
Combinational outputs consume part of the overall clock cycle that would have been available to the block of logic that is driven by the FSM outputs.
When module outputs are generated using combinational logic, there is less time for the receiving module to pass signals through inputs and additional combinational logic before they must be clocked.
Hence, coding an overlapping Moore with registered output, in SystemVerilog, and with better signal names:
module seq_detector(
input seq_in, clk, reset,
output logic detect_out
);
//one-hot encoding of FSM
enum logic [4:0] {S0 = 5'b00001, S1 = 5'b00010, S2 = 5'b00100, S3 = 5'b01000, S4 = 5'b10000} state, next;
//state registers
always_ff @(posedge clk or posedge reset)
if (reset) state <= S0;
else state <= next;
// Next state assignment logic
always_comb begin: set_next_state
next = state;
unique case (state)
S0 : if (seq_in) next = S1; else next = S0;
S1 : if (seq_in) next = S1; else next = S2;
S2 : if (seq_in) next = S3; else next = S0;
S3 : if (seq_in) next = S4; else next = S2;
S4 : if (seq_in) next = S1; else next = S2;
endcase
$monitor(state);
end: set_next_state
// Registered output logic
always_ff @(posedge clk, posedge reset)
if (reset) detect_out <= 1'b0;
else detect_out <= (state == S4);
property CHK_SEQ_DETECT;
@(posedge clk) disable iff (reset) seq_in ##1 !seq_in ##1 seq_in[*2] |=> ##1 detect_out;
endproperty;
ASSERT_CHK_SEQ_DETECT: assert property (CHK_SEQ_DETECT);
endmodule
As the input is not directly connected to the output, the FSM is free from being affected by glitches at the input.
|
H: How to Find Thevenin's Voltage & Resistance?
I've a hard time understanding Thevenin's theorem.
I know that it is just a theorem to simplify a complex circuit, and to easily analyse that.
My hard understanding is in the mathematics of it.
Given this circuit, we'd take out the R2, because it is the load resistance, right?(Can you explain me why we need to take it out?)
Also, a load resistence just a load, which is just the main thing of the circuit, that consumes the power, right? Is it the core subject, that the circuit is built for to power?
Now, to get the Vthev, we need to calculate the Rtotal, and here we'd calculate it if it were parallel, but here it is clearly in series, because we took out R2, and and there is no current in that branch anymore, so why we need to calculate it as parallel?
Also, when we need to get the Rthev, why we need to short the voltage sources, and why we don't need the R2?
If I imagine a black box:
Does the Rthev basically just the overall resistance of the blackbox between terminal A and B? Therefore this is why we doesn't include the Rload when calculating the Vthev and Rthev?
I don't know if my questions are good, because I'm really confused about it, but can you explain me in simple steps?
EDIT
In this example the solutions are: VTHEV = 3 V, RTHEV = 60 Ω, INORT = 0.05 A
Rthev = 1/(1/100+1/150): Why we ignore the parallel 200Ohms?
Vthev = (5/250)*150: Again why we ignore the 200Ohms, and here why we calculate the resistance as series and(250Ohms) and not as parallel, like in the case of Rthev(60Ohms)
AI: Thévenin applies to linear circuits and with passive elements as shown in your example, you can obtain the output resistance by turning off all sources while "looking" through the connecting terminals across which you want \$R_{th}\$:
A 0-V voltage source is replaced by a short circuit while a 0-A current source is open-circuited. By inspecting the right-side picture, the output resistance is immediate:
For the voltage \$V_{th}\$, keep all the network as it is and apply superposition: alternately turn a voltage source off and calculate the intermediate voltage across \$R_2\$ then sum both results to obtain the Thévenin voltage:
A quick SPICE simulation tells us if this is ok: a dc operating point calculation followed by a .TF directive confirm we are good to go.
Now, regarding the question about the load: keep it or don't keep it? Thévenin offers a means to model a given linear circuit by a black box characterized by a voltage source \$V_{th}\$ affected by an output resistance \$R_{th}\$. In your case, if you keep \$R_2\$ in place, then you have the below box:
But you could also decide to consider \$R_2\$ as a load and disconnect it for your analysis. In this case, the equivalent box would be:
It provides the insight that \$R_2\$ is driven with a source affected by a 0-8\$\Omega\$ resistance.
What practical usage can you make out this mumbo jumbo? Well, look at the below circuit and try to determine the transfer function:
You apply Thévenin at resistance \$R_2\$ and reduce the circuit to a simple more familiar \$RC\$ circuit whose capacitor is driven by \$R_{th}\$. The transfer function is immediate:
|
H: What is the purpose of this coil in a medical defibrillator?
Please can someone explain the function of L coil in this circuit? This schematic is just medical defibrillator, but almost every capacitor discharge circuit has some series coil.
Is it some kind current limiter?
AI: The inductor is there to shape the waveform.
Depending on the values of the capacitor and inductor, the energy from the capacitor will be delivered in a pulse of sine waves around 10 milliseconds long.
The diagram you have is fairly primitive, and dangerous besides - one side of it is still connected to the AC source when defibrillating.
That method of generating and shaping the pulse (as well as the shape of the pulse) also appear to be outdated. The Wikipedia page refers to a newer method (biphasic pulses) that has been in use since the 1980s.
To top it all off, more modern defibrillators use more advanced techniques to generate the pulses so as to deliver enough energy to the heart to stop it (yes, stop it) without causing excessive collateral damage (burns and such.)
The problem that defibrillators "fix" isn't a stopped heart, but a heart whose various muscle sections have gotten out of step.
Rather than beating in step, the muscles are all twitching at various rates. The defibrillator smacks them all and makes them stop.
Thereafter, they start beating again - with a bit of luck, they start up synchronized and stay that way. If not, zap 'em again and hope for the best.
|
H: Use of tin plating
I have been researching about PCB development, and I came across the tin plating process. Consider the following scenario: I have created a PCB, covered it with solder mask, and I am now ready to solder the components on the PCB.
That means that the only copper not covered by solder mask, will now be covered by solder wire, while connecting the components.
So, my question is, why and when should the tin plating process come into play in the above-mentioned procedure?
AI: Copper oxidizes rapidly, compromising your ability to solder it later. Tin plating (or HASL) as part of the fabrication process greatly extends the shelf life of unassembled boards by protecting the copper.
|
H: POKO TD-169C Hair dryer circuit diagram
Can I replace the 1N5395 diode in this diagram with a FR157 diode? Basically I need to lower the heat of my hair dryer and I think the 1N5395 diode in this diagram does exactly this but I have only a FR157 and also I read it's better to use 4 amps or even 6 amps diode like the BY500-400! Care to elaborate? Thanks!
http://www.seekic.com/circuit_diagram/Electrical_Equipment_Circuit/POKO_TD_169C_Hair_dryer_circuit_diagram.html
Edit: So in my dryer I have this heating element (220V, 150W):
Wouldn't a FR157 or a RL205 work to cut the power in half thus reducing the temps?
AI: No your plan is not going to do what you want. First of all the FR157 has a max reverse voltage of only 50V which is not sufficient for this use. Secondly, and more important, the existing circuit uses the diode at a half-wave rectifier. This cuts the power into the hair dryer in half when you switch it to "low". So the only two options are 100% power and 50% power. Putting a different diode in place of the 1N5395 will get you back to the same place you started.
|
H: How should I make an ECAD schematic for my RFID chip?
I want to integrate a sensor component with an RFID chip.
From the answers I have from this question. I decided I need to contact a PCBA house. I need to draw an ECAD schematic for the PCBA house (never done this before) .
These are the components:
RFID Chip; (Datasheet)
Sensor (TFT transistor)
Capacitor
I want to connect a 1uF capacitor between VGS of the Transistor. Connect Source and Drain to VDD, VOUT. And Connect the antenna to the antenna pads.
Below is how i think i should draw the schematic:
simulate this circuit – Schematic created using CircuitLab
How should i make an ECAD schematic so that it is clear to the PCBA house what i am looking to do?
What is the correct way of making the ECAD shematic so that it is clear to the PCBA house what I am looking to do ?
EDIT From Voltage Spike's answer:
I have modified the schematic so that it matches FIgure 3: pin configuration for SOT886 (from datsheet of RFID SLES1203_1213). I have connected the transitor, Capacitor, and antenna. At this point would it be clear for a PCBA house what i am askinf for ?
simulate this circuit
AI: If it's on a PCB and all the components have pads, then usually a few files are generated with the component positions, a bill of materials (BOM) and reference designators indicate where all the components need to be. This is a good article on all the info to create a PCB. If you use Eagle cad or ki cad then the software is free.
The information on how to enter the information for the SL3S1203 can be found here, and the footprint looks like this:
However, if the above schematic is a modification for another board, or a board that has been already built the board house needs explicit\very exact instructions on how to make a custom modification.
Usually, I do the modification my self, provide a schematic and a picture and give step by step instructions on how to mount the components on the module. The instructions should be exact.
|
H: What's the benefits to using analog-to-digital conversion like PCM?
I was reading a textbook, Data Communications And Networking, by Behrouz A. Forouzan, which says:
A digital signal is superior to an analog signal. The tendency today is to change an analog signal to digital data.
I don't quite get it, how is a digital signal superior to an analog signal? What's the benefits of changing an analog signal to digital data?
AI: As with most things in engineering, it depends on the trade offs. If you want to add complexity in order to gain noise immunity, then yes the book is correct.
However, maybe you have a circuit where the analog source is only 0.1" away from the A2D, would I put a PCM circuit for that? No!
Maybe you have an analog sensor that requires an op-amp for some reason, now you have a nice low impedance driver, which can withstand noise better, so again, PCM isn't needed.
There are more applications for PCM than what I've described check Wikipedia:
Wikipedia on Pulse-code_modulation
To specifically address the questions:
how is a digital signal superior to an analog signal?
This typically has to do with noise immunity. An analog signal with 100mV of noise on it is most likely not very usable. However a digital signal with 100mV of noise on it will work just fine. Look at the Vih and Vil of almost any digital chip as a starting point.
What's the benefits of changing an analog signal to digital data?
This usually has to do with a storage requirement like in CDs(check the Wikipedia link), or transmitting over long distances or on a medium that only supports digital signals. In the later two cases, it really boils back down to noise immunity.
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H: P-MOS Selection for 12v application
First off, let me state that I am pretty new to FETs, so I'm still wrapping my head around the different characteristics.
The circuit below is a switch that will trigger a 12v (VIN=12v) signal to be constantly on, based on input from an MCU (MCU_TEL_ON=3.3v logic level).
The DMP1045UQ P-FET I originally used is wrong for the application because its Vgss is +/-8V.
As such, I've had multiple failures of this part.
I'm trying to source a P-FET suitable for the job (~5mA load, acceptable voltage drop of 0.5v and rise time is really not a factor either) and I'm between the DMP3098LQ and the PMV65XP.
My questions are:
Either one of these should work, correct?
The Vgs given my circuit is -12v, right?
What characteristics matter most when selecting a part for this particular job?
AI: What characteristics matter most when selecting a part for this
particular job?
Well, you haven't said what the load is and what volt-drop can be tolerated in the PMOS transistor. If I were to assume that \$R_{DS(ON)}\$ was the most important critieria I could make a comparison: -
The DMP1045UQ has around 25 milli ohms on-resistance but the DMP3098LQ is 83 milli ohms on-resistance at a load of 0.5 amps. I just chose 0.5 amps as a guess for what your load might be. So, if that criteria is important, then the DMP3098LQ may not be good enough.
The PMV65XP is about 55 milli ohm on-resistance at 0.5 amps so neither of the alternatives are significantly close to the original (failing) part to be considered.
But, you might not need such a high-spec on-resistance - only you can tell us.
Either one of these should work, correct?
Impossible to say without knowledge of your load and the acceptable volt-drop that can be tolerated in the PMOS transistor when driving it.
The Vgs given my circuit is -12v, right?
Correct on the face of it but, can that 12 volts rise any higher or lower when active - this might make a difference and, also, is it subject to noise or spikes superimposed on the 12 volts - this could make a massive difference to the choice of PMOSFET.
The characteristics of your load could ruin a few little MOSFETs if not taken properly into account. I'm thinking back-emf, inductive load etc..
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H: What is the meaning of this datasheet diameter notation?
I am reading this datasheet and I want to drill the correct size hole into the board and I am confused what 5-ø1.2 means.
I can't understand what the 5 and - sign mean? Your help would be greatly appreciated.
AI: It means that there are 5 (quantity) of these holes, each has a diameter of 1.2 mm (+0.1 mm / -0 mm).
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H: Getting 12 V, 110 mA supply
I am not too familiar in electronics, but I am currently using them for a Computer Science project.
I am connecting an electromagnetic door lock to a SPDT relay, so that the door can stay on NC and then be opened when I power the coil.
The problem is that I don't know how to to power the common pin as the electromagnet requires \$12\ V, 110\ mA\$. The best that I could find is a \$12\ V, 1\ A\$ plug that I don't think will work due to the power differences.
The link to the electromagnet I plan to use:
https://uk.banggood.com/DC-12V-60kg-Visible-Installation-Door-Cabinet-Magnetic-Lock-Access-Control-System-p-1241735.html?rmmds=search&cur_warehouse=CN
Any help to do this would be much appreciated.
AI: The fact that the power supply is rated \$12\ V\$ at \$1\ A\$ only means that the power supply can output up to \$1\ A\$. The actual current output will be based on the requirements of the specific circuit.
If I put to that supply a circuit that draws \$110\ mA\$, as in your case, that supply will output \$110\ mA\$ at \$12\ V\$, which is a little over a watt of power. If I connect a circuit that requires more than \$1\ A\$ to function, that specific supply won't be able to give enough current to the circuit since the maximum current the supply can provide is \$1\ A\$.
So if I want to power a circuit that requires a \$12\ V\$ rail at \$2\ A\$, for example, I'll need a supply which can output more than \$2\ A\$.
In your specific case a \$1\ A\$ supply for a \$110\ mA\$ circuit is well over enough. You could even do it with a much smaller \$0.5\ A\$ supply if all you need is \$110\ mA\$.
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H: Buck Converter has minimum output current
I was looking online for a buck converter and I came across this on eBay:
https://www.ebay.co.uk/itm/DC-DC-5-40V-to-3-3V-5V-9V-12V-24V-Buck-Step-Down-Converter-Volt-Linear-Regulator/263325140035?hash=item3d4f66c443:g:hwgAAOSwJyhdg0ay
What does it mean by a 1.5A minimum output current? Can it not handle a no-load condition?
AI: this is not a Buck converter... There's no inductor so it can't be. Linear reg.
the 1.5A isn't a minimum current draw, it's a repeat of the max current capability.
This is not a good part. Find a different one, it will generate a lot of heat. The abundant errors in the listing just say no. Don't buy it.
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H: CD4053B Supply Voltage Ambigious in Datasheet
I'm designing an analog voltage switcher based on the CD4053 and +-15V rails. By accident, I ordered the HEF4053 which clearly states that Vdd-Vee may not exceed 18V.
Now I'm looking at the TI CD4053B datasheet where it states:
Supply Voltage (V+ to V-, Voltages Referenced to VSS Terminal): Max 20V.
The question is: Can I run a CD4053 from Vee=-15V and Vdd=15V?
AI: Reference: Motorola CMOS LOGIC DATA DL131 Rev 2.
VDD > VSS > VEE
maximum between VDD and VEE is -0.5V to +18V. VSS is somewhere in-between.
"\$V_{DD}\$ voltage is the logic high voltage, the \$V_{SS}\$ voltage is logic low. For example, \$V_{DD} = 5V\$ = logic high at the control inputs. \$V_{SS} = GND = 0V\$ = logic low.
The maximum analog signal level is determined by \$V_{DD}\$ and \$V_{EE}\$. The \$V_{DD}\$ voltage determines the maximum recommended peak above \$V_{SS}\$. The \$V_{EE}\$ voltage determines the maximum swing below \$V_{SS}\$.[...]
If voltage transients above \$V_{DD}\$ and/or below \$V_{EE}\$ are anticipated on the analog channels, external diodes are recommended [...] small signal types able to absorb the maximum anticipated current surges during clipping."
Perhaps Texas Instruments allows a few more volts headroom than other manufacturers, but a difference of 30V between VDD and VEE is outside spec.
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H: Multiple output Flyback - Stacked transformer - Cross regulation - TL431
Suppose I have the following output stage of a flyback:
simulate this circuit – Schematic created using CircuitLab
The schematic is a bit simplified but the idea is here. Do not pay attetion to the values of the different components. They are not right. What I wanted to show is that the feedback is function of Vout1 and Vout2. The reference pin of the TL431 is about 2V5. When the reference pin is exceeded, the LED of the optocoupler begins to conduct as a rough approximation. In any case, there are many solutions on Vout1 and Vout2 for having 2V5 to the reference pin. So how could be define Vout2? or Vout1? At a certain point an equilibrium between the two outputs will be reach, but this equilibrium could be unstable? How does it work?
As the transformer is stacked, the ouput voltage Vout1 is function of the output voltage Vout2. Actually suppose there is the same number of windings between the two outputs, Vout1 is equal to 2 times Vout2. Then an equilibrium could be reached as there is only one unknown parameter into the previous equation for determining Vout1 (2Vout2) and Vout2 with the reference voltage of the TL431. Nevertheless if Vout1 = 2Vout2. Why do we need to add Vout1 to the feedback? As it seems that Vout1 is regulated through Vout 2? And this what we supposed by remplacing into the previous equation for determining Vout1 and Vout2 with the reference pin voltage.
The flyback is working in DCM.
Thank you very much and have a nice day!
AI: Actually suppose there is the same number of windings between the two outputs, Vout1 is equal to 2 times Vout2.
Without cross-regulation, nope.
Imagine you regulate only Vout1. Vout1's load current flows through Vout2's winding. So Vout2 will vary with Vout1's load. One common solution is using discrete windings and connecting the bottom end of Vout2's winding next to Vout2's rectifier diode (i.e. cathode).
Cross regulation with combined feedback kinda solves this problem. Please note that both outputs cannot be regulated tightly compared to regulating a single rail.
When there's only one output voltage to be regulated tightly using a shunt regulator (e.g. TL431), we all know that the output voltage is set by the divider resistors:
simulate this circuit – Schematic created using CircuitLab
Fig.1: Secondary-side regulation with a shunt regulator for single output voltage
Let's assume that the bias current through REF pin is zero.
$$
\mathrm{
I_{R6} = \frac{V_{REF}}{R6} = \frac{V_{o1} - V_{REF}}{R5} \\ \\ \therefore V_{o1}=V_{REF}(1 + \frac{R5}{R6})
}
$$
If there are multiple outputs to be regulated with a shunt regulator, things change a bit:
simulate this circuit
Fig.2: Secondary-side regulation with a shunt regulator for multiple output voltages
To determine the output voltages, a "regulation factor" should be defined for each output. These factors should be between 0 and 1, and the sum of the factors should be 1.0. If an output voltage should be regulated more tightly then its regulation factor should be greater than all the others.
Let's make the calculations for two output voltages as shown in OP's question.
$$
\mathrm{
I_{R6} = \frac{V_{REF}}{R6} = I_{R5} + I_{R7} \\ I_{R5} = \frac{V_{o1} - V_{REF}}{R5} \\ I_{R7} = \frac{V_{o2} - V_{REF}}{R7}
}
$$
Assuming Vo1 should be regulated more tightly than Vo2. Let the regulation factor for Vo1 be \$K_{Vo1}=0.7\$. So, the regulation factor for Vo2 will be \$K_{Vo2}=1 - 0.7 = 0.3\$. This means that the current flowing through R5 should be higher than that flowing through R7:
$$
\mathrm{\frac{I_{R5}}{I_{R7}} = \frac{K_{Vo1}}{K_{Vo2}} = \frac{0.7}{0.3}
}
$$
So,
$$
\mathrm{\\ I_{R6} = I_{R5} + I_{R7}
\\ I_{R5} = 0.7 \ I_{R6}
\\ I_{R7} = 0.3 \ I_{R6}
}
$$
The rest is simple: Pick a reasonable value for \$\mathrm{I_{R6}}\$ then calculate the rest.
EXAMPLE
We want to regulate Vo1 = 5V and Vo2 = 12V with single TL431. And the 5V-output should be regulated more tightly.
Let's pick \$\mathrm{K_{5V}}=0.6\$. So, \$\mathrm{K_{12V}}=0.4\$.
Let's pick \$\mathrm{I_{R6}= 0.5mA}\$, so we can calculate R6: \$\mathrm{R6=2.5V/0.5mA = 5k\Omega}\$.
We obtain \$\mathrm{I_{R5}=0.6\ I_{R6} = 0.3mA}\$ (1) and \$\mathrm{I_{R7}=0.4\ I_{R6} = 0.2mA}\$ (2).
Finally;
using (1), we obtain \$\mathrm{R5 = \frac{5V-2.5V}{0.3mA}=8.3k\Omega}\$.
and using (2), we obtain \$\mathrm{R7 = \frac{12V-2.5V}{0.2mA}=47.5k\Omega}\$.
FINAL NOTES
The greater the regulation factor, the better the regulation.
As I stated earlier, both outputs cannot be regulated tightly compared to regulating a single rail. In practice, there'll be slight fluctuations.
For single-output converters, the regulation factor for that output is 1.0.
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H: Motion sensor to detect birds and small animals but ignore humans
I would like to develop a motion activated sprinkler to deter birds (cranes and other smaller birds) and small animals from eating the fish in my pond. I am using the approach of controlling a solenoid valve via a PIR motion sensor. However, this means the thing will activate even if humans walk past it.
Is there any method to trigger it only for motion by small animals (say less than 2.5 ft height)? I'm open to suggestions on entirely different sensors/methods.
Based on some pet friendly intrusion alarm websites, it looks like there may be PIR sensors that can be tuned to differentiate between animals less than 50 pounds vs more. I just can't seem to find the existence of such sensors.
AI: Search Mouser for PIR sensors and look at the datasheets for what is available in terms of analog/digital outputs, detection ranges, and field of view.
Some ideas you can try out:
Differential FOV PIR:
Use two rather narrow FOV sensors. Aim one at the pond surface and aim the other in the same direction but above the pond surface.
Use a narrow FOV sensor and a wide FOV sensor. Aim the narrow FOV at the pond and aim the wide FOV sensor straight up. Since the FOV is wide and the sprinkler is low it should be able to capture tall things around it, including behind it. The result would be that as long as a human is nearby the sprinkler just never turns on.
In either case, you set things up so that the sprinkler turns on only when the sensor, and only the sensor, aimed directly at the pond detects something.
PIR + Proximity Sensor
PIR sensors have a pretty wide FOV, even the narrow FOV ones so the above methods might not pan out. But you could use a PIR sensor with a proximity sensor (such as near-IR) which is available in very narrow FOVs and aim it up to distinguish whether something tall is in the way. The sun could cause issues though for such a upward pointing sensor.
Thresholding:
Get a sensor with analog output and a MCU or comparator circuitry and find a threshold of non-zero movement to delineate between large warm bodies and small warm bodies moving around. The problem is PIR sensors give stronger readings the warmer a body is, the larger it is, the faster it is moving, and the closer it is so these are all variables. For example, setting it so the typical warm bird body moving around and bird-like speeds and typical distance could still allow a human moving slowly and far enough away from the sensor to trigger it.
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H: Charging a protected 18650 cell
I am new to electronics and just getting started with a project to make a BT speaker. I bought some quality protected 18650 Li-ion cells from Orbtronic. I would like to build a charger myself for these batteries using a 5V,3A wall adapter that I have.
Most people use the TP4056 to charge unprotected cells, which is fine, but
Do I need a TP4056 to charge my cells (one TP4056 per cell)?
If I don't need them, am I okay to hook up the 5V,3A wall adapter directly to the 18650 cells and rely on their protection circuit to charge them? Is this okay? It seems like the more dangerous of the 2 options.
I would appreciate any help or, better yet, any links you can provide.
AI: TP4056 is a charger chip for one (1) cell. If you plan to charge multiple cells simultaneously, each charging slot for a cell needs it's own TP4056.
Please don't even think about connecting a 5V 3A power supply directly to a lithium cell. Even though the cell has built in protection, it is not a charger. It is the last line of protection to prevent catastrophic failures by disconnecting the cell under abnormal conditions - unless the protection does not work.
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H: If there is a cable and jack standard for I2C?
I want to do a connection of multiple current and voltage meters, they connect by I2C. Is for to monitor solar panels and batteries, they will be a considerable distance from the master. I thinking use a 6P6C or RJ45 connectors for this. But first I want to know if there is a standard for cable colors or another type of connector for this, just for follow the protocols in case I want to expand my system or buy a new device.
AI: I2C specification does not specify any connector, as it is not a specification for an external interface. Many technologies that are based on I2C do specify a connector and pinout for an external interface, for example Access.bus has 4-pin connector. Lego Mindstorms also implements I2C over 6P6C connectors.
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H: adder in binary addition: XOR instead of OR gate
I am just a newbie starting out in electronics with no experience.
Why do we need XOR and AND gate for the binary adder? is there any particular reason why only these two specific gates are needed and used?
As I understand OR gate adds values (boolean algebra - X = A+B then why we use XOR gate at the beginning of the circuit and not OR gate?
AI: There are two outputs from a half-adder. These are sum and carry. Assuming A and B are the inputs, then their output tables look like this:
$$
\begin{align*}
{\begin{array}{c|c}
{ Sum }
& {
\begin{smallmatrix}
B\\
\begin{array}{cc}
\overbrace{\begin{array}{cc}0 & 1\end{array}}
\end{array}
\end{smallmatrix}
}\\
\hline
{
\begin{smallmatrix}
\begin{array}{r}
A \left\{
\begin{array}{c}
0\\
1
\end{array}
\right.\\
\end{array}
\end{smallmatrix}
}
& {
\begin{smallmatrix}
\begin{array}{c}
\left.\begin{array}{cc}0&1\\1&0\end{array}\right.\\
\end{array}
\end{smallmatrix}}
\end{array}}
&&&&
{\begin{array}{c|c}
{Carry }
& {
\begin{smallmatrix}
B\\
\begin{array}{cc}
\overbrace{\begin{array}{cc}0 & 1\end{array}}
\end{array}
\end{smallmatrix}
}\\
\hline
{
\begin{smallmatrix}
\begin{array}{r}
A \left\{
\begin{array}{c}
0\\
1
\end{array}
\right.\\
\end{array}
\end{smallmatrix}
}
& {
\begin{smallmatrix}
\begin{array}{c}
\left.\begin{array}{cc}0&0\\0&1\end{array}\right.\\
\end{array}
\end{smallmatrix}
}
\end{array}}
\end{align*}
$$
You could just put the above tables together into a single table that shows both the sum and the carry-out. Something like this:
$$
\begin{align*}
{\begin{array}{c|c}
{ }
& {
\begin{matrix}
B\\
\begin{array}{cc}
\overbrace{\begin{array}{cc}0 & 1\end{array}}
\end{array}
\end{matrix}
}\\
\hline
{
\begin{matrix}
\begin{array}{r}
A \left\{
\begin{array}{c}
0\\
1
\end{array}
\right.\\
\end{array}
\end{matrix}
}
& {
\begin{matrix}
\begin{array}{c}
\left.\begin{array}{cc}^00&^01\\^01&^10\end{array}\right.\\
\end{array}
\end{matrix}}
\end{array}}
\end{align*}
$$
Either way you draw it, the result is the same. The sum has the same truth table as an XOR does and the carry has the same truth table as an AND does.
It's that simple.
Don't get "mired" into words. Look at the behavior, not the words people use for things. You can know the name of a bird in every language on Earth and not know a single thing about the bird. The way you learn about the bird is to watch it and see how it behaves.
If someone says OR is (+), that's just a symbol that is supposed to imply a meaning to you -- but only if you've been trained about that meaning. In this case, it means inclusive as in, "If A is true, or if B is true, or if both A and B are true, then the result is true." Please note that this includes a special case where both are true! So the inclusive-OR, aka (+), is a little different than addition.
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H: Problem with SCR latching circuit
I put this circuit together to demonstrate latching properties of SCRs but I'm finding that the SCR doesn't behave as I expected it to from the datasheet values.
Specifically, I found that in the circuit as shown it will light when the switch is opened but not latch (i.e. it turns off as soon as the switch is closed again.) If I swap the LED for a small lamp it works fine. After some experimenting I found that it takes about 25 mA to latch.
So the disconnect for me is that according to the datasheet typical latching current is .2 mA and maximum is 5 mA. I know that the test conditions for those numbers are Vak = 12 V, Ig = 20 mA. I think for me Vak is ~ 7V (including LED Vf) so I guess that could explain it, but unfortunately there are no relevant graphs to refer to for more information. (Also I have tried with much higher gate currents with no difference.) Am I reading the datasheet wrong? Any other insights?
Update:
I added a 1k resistor between the switch and ground and now the circuit works as expected. So new question: why is the pulldown resistor required to make this function? Does it have something to do with jitter on the switch?
simulate this circuit – Schematic created using CircuitLab
AI: It is not guaranteed, but thyristors such as your SCR can act as GTO (gate turn off) devices.
Effectively the holding current increases if a low resistance is placed from gate to cathode. The connection diverts away some of the internal feedback current. Reverse bias on the gate can act similarly. If you make a synthetic SCR with two BJTs, it will always turn off with such a connection.
You will also observe a voltage from gate to cathode with the gate open and the SCR conducting current.
If you leave the switch connected to ground but add 1K in series with the gate you will see it behaving as you expected.
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H: What's the purpose of the capacitor in this circuit?
If this trigger pulse is starting the process of sweep generation, seems to me like it would be going directly to the base of the transistor (Q701) to switch it on and off, so the series of multiple transistors downstream can do their thing to generate a nice big sawtooth wave. However, with a capacitor being placed in-between the input signal and the transistor, it seems to me like it's killing the signal. The signal isn't actually doing anything now. The signal is dying post-capacitor. How is that productive?
AI: As mentioned in comments C701 is a DC blocking capacitor. The 5.6 volt bias voltage is part of a DC servo-loop to keep the final output saw-tooth at a specific DC level. C701 combined with a low resistance input does modify the square wave input, but as shown it is the edge that this circuit syncs to.
Without the DC blocking capacitor, which does have a high-pass filter effect as well, this circuit loses filtering of the square wave and loses the DC isolation it needs. C701 allows the square wave input to have most any DC reference, including zero volts, without upsetting the performance of the sweep generator.
Before being put into use this circuit had to pass military testing for accuracy and long-term stability, and a servo-loop is a good way to do that. Part of the "Hold-off" circuit feeds back part of the saw-tooth to the same 5.6 volt node. This prevents re-triggering of the sweep generator in the middle of a sweep.
The upper section of the sweep generator inserts a blanking pulse so the retrace of the sweep is blanked out, similar to analog TV.
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H: What does the term 10GA CT-PT means for a CT-PT wiring?
We have a MCC in our garage of commercial outlet facility. The bucket with the metering unit needs to be configured with the GE-PQM 2 (Power Quality Meter),and CTs and PTs are required to provide the signal to current and voltage inputs to the meter respectively. However, the specification for the bucket mentions, "the CT & PT wiring should be 10 GA". What does the term GA means ?
AI: Gauge.
It describes the wire sizing in AWG (American Wire Gauge) or kcmils (kilo-circular mils).
A 10-GA wire has a conductor diameter of ~2.6mm and a cross sectional area of ~5.3mm².
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H: What is the purpose of this FPGA + microcontroller based motor driver design?
I have used microcontrollers (Arduino, PIC, Atmel etc) so I am familiar with what they are and what they do (e.g I know about polling, interrupts and communication protocols like I2C, SPI, UART) but I have never used FPGAs before. So I don't understand why the following motor driver uses a FPGA (Altera Cyclone 2) together with a microchip (Atmel). Can someone explain the design logic? Why can't I just use a microcontroller directly with the two encoders? (Note that this item only has Japanese language info available)
http://t-frog.com/products/motor_driver/
AI: Using Google translate, that product is meant as a development board for motor control in robotics applications. FPGA allows much quicker or tighter control loops that would be crucial in running something like a robotic joint. FPGA is also a better fit in a development board because it can be reconfigured at the logic level.
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H: The memory regions I can write and cannot write to, ARM Cortex-M architecture
I hope my title is correct terminologicaly. I am working(learning) with STM32F4 discovery board, which has an STM32F407VGTx microcontroller on it. I really try to find the answers in the reference manual, but sometimes it is really hard to find even where to look. Maybe because of the fact that it is 1700+ pages long...
So, here the situation, during my tests(C code, compiler is arm-none-eabi-size), I realized that, I can write any value to peripheral registers, for example to GPIOD registers. But using same code (to write to an address), I am not able to write to, for example, 0x58(0x00000058 indeed) address. In case of peripheral registers, document clearly states which registers/bits are write enabled, which ones read-only with notations like 'r', 'rw'. However, for the address 0x58, I couldn't find the reason why I cannot write to it.
Any guidance, or explanation would be appreciated, thanks.
update:
Counter-question: Why should you be able to write to that address? Is something mapped to that? – Marcus Müller
OK, it is a bit interesting. I was just started to learn about external interrupts, and I want to do everything(thus including external interrupts) at register level, during my learning. So, that's why I did not use any functions from HAL, SPL, or CMSIS and also none of those files are present in the project directory. I kind of managed it, so I had EXTI pending register firing up correctly, but I could not manage to find a way to link a callback function to the interrupt which will define the process I want to be executed in case of the interrupt. Inspecting NVIC table(page 372) from the reference manual, revealed that each interrupt is related with a memory address on the last column. So, I thought, maybe, just an idea, those locations will contain the memory address(pointer) to the interrupt handler functions. So, I then thought to define a function and then write the address of that function into the 0x58 memory location. So that, when the interrupt comes, the microcontroller will look at 0x58, which will redirect it to location of the function of interest.
Yes, this update could have been a whole another question by itself. Sorry for the mess. I think the question can be answered without this story, but, a comment made me to also append this...
AI: You need to have a look at the processor's memory configuration. The Cortex-M4 implements the ARMv7-M architecture. Here's a grab of the top half of the memory map (annoyingly this is split over two pages in the M4's reference manual).
As you can see, the area 0x00000000 - 0x1FFFFFFF is allocated to Code. The STM implementation will not include an accessible path on the system AHB bus to that area, hence you cannot write to that address.
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H: Check If Arduino has FET
I have read that Arduino can be powered by both 12v from dc jack and from USB as it is equipped with FET which takes power from only one input. At the same time I read that many people destroyed their arduino as they were not equipped with FET. How do I know if mine has one? Basically I want to power from 12v and open Serial Monitor on USB.
AI: This is an example of Arduino with FET:
Check if you can find a similar component or add a clear picture of your board so we can assist you with it. Or just indicate the type and version.
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H: ULN2803 behavior when its output is not connected to any load in this circuit?
I'm studying the a circuit that is using a driver ULN2803 datashet. The driver is needed for external loads as LEDs when a pin is writing. The situation that I would like to talk about is when the pin is reading. As the GPIO interface is MCP23s17 datasheet, when pin is an input, pin gets Z state.
To explain the enterely application could be a mess, I will try focusing the description on the doubt about ULN2803 behavior within the circuit.
I'm new using it. I have used it for inductive loads, as relays, application once before. I thought I understood the most of this device. But after working with this circuit I realize that I miss some important things.
simulate this circuit – Schematic created using CircuitLab
I think the most important involved circuit is inside the green box.
Maybe the circuit is not functional for what I need. But I was analyizing it over the paper and set on my breadboard and I don't get it of all. So I took some values. I'm studying the value at M node when the output driver pin 'OUT_C' (OUT_C = IN_1) is not connected, so Z.
The following values can be seen:
V at (driver output) OutC = VCE = IN_1 = 2.4V
V at M node = 1.5V (driver input)
V at Diode IN4004 Anode = 2.9V
What I did not understand was how 1.4~1.5V were there (driver input). I actually need input driver to be having about 3V. I'm sure the device is working correctly and who was wrong it's me. The resistor values were firstly calculated in order to have V = 3.3V at M node if driver was OFF. I thought that if driver was OFF, no current drive, so it could be 3.3V at M node. Obviously I don't see that. But I need to understand these questions:
I guess the driver is ON but if it was, Vin(ON) = 2.4V. Maybe it is not.
How can M node achieve 1.5V. I don't see it. I even take into account internal driver resistors but I don't get 1.5V.
I don't see why Vdiode = 2.9V
I guess VCE = Vdiode - Vd = 2.9 - 0.6 = 2.3V
Feel free for answering where the mistakes are and tell me what is wrong.
AI: It looks as if it's behaving to specification.
A ULN2803 is not a three-state logic buffer as you've drawn it. It's a linear darlington transistor with an open collector. That means it needs about 1.4 V on the base to start turning it on.
Your 5 V VCC2 supply goes through a voltage divider string R1 R2 R3, that without D2 would turn the 2803 on. Its Thevnin equivalent at the input to the 2803 is about 3.3 V from 6.7k.
The 2803 will now turn on, pulling the R3 R1 junction down through D2. Obviously this will decrease the drive to the 2803, and it will start to turn off. It will reach equilibrium when its input is just turning it on enough for the current through D2 to provide enough input voltage to turn it on just enough. Those voltage values look plausible for exactly that.
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H: Find the energy stored in the capacitor
For the circuit shown in the figure. Assume that the swich is closed at t = 0
Find the final energy stored in the capacitor?
AI: The energy stored in a capacitor is equal to 1/2 * C * V²
Find the steady state voltage (clue: at the steady state, the capacitor acts as an open circuit), and then compute the stored energy using the formula above.
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H: What is the best way to tap 12v from a 6x6v battery array for intermittent loads?
Greetings beloved comrades,
I recently acquired a 36v golf cart that has 6 6v batteries in series. The existing 12v accessories, mainly lights, are powered by a separate series connection to 2 of the 6v batteries.
I don't like tapping only 2 of the batteries, since prolonged usage will imbalance the batteries and possibly require individual charging.
My question is: Can I wire 3 12v circuits in parallel from the 6 batteries for an always active supply, or would it be better to add a separate switched 36v circuit and a buck converter to get 12v?
I would prefer the first solution just to avoid buying a chunky switch and converter, but if the latter is better is for efficiency/battery life, I'll go that direction.
AI: I don't like tapping only 2 of the batteries, since prolonged usage will imbalance the batteries and possibly require individual charging.
Unlikely. The power draw from the accessories is probably small as compared to the engine draw.
Can I wire 3 12v circuits in parallel from the 6 batteries for an always active supply.
Not if you still need 36V for the engine as well.
or would it be better to add a separate switched 36v circuit and a buck converter to get 12v?
I assume you want to use the 36V from the engine supply. You can convert this down to 12V but that seems overkill and will also create some non-trivial losses (and cost)
If you are really worried about asymmetric use, simply switch the accessories to a different battery pair every 100 hours or so. If the accessories share a common ground with the engine, than you can just shuffle the batteries instead.
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H: Cortex M0 - Defining an interrupt routine in assembly
For a project I have some code that needs to be written in assembly due to precise timing requirements. I'd ideally like to implement my code in a timer interrupt routine. Right now, in C++ I can define an ISR as such:
extern "C" void TIM3_IRQHandler(void)
{
//code here
}
I'm using an STM32F030 chip, which from the datasheet shows that the Timer3 IRQ address is 0x00000080. My understanding is that there is an address stored at this location that marks the start of the interrupt handler.
How do I change the address at the above entry to point to the start address of my assembly code so that I can handle the interrupt in assembly? I know I can technically put inline assembly within the C function above, but there must be a way to handle the interrupt entirely in assembly.
I should note that I'm using the GNU ARM toolchain
AI: How do I change the address at the above entry to point to the start address of my assembly code so that I can handle the interrupt in assembly?
Asssuming default startup, just declare the function with the correct name in assembler:
.syntax unified
.thumb
.arch armv6m
.text
.global TIM3_IRQHandler
.thumb_func
TIM3_IRQHandler:
BX LR
.end
Note: This example will deadlock (read: infinitely tail-chain), since the timer flags are not resetted properly.
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H: PCB Footprints: SOT-363: SC-88 vs SC-70
I'm currently designing a PCB. One of the ICs I need to use is stated as being a "SOT-363 (SC-88)" part. In KiCAD, there is a footprint for a "SOT-363_SC-70" part.
What's the difference between an SC-88 and SC-70 footprint? I couldn't find a clear answer online.
Would I be okay in using the SOT-363:SC-70 footprint for my SOT-363:SC-88 IC?
Thanks.
AI: Comparing representative documents, it looks like the difference is that SC-88 is allowed to be slightly taller (1.1mm max) than SC-70 (1.0mm max). The PCB land pattern looks like it is the same, or compatible.
SOT-363 alias JEITA SC-88
https://www.nxp.com/docs/en/package-information/SOT363.pdf
pitch e1 = 0.65mm BSC (between successive centers)
distance between rows (center to center) = 1.8mm
recommend pad width 0.4mm x length 0.5mm to 0.6mm
EIAJ SC70-6 pin alias JEDEC MO-203AB
https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-sc-70/SOT_6_05-08-1638.pdf
pitch e = 0.65mm BSC (between successive centers)
distance between rows (center to center) = 1.8mm
recommend pad width 0.47mm max x length 1mm max
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H: Tachometer IC that does not require zero-crossings?
I recently built the basic tachometer circuit in this LM2917/LM2907 Datasheet shown below using the 8-Pin version of the device. I realize this circuit requires a VR pickup sensor, and so the LM2907/LM2917 must rely on triggering off of zero-crossings. But what if I have a square, 0-5V TTL input waveform? Can this IC even trigger off of a non-VR input frequency, or do I need to find another tachometer?
I can only think to use an op-amp to convert the 0 to 5 V TTL square wave to a -5 to 5 V. But that requires a negative voltage supply to the -Vcc rail of the op-amp, which I will not have access to.
Upon further reading of the datasheet, it talks about triggering off of a differential input using the 14-pin version of the device, and further explains this in section 10.1 paragraph 2 (page 13). Perhaps this is what I need? If so, how do you adjust the threshold to which it will trigger off of?
AI: I realize this circuit requires a VR pickup sensor, and so the
LM2907/LM2917 must rely on triggering off of zero-crossings.
The data sheet tells you that a zero cross does not trigger anything: -
You need to exceed a positive threshold and then return back below a negative threshold or it won't register anything - this is to avoid noise triggering causing a false count on the tacho circuit.
But what if I have a square, 0-5V TTL input waveform?
AC couple to the input with an RC network is the usual ploy and note that the 8 pin version can have a negative input as low as -28 volts with respect to ground: -
Upon further reading of the datasheet, it talks about triggering off
of a differential input using the 14-pin version of the device, and
further explains this in section 10.1 paragraph 2 (page 13).
If you want to put a 0 volt to 5 volt square wave in then set the "freed-up" and spare input to a DC voltage of 2.5 volts or use something like this: -
Basically the circuit above is called a data slicer and converts the average signal into a DC signal for use on one of the comparator inputs.
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H: Low Source Voltage: Driving 2V LED with 1.8V Signal, 5V Supply
I am trying to get a 2V LED to to turn on. The CARRIER_STB# signal is a 1.8V signal. I have a 5V supply connected to the drain. Below is a screenshot of my that part of my circuit. EN_3V3_1V8 has been disconnected for the purposes of testing, but will have to be part of the design. Though that does not seem to be a problem.
I am measuring 1.4V at source, which is not enough to turn on the LED.
I have already tried 4 different N-channel MOSFETs.
The first one I tried was the DMN62D0U-13. When that didn't work, I checked and realized that I might have to pick something with a lower Rds.
Then I tried three more, and none of them worked. The FDN327N, NTR3C21NZT1G, and the NTR4501NT1G.
AI: The problem is that you're trying to use the N-FET in a high-side source-follower configuration, but without enough voltage drive to accomplish the task. Why? The source will be one gate-source voltage (Vgs) below the gate. Switching FETs have Vgs thresholds of between 1.2 to 4V. Even a low threshold FET like a BSS138 (Vgs=1.3V), the best source voltage you will see is 1.8-1.3=0.5V. Not what you're looking for.
If you add a second N-FET as an inverter / level shifter and use a P-FET on the high side, that will give the desired result. See below.
simulate this circuit – Schematic created using CircuitLab
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H: Is there good inductor calculation software?
What's a good software package for calculating all-around parameters related to inductors? Not necessarily simulating them, but just static analysis with common quantities of interest. I've used ELSIE, a version of which came with the ARRL Handbook at one time, but I'm just wondering what else is out there. Preferably something that takes into account all relevant parameters for someone trying to build them by hand - turns ratio to voltage/current, wire gauge, core material, inductance, maybe B-H curve, and handles different types (regular air wound coils, toroid, maybe IF cans).
AI: The best I've found is the Coil32 software, available for free here Coil 32 Calculator
most calculators, including the ARRL book, use Wheeler's formula to approximate air core multi-layer inductors, this calculator uses more advanced Maxwell equation algorithms, you can calculate both single layer and multiple layer air core inductors, aswell as ferrite core inductors.
Also useful for cored inductors is the free Mini Ring Core Calculator. If you want something more advanced you'll have to look at EM simulation software such as CST.
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H: What is 2 layerd circles component in this circuit?
What is the 2 layered circles symbol in this circuit? What does it do?
AI: That’s a 2-terminal current source.
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H: op amps comparator or differential amplifier
I have a part of electronic schematic as described bellow, I'm a little bit confusing about the function of the LM321 amplifier. In this case, can we say that is a differential amplifier or just a comparator (open loop, no feedback, cause of the PNP transistor)?
I thank you for your support.
AI: When you see an opamp circuit and ask yourself is this open loop / a comparator or not?
Then first see if there is feedback.
If there is no connection back to the input(s) then it is a comparator:
Source
If there is feedback it can still be a comparator (possibly with hysteresis) but it can also be a linear amplifier.
Now check if the feedback is positive (feed forward) or negative (feed back).
Here's an example of a comparator with positive feedback meaning it has hysteresis:
Note how the signal going back goes to the + (positive) input of the opamp.
This is an example of negative feedback so this is a linear amplifier:
Note how the signal going back goes to the - (negative) input of the opamp.
In your circuit there is a PNP transistor in series with the feedback. (Next time, draw transistors with the arrow pointing down as that indicates the direction of the current flow which is from the positive supply down to ground.) This PNP is in a common collector configuration also called emitter follower. A property of that configuration is that it does not invert the signal (which common configuration does invert the signal?) so that means that the feedback isn't inverted and since the signal feeds back to the - input of the opamp, this is a linear amplifier circuit.
That means that the opamp will try (and when the circuit is dimensioned well, the opamp will succeed) and make the voltages at its + and - inputs the same. That means that the voltage across zener diode D1 is copied across Resistor R2.
I would draw the circuit like this as that makes it easier to understand:
simulate this circuit – Schematic created using CircuitLab
The result of that constant voltage across R2 is that the current through R2 will be constant as well. That constant current flows through Q1 into R3 which is the load. You can change the value of R3 (within practical limits) but the current through R3 would remain constant. This circuit is called a current source or current reference.
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H: Recommended discharge current of coin cell
I am thinking of using small coin cells to power white LEDs (20mA @ 3V FWD voltage). When I look at some coin cell specs sheets, I've seen "recommended discharge current" of only a few mA or less (e.g. >1mA or >3mA). If I choose a cell with 1mA recommended discharge current, does that mean I need 20 of them connected in parallel to provide 20mA (assuming cell has 3V rating)? But I have seen cheap LED lights powered by a single coin cell rated at only 1.4-1.6V (perhaps the LED has much lower forward voltage, but current must be much larger than a few mA).
So what exactly does the "recommended discharge current" mean in the coin cell specs, or does it matter at all for simple electronic project like lighting up LEDs?
AI: But I have seen plenty of cheap and small size LED lightning powered by only one coin cell rated at only 1.4-1.6V (perhaps the LED has much lower forward voltage, but current must be much larger than a few mA)
So have I, a 1.4 to 1.6 V coin cell isn't going to be able to light up an LED (unless a boost converter is used), so usually 3 of those 1.5 V cells are used in series or a single CR2032 or 2 of those in series are used for "cheap Chinese LED lights".
Those LED lights don't care about any datasheet! They're "designed" to be used and then thrown away. They rely on the internal series resistance of the coin cells and LED to limit the current. So when the cells are fresh, the LED might get a higher current than 20 mA. But since this is a "short lifespan"product, the manufacturer doesn't care.
Also the coin cells will be stressed and might not be able to deliver their full energy capacity. Again the manufacturer doesn't care as the user is supposed to buy a new one when the batteries are worn out.
You're trying to do a better job by looking at the datasheet and trying to use the cells within their recommended limits. For a good quality product, that's the way yo go!
Just don't assume everyone else does things that way, especially cheap products from China.
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H: How to drive high voltage transistor with low voltage op amp?
I'm trying to drive a darlington pair with 24 V collector voltage with an low voltage op amp. I tried adding a PNP transistor so the op amp just have to drive that single transistor, but haven't had any luck.
simulate this circuit – Schematic created using CircuitLab
How can I drive the transistor with low voltage op amp? is it even possible?
AI: I've rearranged your circuit to overcome the basic problems in the original: -
Purple box shows an NPN transistor and not a PNP
Blue box gets rid of the diode (the NPN will act like the original diode)
Red box is a reversal of the inputs to the op-amp to maintain correct negative feedback.
Previously your circuit would not have produced more than about 3 or 4 volts at the output due to the op-amp being unable to drive higher than 5 volts. Given that you had three transistors as emitter followers, the output level would be restricted by the upper output voltage that the op-amp could produce.
Now, the added NPN can be turned on or off by the op-amp well within its own power rails.
But, the next problem you will likely face is instability; because I've added gain into the feedback path (NPN as a common emitter), there is every chance that the circuit will become an oscillator at some highish frequency so you might need to add compensation around the op-amp like this: -
In red is an added emitter resistor - choose a value that is no less than one tenth of the resistor connected to the NPN collector
In red is a frequency compensation circuit that can reduce the open-loop gain and produce a a roll-off of no more than 6 dB per octave up to the unity gain point. This should ensure that the phase angle doesn't reach the oscillation point.
Simulation circuit
I used Micro-cap 12 to to a basic simulation of the DC levels to see that it functions: -
It produces 10.011 volts on the output for a reference input (V4) of 2.5 volts. Ideally it would be 10.000 volts but the op-amp I chose is a bit basic (LM324) and it has a significant input offset voltage that adds an error. The load is 100 ohms (R6) and it is drawing 100 mA as expected.
I used a TIP120 Darlington for the main power transistor.
Now If I look at the transient plot I get this: -
In other words it's significantly unstable but, I chose R2 (emitter resistor) to be 100 ohms to purposefully entice it to be unstable - If I make R2 into 1 kohm I get this: -
It looks fairly stable but, if I add 1 uF output capacitance across the load this happens: -
Not so stable now is it. So, integrating feedback around the op-amp will probably help. 220 pF and 1 kohm added to turn bare op-amp into an integrator: -
It's just at the cusp of being stable so I'd go for something in excess of 1 nF to kill the problem off.
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H: Why cap across shunt resistor, input bypass caps and small resistors on current sensing inputs?
I want to build a sensitive current sensing circuit using shunt, and since I also repair MacBooks occasionally, I have some contact with the schematics of real working expensive devices (although whoever follows Louis Rossmann, knows there are issues there too sometimes, but it's not the point here).
While browsing through the schematics of a macbook, I've noticed an interesting thing: most current sensing circuits are simply shunt resistors with each of their sides connected to current sense amplifier such as INA210. All cool and easy, no magic outside Hogwarts detected.
But when it comes to PPBUS (main power line) and charging power line, there is a 0.02R SHUNT, and sides of the shunt go through 10R RESISTOR each, then there is a CAPACITOR between the inputs of 0.047uF and a 0.1uF CAP on each input line to the ground. And only then the lines go into an IC. Why so much mess, while on other lines it's simply shunt straight to amp. Should I have something similar?
Here's a screenshot of that part of the circuit:
There is some info here about the small resistors, but it doesn't exactly compare what happens with resistors and without, like with: this happens. Without: this happens.
I still didn't understand how some 10 Ohm resistor is supposed to make things better if input impedance is like a megaohm or greater.
Besides, there is also a capacitor question (why cap across? why bypass caps there? what value? what for? should I do it too?)
AI: The basic purpose of a pair of resistors and a capacitor across the differential amplifier is to filter out the noise.
Measuring current is often noisy, and measuring critical current path requires clean input.
If you follow the design recommendation for Current Monitor IC INA219 in the datasheet, you'll find the exact same configuration:
I'll copy the verbatim as-is from the datasheet below:
The internal ADC is based on a delta-sigma (ΔΣ) front-end with a 500-kHz (±30%)
typical sampling rate. This architecture has good inherent noise
rejection; however, transients that occur at or very close to the
sampling rate harmonics can cause problems. Because these signals are
at 1 MHz and higher, they can be dealt with by incorporating filtering
at the input of the INA219. The high frequency enables the use of
low-value series resistors on the filter for negligible effects on
measurement accuracy. In general, filtering the INA219 input is only
necessary if there are transients at exact harmonics of the 500-kHz
(±30%) sampling rate (>1 MHz). Filter using the lowest possible series
resistance and ceramic capacitor. Recommended values are 0.1 to 1 μF.
Figure 14 shows the INA219 with an additional filter added at the
input.
Edit:
Is it a good idea to always include a noise filter?
It depends on several factors:
Your amplifier input bias current. If your amp has a relatively high input bias, then some current will leak into the amp, reducing measurement accuracy. The situation worsens if you're trying to measure low current (μA or nA). INA219 has 100 nA input bias current, so measuring tens of mA to several amperes will be good enough.
Your noise frequency. The low pass filter cannot, well, filter out the low-frequency noise.
But yeah, adding low-pass filter is generally a good practice.
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H: Question about symbol in front of MOSFET gate
I have a question about a symbol in front of a MOSFET gate.
The circuit that I am analyzing transforms almost ~311 V filtered and rectified DC to 48V DC. In images, I saw a symbol that is in green box. It looks like an inductor but there is no value on the schematic. I don't know what it means.
What's with the MOSFET is in this link.
I took a photo of the real circuit. As this answer says, it is a ferrite bead, yes. You can see it connected to the MOSFET's gate pin.
AI: It is a ferrite bead that goes on the gate terminal to kill RF oscillations.
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H: MOSFET in LTspice sim conducts below the threshold voltage
Electronics noob here! I'm trying to create a circuit that feeds the output of a piezo transducer into a comparator, in order bring an arduino pin high when the piezo's output exceeds the comparator's reference voltage.
The annoying thing with this is that in order to test it, I have to physically depress the piezo. So in order to allow remote testing, I am trying to add the capability of bringing the input to the comparator high using software (in essence "emulating" a voltage from the piezo's output).
Here's the circuit I came up with:
The voltage source MCU is how I've modelled an output pin on the arduino, and similarly for the Piezo voltage source - both of which are 5v pulses.
When I simulated the circuit, it appeared that the MOSFET M1 always conducted ~4.5V between the drain and the source, even when the gate voltage was 0. Here is the simulation:
You can see that the input to the comparator "V(CompIn)" is always high, even when the MOSFET should be off. I'm sure it's just my lack of experience but could someone tell me what I'm missing here?
AI: Add a pull-down resistor, maybe 5-50 kohms between the comparator input and ground.
Change the FET to a PMOS type. Keep the source and drain connections as they are.
Invert the signal from the MCU (send a 1 when you previously sent 0 and vice versa).
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H: Is this a battery holder or what?
I am loaned a prototype of an industrial device (running some Linux with an Android flavor). Each time I turn it off, it loses time, and I need to connect it to some Ethernet network then login by SSH to adjust it. The thing is going on tour for a demo (we make the application,) and our salesman hates it.
Sneaking in, I see this. To me it looks like a 3V battery holder without battery, perhaps because there is apparently not enough clearance around to insert one. I could fix this with wires and hot-melt, but I need to be sure.
Can someone confirm/infirm the intended use of this component?
Note: I would make sure the PCB is not attempting to charge the battery before, and after connecting one. Last thing I want is an explosion inside the thing!
AI: Yes, it is called a "coin cell retainer" and other various names. Small lithium coin cells are often used to keep a real time clock running for computers and embedded systems when they are off/sleeping.
Example MPD Datasheet
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H: Can someone help me establishing the polarity of this dc jack on my laptop motherboard?
So my laptop charger port is fried and I wanted to establish the polarity of the points on the board so I can solder a off the shelf jack instead of the original one which is not available anymore. I will use the original charger and replace the tip on its end to match the new jack so there shouldn't be any voltage/amperage issues. Here are the pictures of the same.
AI: Look at the charger end and you can determine the polarity with a multimeter.
In fact, the information is often printed on the power supply centre pin positive or negative... positive centre is most common but never guaranteed so always check.
Your port looks like it is rectangular so check.
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H: Is there a minimum length for SATA cables?
Today I stumbled across a piece of information that surprised me. Apparently there is a minimum cable length for SATA. From Seagate, a reputable manufacturer of SATA devices:
Serial ATA (SATA) data cable lengths
Serial ATA cables are available in many lengths up to 1 meter. Minimum cable length is 12 inches, using shorter cables can cause timing, or noise interference on the cable.
That is all the information they offer, and I could not find much information elsewhere. It is obvious that a cable can be too long: Signals will arrive too late, and eventually become attenuated. This is the first time I hear about cables being too short.
Since they measure the minimum length in inches it makes me think that it is not in the official standard, and something that they have found by trial-and-error, but can someone explain why this would be a problem in a (presumably well designed) standardized high frequency serial protocol?
AI: I have designed SATA asic serdes circuits and do not recall issues with short cables.
However, we do test for very long and very short length test cases to ensure sufficient signal integrity at either extreme, as sometimes a timing circuit or equalizer misbehaves when the signal is too clean.
For instance the timing recovery relies on a sloped transition between 0 and 1, and if the cable is too short, then the 0-to-1 and 1-to-0 slopes are too steep, and the timing recovery can become noisy (it's a long story). This can be an issue in asic test set-ups, but hardly in real deployments.
However, 12in seems to be a ridiculously high minimum.
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H: How to identify transformer pin out in genuine mobile charger?
can't find any information about it on Internet ,does there any practical procedure to identify, like removing it from circuit and measuring its coils resistance.
or a website that i can find information about it.as i think it is sort of fly-back oscillator.
Thanks in advance.
AI: It is a "high-frequency oscillator" of sorts. This is a SMPS or switch-mode power supply. Likely on the underside you'll find at least one integrated circuit and possible switching transistor (some IC's have the switch built-in.)
High-frequency transformers like this green one are very often custom-made for mass-production. You can try searching for the number printed on it, but might not find anything. Even prototype units, made from a transformer kit, are all custom-wound. Could disassemble it...
Without destroying it, you could desolder it, and use a multimeter on resistance scale to map-out what pins have what resistance to what. Pins with resistance are a winding. There are usually one primary winding (sometimes center-tapped), at least one secondary winding (also possibly center-tapped), and likely a single "aux" winding. Very often, several pins are not used and have no wire even going to them.
Identifying which winding is which can be challenging. If designed to boost voltage, the primary winding will likely have a lower resistance. Conversely, a "buck" design to reduce voltage will likely have a higher resistance on the primary. The aux winding doesn't have to power much, so may have a higher resistance and lower inductance.
Then use an LC meter to measure those resistances to get their inductance. Sketch these values onto paper in the shape of a proposed transformer schematic. Someone here could likely verify if it seems right.
Then get a signal generator. Set it to AC output, perhaps 1 volt. Connect it to the proposed primary. Measure the voltage at the primary, should be 1v. Then measure the proposed secondary and other windings. See if it agrees with speculation. A little trial-and-error like this and the transformer can be "mapped." Then go shopping for a similar one with these specs from any of the big electronics component vendors.
Note, CapXon brand electrolytic capacitor are notorious for failing prematurely.
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H: ESP32. - selecting resistors for voltage divider
I'm using an ESP32 with a 12V battery and solar panel. I've created a voltage divider for 0-15v (3.3v input to MCU at 15v at battery side).
For that I used a 100kOhm , and 300kOhm to get a 0.3 ratio.
For measuring purposes, result measured is close enough (0.1v error), but Battery-wise, selecting those resistors were a good choice ?
EDIT_1
MCU is powered using that 12v battery, using a buck converter.
12v battery is used, since it has a much bigger capacity (7Ah).
Charge voltages can get up to 13.5-14.0v, I took 15v as a upper limit.
4. The reason for asking was NOT about what ratio is better (0.3 or 0.25) in voltage divider, but what is right for consuming less power due to that R selection, since it seems battery drainage is faster than I expected.
AI: 0.25 ratio? That's 3v into the ESP at 12V. They are fine, impedance wise, but esp32 has a pretty poor ADC, it samples very fast so gets a lot of noise, and is poor linearity best the extremes of range.
Should divide it more, 12v batteries often go up to 14V or more when charging, and you want to avoid the high end of the ADC.
My advice... 100k, 500k (so divide 6) and a100nF cap across the ADC input and ground as close to the ESP as possible.
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H: My simulated coax cut off frequency is way far off the calculated value
I used the lumped model to model a coax cable as a low pass filter in MATLAB. I also included ESR which is supposed to resemble the dielectric losses.
I derived my transfer function from the circuit below. I used voltage division to get my transfer function.
simulate this circuit – Schematic created using CircuitLab
My MATLAB code has the transfer function "h" I derived:
Fs = 0.002;
s = 10: 1/Fs: 2*pi*1E9;
d = 1E-3;
D = 3E-3;
er_d = 1/(0.66)^2;
mu1 = 1;
mu2 = 1;
row1 = 0.234;
row2 = 0.234;
eo = 8.85*1E-12;
mu_o = 4*pi*1E-7;
ed = er_d*eo;
R1 = sqrt(s.*mu1*mu_o/(2*1/row1));
R2 = sqrt(s.*mu2*mu_o/(2*1/row2));
Rs = R1+R2;
%lumped model
L = mu_o/(2*pi) * log(D/d);
C = (2*pi*ed)/log(D/d);
R = Rs/pi .* (1/D + 1/d);
ESR = (1/(10E18)) ./ (ed * s.^2 * C);
%ESR = 0;
h = (1./(C.*s.*1i) + ESR) ./( 1./(C.*s.*1i) + ESR + R + L.*1i.*s);
figure(1)
plot(s, 20*log(abs(h)));
set(gca, 'Xscale', 'log')
ylim([-8 0])
title('Coax cable modulation')
xlabel('Frequency in Rad/s');
ylabel('Gain in dB per meter');
grid
fc = 3E8/(pi*(D+d)/2 * sqrt(1*er_d))
My -3dB frequency from the resulting figure is in the MHz when it is supposed to be in the GHz. Why is that? I would truly appreciate some help. Thnx :D
AI: This model unfortunately does not work. You have taken a inductance per meter, and assumed it means that 1 meter gives you that inductance as a lumped L. What you should do instead is break up a meter (or any other length) of coax into say 100 to 1000 pieces, calculate the Rl/Rc lump elements per segment (like the one you drew), and cascade them all. The smaller the segment the better your approximation.
You'll need to create a Matlab function to calculate the voltage divider, and then call it over and over again until you have all segments covered. You will see that the resulting impedance and transfer function are different from the one-lump model you have.
Here is an example of a cascade. It's taken from wikipedia on the topic of filters, but this is the idea. You need to add your R losses, and work from one end to the other, one segment at a time. Add a matched load Zload = Z0 to start with on the right hand side.
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H: Parallel resistors circuit analysis question
I started by combining resistors in parallel so instead of 4k and 12k I can get 3k but then as the independent current source exists in the middle confuses me what to do next. Can someone guide me through?
AI: It often helps a lot to just re-draw the schematic:
simulate this circuit – Schematic created using CircuitLab
You are allowed to pick any one node, your call, and simply say "this node is \$0\:\text{V}\$." Doing so can often help you sort out the rest.
(You can do this because otherwise, let's say, we add one million volts to all of the nodes of a circuit. Does that change the circuit? Nope. Still runs the same. So you can make an adjustment to all the nodes, so long as you make it equally to all of them. Turns out it is very convenient to make one of them exactly zero volts. As shown above.)
You should be able to see that I've correctly labeled the unknown nodes (just two of them.) I've negated \$V_1\$ in the schematic because that's how they want it performed, looking over their schematic and comparing it to what I developed above. It's now your goal to figure them out.
Here, you should be able to see some resistors in parallel, which can be immediately combined. You can also see how the current source and one of the resistors can be Thevenized before further steps where all you have left is a resistor voltage divider.
It shouldn't be that hard, from here. Do you see how much easier it is once you just sit down and re-draw a schematic for readability??
Postscript -- Drawing Schematics
I've written on this topic a number of times, here. For example, see the Postscript at bottom, here and/or see the note at the top, here and better yet see the whole discussion and some of my own history learning about this, here.
I'll leave these uncopied into this answer because I think it is sufficient to simply provide those above links, which are now easy enough to reach from here.
Instead, let's take your specific circuit and see what I did to it:
You should be able to see here how I achieved the new schematic form and you should be able to also recognize that I did not change it, at all. It's the exact same schematic, drawn differently.
I didn't have access, as a child, to much. Electronics was a way to make things for myself that I could not otherwise have any hope to afford. I grew up as a very poor child -- I worked the vegetable and berry fields as a common child laborer just to eat, each day.
I also, of course, had no access to teachers or training nor any hope of being able to afford the same on my own. What I did have was access to library systems. And so I read a lot.
The circuits published in Popular Electronics or Radio Electronics were, for the most part, drawn for construction purposes and not for understanding. So I mostly found them very confusing and difficult to fathom. Especially, given no one else I could talk with or discuss circuit design.
I don't recall the moment, precisely. But there was a moment of insight when I figured out that if I spent some time re-drawing schematics (over and over, earlier, but I got better at knowing what to do with time), I could actually get glimmers of understanding where the initial schematic still left me completely without a clue. In short, I discovered the idea that schematics could, in fact, be re-drawn and that once I did this I could begin to fathom them better.
One of the things that really stood in my way was all that "wiring stuff." Busing wires around just makes the schematic "look busy" and as if there were signals riding around on the power lines. It took me some time to realize that signals don't travel on power rails (hopefully) and that I could "clean up" the schematic for understanding by just removing them and marking them with the voltage, instead.
Much later, after being self-employed for almost four years doing Altair 8800 and IMSAI 8080 programming for businesses in the local area (I had built a small wire-wrapped computer of my own in 1974, too), I secured my only full-time job as an employee of any company. (I've been self-employed the rest of my life.) This was as a computer programmer for Tektronix.
I have never had any classes on electronics. Not before Tektronix, not after Tektronix, and not while I worked at Tektronix. Electronics is and always has been nothing more than a modest hobby for me. I've never done any professional work in it, nor would I consider ever holding myself out as a professional in this area. I'm just a hobbyist, plain and simple.
That said, I did luck out and manage to find and take a class at Tektronix on drafting schematics. Towards the end of those classes, the teacher selected me out from the rest of the class as having a unique skill and he wanted me to consider it as a possible job at Tektronix. He wanted to hire me away from programming there, I guess.
I think those early struggles when I was trying to turn schematics designed for building into schematics designed for understanding helped me. I'd had practice at it, when younger, because I cared to understand something and not just build it. I suppose the result of those earlier efforts helped lead me in a good direction with respect to drawing schematics.
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H: Art of Electronics 2.5 - Transistor saturation
With reference to the image below the text says
When the switch is closed, the base rises to 0.6 V (base– emitter diode is in forward conduction). The drop across the base resistor is 9.4 V, so the base current is 9.4 mA. Blind application of Rule 4 gives IC = 940 mA (for a typi- cal beta of 100). That is wrong. Why? Because rule 4 holds only if Rule 1 is obeyed: at a collector current of 100 mA the lamp has 10 V across it. To get a higher current you would have to pull the collector below ground. A transistor can’t do this, and the result is what’s called saturation – the collector goes as close to ground as it can (typical sat- uration voltages are about 0.05–0.2 V, see Chapter 2x.) and stays there. In this case, the lamp goes on, with its rated 10 V across it.
Rule 1 is: The collector must be more positive than the emitter.
I’m missing a step - how would a negative collector voltage obey this rule and result in a higher current?
AI: It's not as complex as you imagine.
Let's look at a slightly re-drawn, but equivalent circuit diagram:
simulate this circuit – Schematic created using CircuitLab
There's no need for the switch, since we can just assume the switch is active and connecting the \$+10\:\text{V}\$ power rail to resistor \$R_1\$. That, plus separating the power supply rails as I do above keeps things about as simple to read, as possible. I've used a \$\frac{10\:\text{V}}{100\:\text{mA}}=100\:\Omega\$ lamp resistance, since that's what your problem statement also implies.
First thing to do is to notice that there is only \$0\:\text{V}\$ (ground) and \$+10\:\text{V}\$ (the other rail voltage.) These are the only voltages available to the circuit. Technically, these might instead be \$+1087\:\text{V}\$ and \$+1097\:\text{V}\$. It really doesn't matter. The point is that there is a \$10\:\text{V}\$ difference. And that's all you need to know.
Since the entire circuit sits between these two rails, all of the voltages within the circuit must also be between these voltages. Assuming \$0\:\text{V}\$ and \$+10\:\text{V}\$, this means that everything inside the circuit must be a value between those two because there's no access to anything outside that range. It's really as simple as that.
Once you accept this reality, then the rest isn't that complex. There are two nodes in the circuit other than the \$0\:\text{V}\$ node and the \$+10\:\text{V}\$ node. This is the base, which will have some voltage between the two, and the collector, which also will have some voltage between the same two.
Since the base-emitter junction, forward-biased, is just a diode-junction it will have about the \$600\:\text{mV}\$ (up to perhaps a few hundred millivolts more, in extreme circumstances) across it. This pretty much means that the base voltage is relatively accurately knowable. It will be about \$+600\:\text{mV}\$. Note that this is, in fact, between the two rails. It's not impossible, at all.
Now, the collector itself must also be between the two rails. Somewhere between \$0\:\text{V}\$ and \$+10\:\text{V}\$. It cannot be negative. It's not possible. Sorry. So why do the authors even bother to mention the idea of a negative collector voltage???
It's because of the idea of \$\beta\$. It turns out that \$\beta\$ is a useful thing to know if, and only if, the BJT is in active mode and is not saturated. It represents the ratio of collector current to base current, in that case. And so long as the collector voltage is not forced to be close to the emitter voltage, you can apply this idea well. So, for the example here, so long as the collector remains between about \$+600\:\text{mV}\$ and \$+10\:\text{V}\$, then the BJT is in active mode and the \$\beta\$ value matters more. But if the collector voltage gets closer to the emitter voltage, here if it goes below \$+600\:\text{mV}\$, then the idea of \$\beta\$ no longer applies and you need to stop using it. In this case, you need to instead just "set" the collector voltage to something below the base voltage, often this is something like \$+200\:\text{mV}\$, and call it good. But this also means you've given up on the active mode of the BJT and have decided that it is now saturated in-mind.
If you are curious about how to tell, it's not hard. In this case, as the authors point out, the base current is \$\frac{10\:\text{V}-600\:\text{mV}}{1\:\text{k}\Omega}=9.4\:\text{mA}\$. Assuming a typical \$\beta=100\$ is still valid (and we don't know, just yet), then we'd assume also that the collector current would be \$\beta\cdot I_\text{B}=100\cdot 9.4\:\text{mA}=940\:\text{mA}\$. That's the rule if and only if this doesn't also imply an impossible collector voltage.
So let's test it. If the lamp is \$100\:\Omega\$ (see above calculation with respect to this value), then the voltage drop across the lamp would have to be \$100\:\Omega\cdot 940\:\text{mA}=94\:\text{V}\$. But, if you buy that argument, then this means the collector voltage has to be \$+10\:\text{V}-94\:\text{V}=-84\:\text{V}\$. Now, we know that this is simply impossible. There's no source around anywhere that has that kind of negative voltage. It's just not in the circuit. And there is no way a simple BJT can manufacture, out of thin air, this kind of voltage. It just doesn't happen.
Instead, the collector voltage is pushed as close as possible to the emitter voltage and then the process stops. So this means the collector voltage is likely very close to \$0\:\text{V}\$. Maybe \$100\:\text{mV}\$, maybe less, maybe a little more. But it will be very, very close to the emitter voltage, which as you can see is exactly \$0\:\text{V}\$.
So, we can say that the current in the lamp is, at most, about \$\frac{10\:\text{V}}{100\:\Omega}\approx 100\:\text{mA}\$. Since the collector cannot get exactly to the emitter voltage, it's more likely something like \$\frac{10\:\text{V}-100\:\text{mV}}{100\:\Omega}\approx 99\:\text{mA}\$. As you can see, that's not much of a difference to worry over.
So this only means that \$\beta=\frac{99\:\text{mA}}{9.4\:\text{mA}}\approx 10.5\$. Which tells us that the prior idea of a fixed and exact \$\beta\ge 100\$ no longer applies because the BJT is now saturated.
Why is it saturated? Because the lamp load forces the BJT into saturation mode. The BJT itself doesn't determine this. For example, if you shorted out the lamp, then the BJT would not be saturated and the idea of \$\beta\$ would then apply and the collector current would be calculated to be \$940\:\text{mA}\$ and this would be about right, too. But with the added lamp, which then acts to force down the collector voltage with increasing collector current, it is entirely possible now for the BJT to become saturated. In short, it is the entire circuit and not the BJT by itself that determines whether or not a BJT can be, or is, saturated.
But if you used a different lamp, say one with only \$5\:\Omega\$ resistance, then the BJT's collector would be \$10\:\text{V}-\left(\beta=100\right)\cdot 9.4\:\text{mA}\cdot 5\:\Omega=5.3\:\text{V}\$ and the collector voltage would be quite a bit above the emitter voltage and in active mode. So, here, \$\beta=100\$ would still apply and you could calculate the value just fine.
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H: Suggestions for TDA2030 Audio Amplifier
Please suggest any ways to improve punch or bass of the sound for the following audio amplifier using TDA2030A. The sound output of the amplifier lacks some bass. Can I use TDA2050 to improve sound quality?
I am driving a 5W 8ohms speaker.
Note: This is not a subwoofer circuit, it's a normal speaker.
I will be happy to know about some errors and improvements for the circuit.
This is a picture of my speaker
AI: Sound depends on the signal content, amp, speaker , acoustic environment (=interacts with speakers) and what the listener likes.
If it happens that the amp power is high enough and the speakers are good enough for increasing the bass content of the signal you can insert a bass boost circuit. Change R1 to about 200kOhm and insert with parallel of R1 the series of another about 200kOhm resistor and a capacitor. That lifts bass 6dB with "shelving" principle. A good start for finding a good capacitor is 6,8nF.
Hopefully you can make elementary reactance calculations. Otherwise understanding this quantitatively is hopeless. Qualitatively the idea is to double the voltage gain and take it back gradually as the frequency grows.
As well you can add another 100kOhm in series with R1 and insert a capacitor in parallel with it. A good start for finding a good capacitor is 15 nF.
Nothing guarantees this kind of bass boosting is what you expect.The concept is complex and proper solution needs to know what you expect, what your signal has and what the speakers can output with power this low. I guess you must make C3 smaller to prevent sub-bass notes smudge everything after you have lifted things around 100Hz.
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H: Mono to stereo circuit only if one cable is plugged in
Im not sure how to phrase my question or what to google, but does anyone know how this feature is implemented (eg a simple example circuit):
On some audio mixers, if only the left channel is plugged in, the audio from this input will be split across the left and right channels. However if both left and right inputs are connected, then the audio from the left and right inputs will remain separated on the left and right channels.
For example, a behringer q502 mixer has this functionality, it is marked on the mixer as "mono L"
I know this could be implemented by having a separate switch to toggle between stereo and mono inputs, but im curious how this is done by simply plugging in a TRS cable.
AI: It will likely use a mono jack socket with a transfer switch like this: -
Then inter-wire NC and NO contacts like this (blue and purple): -
So, if the LEFT jack is inserted it will naturally connect its tip to the amplifier and also connect the tip to its NO contact. That NO contact connects to the right NC contact (blue wire) which connects to the right tip circuit when the right jack plug is not inserted: -
The purple wire is for when the right jack is inserted.
This should produce a left and right balanced mono signal if either left or right jacks are plugged in. When both are plugged in, you get normal left and right stereo and no cross-connection between the channels.
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H: Can I solder two USB cables together?
I've got two USB computer mice, one with a defect click button and one with a defect USB plug. Would there any issue if I simply cut them open and soldered together the mouse part of one with the USB plug from the other? Or the USB plug from any old USB cable, for that matter.
They're both USB-A and not USB3. I know that there's a length limit for USB to get timing to work. Would a so-so solder job affect that? Could there be any other electronics in the plug part that differs between them?
AI: Soldering in a replacement usb cable is easy enough, just make sure that the correct wires go on the correct terminals.
Most usb cables have red and black as supply positive and negative, while the data pair are green and white. If different you need to check which is which with a multimeter or continuity tester.
Just to show one, this is from an old cable I was testing something else with:
Note that the "red" is more pink...
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H: Low Power SPI Module communication between Microcontrollers
I have 2 microcontrollers - one is S32K118 and other is S32K142. Both are 64 pins. S32K1xx datasheet
I need communication between the Microcontrollers in SPI Configuration.
Suppose the microcontroller supports 2 LPSPI modules, say LPSPI0, LPSPI1, LPSPI2.
For that, I need to connect the LPSPI0 module pins from one microcontroller to the LPSPI0 module pins in the other microcontroller, right?
Or it doesn't matter if the SPI communication between one microcontroller and the another microcontroller takes places on different SPI modules, like say LPSPI0 in 1st and LPSPI1 in another microcontroller? or LPSPI1 in 1st controller and LPSPI2 in the second controller?
And what about the chip select pin?
Which module should I select for the chip select in SPI communication between the microcontrollers? Why are they 2 modules for chip select? Like, which should I choose based on which will act as the master microcontroller initiating the SPI communication and which microcontroller will act as the slave.
This SPI Communcation is only between the 2 microcontrollers.
Please explain to clear this confusion. Stuck here.
Any recommendations?
AI: It does not matter which SPI module you use, so you can connect SPI0 of one microcontroller to SPI1 of the other. The SPI modules (like any others) are independent of each other.
The main reason there are multiple SPI's is to connect two devices (each with their own SPI controller), or to have a more flexible configuration. Mostly pins are having multiple functions, and by using SPI0, maybe UART1 does not work as they share pins, so you can use SPI1.
For the chip select pins, if you use SPI1, you should use CS1. On some microcontrollers I thought they can be any pin, but with the ones you use it seems to be hard-wired.
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H: Are passive piezo speaker more reliable than magnetic ones?
I'm going to use sound notification in my desing (just beeping). My buzzer needs to be suited for cold ambient conditions (up to 0 celcius degrees), high humidity and shocks. Which buzzer type will be more aproperiate? Is it true that piezo buzzers are more reliable?
AI: since your question is in general terms, with no specific numbers such as required lifetime, humidity levels, shock levels, etc. , one can only answer in general terms. Magnetic (voice coil) speakers are reliable (again, no numbers) but the vibrating membrane poses a potential fault problem since it is fragile compared to a piezo speaker which has none. However piezo materials are relatively brittle and can shatter or crack when exposed to shock. Also note that a magnetic speaker probably won't fail completely even if the membrane tears but a piezo speaker will stop working if it shatters.
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H: how to solve the phase shift of a ne555 timer
Why is the first pulse wave is not the same as the rest of the wave in this 555 timer?
Is there any way to remove the wave before 2 ms or is there anyway to make it same as the rest in the graph.
AI: This likely only happens at the power-on situation because the capacitor on the 555 has to begin its charging sequence from 0 volts. In all other cases, the capacitor never gets fully discharged hence, it behaves properly.
Reasons not to use the NE555
Also problematic is that the 741 (a dinosaur that was developed before a man landed on the moon) is not rated to run on an 8 volt supply - it needs at least 10 volts.
Also, you are feeding an AC signal into a 741 input that can go 2 volts below the most negative pin on the 741 and this is likely to cause problems if not damage the part.
Given also that the common-mode input range does not extend to it's negative rail pin, you are likely to get very surprising results in real life and quite possibly when using the simulation.
Reasons not to use a 741.
May I also remind you of something I said on your previous question: -
You need to find an op-amp that can handle below the negative rail input signals. There are few (not many and maybe hard to get). But when you do find one you will have a sinewave to square wave circuit and then you need to convert edges to pulses hence what I said about an RC circuit and an exclusive or gate.
So, use an exclusive or gate to turn a square wave (green) into a pulse output (red): -
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H: What happens to the steady state of the series RC circuit if changes happen to any circuit element?
The question that I'm trying to understand is the following:
In any series RC circuit that is in steady state, WHEN any of the
elements changes (R, C, or applied voltage), the following will happen to the
circuit:
(A) The circuit will briefly operate in steady state then gradually go
on a transient state.
(B) The circuit will immediately go on a
transient state then reach a steady state.
(C) The circuit will
immediately go to a transient state.
My answer is B since, according to the textbook, the transient response is a circuit's temporary response that will die out with time and the steady-state response stays for a long time after an external excitation is applied. Now, is that external excitation include changes in any of the circuit elements?
AI: My answer is B
It all depends how they change - if they change to a new static value(s) then "B" is the answer. If they change and continue to change then "C" might be the answer.
My answer is B since, according to the textbook, the transient
response is a circuit's temporary response that will die out with time
and the steady-state response stays for a long time after an external
excitation is applied.
Then there's the consideration of AC transient response.
If the input voltage becomes a sinewave i.e. is continuously changing sinusoidally, then the AC response on the output has a transient response leading to a non-static steady-state response because, the output will also "become" a sinewave (with phase shift) after the transient response has died down.
So, it all depends what you mean.
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H: Analog 0...10V signal splitting
I've been trying to solve a problem, but a few days of searching has yielded nothing, and I'm inexperienced to create my own electronic circuit. First, let me explain the problem. We use data acquired (hijacked) with the monitor in our control loop to send setpoints to the source whose feedback must be connected to the sink (they are both from the same OEM, and this connection is "crucial").
We can log feedback from the source by connecting the OEMs diagnostic tool and compare it to the feedback we measure by monitor. We noticed that when both Sink and Monitor are connected, an additional dynamic is introduced into the signal measured by the monitor with tau being up to 0.2 - 0.3 seconds. This dynamic disappears if we connect only monitor to the source (but the system doesn't work if the sink has no feedback).
My idea for this problem was to split the signal with either operational amplifiers or optocouplers. But I don't even know where to start, let alone choose the correct components, and I believe my initial ideas are very naive. For example, a wire going from source to sink to pass through an optocoupler to copy the signal for the monitor, or, copy signal twice (we have 24V and 12V in the system, and if something like this is plausible, I know we need to add resistors to divide the voltage for it to be 0-10V):
Am I on the right track? Are there ICs that can simplify this, or even solve it out of the box? What would be the best solution?
EDIT: additional info about the time scale. Here is a plot of measured values from the left case in the first picture. The red full line is a setpoint we've sent to the source, the blue dotted line is setpoint he is receiving, yellow dotted is the feedback he is sending, and the purple full line is the raw feedback we measure with the monitor (no LP filter, only scaled from raw voltage to deg). Logged data by OEMs tool has a small and variable sample rate, with the lowest sample time being 100ms; our sample rate is 62.5Hz. Timestamps are synced by hand, so dotted and full lines may be off by a few ms.
AI: That solution of using opto-coupler wouldn't work for your problem if "linearity" matters in your system. The input resistance of SINK and MONITOR seems quite high enough, but their input capacitance might have caused the problem of delayed rising.
Anyway, your problem most likely will be solved if you use an Analog Buffer (which is linear). The simplest circuit to do that is to use an Emitter-follower as a buffer. You should connect the output of the Source unit to the input of this buffer and connect the output of buffer to your monitoring system. However, there's a problem that you have a 0.6v drop in your voltage through the emitter-follower buffer.
A more accurate analog-buffer can be implemented by an OPAMP. The advantage of using an Opamp-buffer is that its input impedance is pretty high, its output impedance is pretty low and there's no voltage drop across it.
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H: Switch "On"/"Off" RS485 data lines
i'm doing some researches about how to close/open RS485 data line in my RS485 multi device bus.
I'm following this nice research-document: Link Here.
Basically i'm thinking how to solve this problem in a real-world environment, as you can see in page 43, the strategy is very simple: every slave, using a microcontroller and a relay, will have A-B data lines normally closed, and when the master want to set/reset/reconfigure the slaves address it will manage the relay coil and sends to the respective slave the "configuration" messages.
I wish to receive some advices in how i can manage the RS485 data lines using a low cost and effective solution without using a relay: my goal is to develop the same system using smd components.
EDIT: WHY?
I have 10 contact sensors that are placed around my home, they monitor the door open/close status and using RS485 trancievers the slaves (that are equipped with an ATMEGA328P) will expose those information to the master of the bus.
Now, i want to be free to position those devices in my home without worrying to set a slave address hardcoded in my firmware or using hardware dip-switches.
They are connected using a CAT5e cable and the total length is around 20 meters, the cable will transport: A-B-VCC-GND.
Every device is wired in daisy chain mode and the preceding device will control the power up of the following sensor, using a mosfet on GND controlled by the MCU (as reported in the image below):
I don't know if that can really work: the RS485 data lines are connected anyway, also if the circuit is not powered on...
Basically, this "sequential power up" is intended to solve the issue to know "where (for example) is located the device with id 3?"
Any suggestions?
AI: You will need a switch of some sort. Maybe a relay, but an analog mux is probably better if you can find a suitable one (low enough resistance and rugged enough for RS-485 (aka high working voltage and ESD protected).
If you can't find higher voltage switches with low enough resistance, you may need to add a repeater in each slave so that the series resistance of the switches doesn't accumulate.
The sequence (which I concocted just now) that happens is this:
All slaves boot up with the next slave connected to the chain.
Master sends a "count-in start" command that is received by all slaves.
In response to the "count-in start" command, all slaves go into a mode expecting count-in communications from the master and disconnect the next slave from the chain leaving only the first slave connected to the master.
Master communicates with the first (and only connected) slave and counts it in.
Upon completion of count-in, the first slave connects the next slave to the chain and waits for a "count-in finished" command. Otherwise it ignores all messages.
The master starts sending count-in messages which are only responded to by the most recently connected slave (since all the others are either disconnected or ignoring everything except for the "count-in finished" command) and counts itself in.
Upon completion of count-in, the slave connects the next slave up and waits for a "count-in finished" command. Otherwise it ignores all messages.
Repeat steps 6 through 7 until all slaves are counted in. You can detect when there are no slaves left with a time-out.
Master sends "count-in finished" command which causes all slaves.
simulate this circuit – Schematic created using CircuitLab
The way the temrination resistors are portrayed here isn't quite what it needs to be for RS-485. But hopefully it gives you an idea of how to use the DPDT switch to disconnect the next slave while swapping it in for a termination.
I do not recommend using the RS-422 method (mentioned by others) where there is only a dedicated bus running between two adjacent slaves and there is no global bus running to all slaves. I did this on an old project of mine so that the slaves could count themselves in and though it did work, there were problems.
First, it was very slow to propagate messages down the chain in a game of telephone.
Second, sometimes hiccups would happen and messages would stop propagating down the chain mid-way, especially when the system was busier doing other things). It was a DMA, interrupt driven system and I was never able to pinpoint what exactly caused this to be able to fix it. I ended up adding message verification and sending the command in multiple times but never did find the root cause.
Third, it could not repeat long messages down the chain (i.e. data logs) because they the message would get interrupted. I don't know why this happened to this day since the DMA buffer should have been able to handle it. Then again, I can't remember if it sent complete data logs for the slave nearest to the master. It might not have been a fault of the forwarding down the chain.
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H: A quetion about how an electric shock game works
can someone explain to me why does the current pass through his hands? why doesn't it pass only through the aluminum since electricity always chooses the easiest path?
https://www.youtube.com/watch?v=7QIcdQPwLmg&t=331s
AI: We see later on in the video a clearer view of the handle of the jack in the box.
It has been wired with two separate pieces of aluminium foil, each connected to one side of the spark generator.
When you hold it with two fingers, one on each piece of foil, your fingers complete the circuit and allow a current to flow.
While not the reason for this, I want to correct a common misconception in your question:
since electricity always chooses the easiest path
This is not correct. A current will flow through all paths, with the flow being inversely proportional to the resistance of the path. If you connect a high value resistor in parallel with a low value resistor, current will flow through both - a larger current will flow through the low value resistor.
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H: Colpitts Oscillator Issue
how are you all doing?
I have been experimenting with the Colpitts Oscillator and encountered a minor issue that I would like to resolve. Here are the two circuits - the first one is working flawlessly, while the second one isn't. Notice that the BJT biasing is exactly the same for the both of them.
First Circuit (Working)
Second Circuit (Not Working)
It is interesting to note that the circuit is oscillating in the LTSpice simulation.
What is the issue with the second one - as it is a textbook example? I would really like to know, thanks!
AI: Your 2nd circuit is indeed wrong. You have shorted out where the collector resistor should be. In effect, the collector is tied to Vdd despite you also calling that node “output”.
And, while you are fixing it, get rid of C3 because it puts an AC short from base to Vss.
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H: PCB Layout Help (with schematics!) - Split ground plane or not?
Obligatory "not an EE, just a ChemE trying to make some pressure readings for science"!
Schematic attached, along with my current layout. It's a 6-channel pressure sensor using MPX4115AP sensors and an AD7606-6 simultaneous sampling ADC. The ADC is overkill, probably, but I happen to have about a dozen laying around. It communicates to the host via SPI.
Each pressure sensor has bypass caps and an RC filter on the output to remove any fluctuations that occur due to high-frequency pressure disturbances in my system.
The whole board is powered by a single LM-1117 5V regulator in an SOT-223-4 package. The upper-left corner of the board acts as a heat sink. With the exception of the two pours in the upper-left (+5V and the regulator input capacitor), all the other pours on the top layer are ground. The entire back layer is +5V.
I've been reading a lot about how to properly lay out a ground plane to separate analog and digital portions of an ADC system. This design uses a star ground point at pins 2 and 3 of the ADC. The ground plane under the ADC itself goes off and runs under all the sensors, while the ground plane under J2 and all the digital pins is split off, only tied together at the star ground point.
I have a few questions. Am I overthinking this? Do I really need to separate the ground planes when everything runs off a single supply? I'm already using maximum oversampling on the ADC since I have plenty of time to take measurements (around once per second, later averaged to a 5-second reading). The measurements don't need to be ultra precise, either.
If separate ground planes are recommended, should I separate the power plane as well? I've read that one uses separate ground planes when the analog and digital circuitry are operated from different supplies, but I'm not doing that, hence my 1st question about split ground planes.
AI: Replying as one nonEE who did his share of circuits to another nonEE...
First of all you have a clean schematic and a clean layout, so chances are things will just work as they are already. This is the benefit of overthinking the design in the right way.
Now, for the questions per-se:
Are you overthinking it?
That depends what is your definition of "ultra-precise" is and how good your design is without overthinking.
A simple calculation with numbers from the sensor and ADC tells us that $$ \frac{1 kPa}{46mV} * \frac{2*5V}{2^{15}} \approx 2.3 \frac{Pa}{LSB}$$ your highest achievable theoretical precision is 2.3 Pascal per each bit of output. I assume that's way too accurate and we don't really need that.
Now we go and look at the noise from the sensor. Figure 1 shows that we have little less than 20mV peak-to-peak of noise, witch translates to about 0.4 kPa. Lets assume this is too much of an error for you and we need to remove it.
This is broadband noise that starts at 500 Hz and goes well beyond Nyquist threhold. From the plot at p. 19 of the ADC datasheet you can see that oversampling will not really help with this noise. But a simple RC filter will bring the noise down to several mV. Alas! You have a filter, just the wrong one. If you look at the application note you will the see the recommended values of the filter (650 Ohm, 0.33 uF). And since the ADC datasheet clearly states we do not need a buffer before it we can just use the simple RC filter you already got.
But here comes a problem. The sensors output is ratiometric. That is, it depends on the power supply voltage. (Take notice that all the reference voltages at the sensors' datasheet are given at a supply voltage of 5.1 V.) But the ADC has an internal, stable, reference voltage (that adds its own DC bias to your measurement). So now we go and look at your power.
The combined maximum current consumption of the sensor and ADC is \$ 6 * 0.1 mA + 27 mA \approx 28 mA \$ and under those condition up to about 60dB of input noise from DC to 10kHz is filtered. So we can assume that under normal conditions the power supply noise will be much less than 1mV.
Do I really need ground separation?
At this point we can say that if you only need an accuracy of 0.5 kPa you can even remove the RC filters and not worry about a thing.
But if you need something better than this is the time to start thinking about things such as ground and power separation.
Do I really...? Should I....? What about power...?
To answer all your other questions, lets assume you do need ground separation.
First of all, in your current design, your ground is not separated. By using a single tie point in the layout you might have avoided some nasty ground loops (that act as antenna and pick up whatever noise there is), but you could have achieved simpler (and usually better) results if you'd just flood fill the entire bottom side with ground.
In case of a flood fill with no islands and no narrow bridges everything is good. Also, if you must do a fill at the bottom layer it is usually better if it is the ground in case the insulation scrapes off and the conductor touches whatever is below it. Since there is usually some chassis, and chassis are usually at ground potential... you get the picture.
This is not always good since it creates a parasitic capacitance between the ground and other traces. Sometimes it can be used for good, sometimes its a problem.
This is actually why I personally never do less than 4 layers on projects where I can afford the extra cost, because in that case the inner layers become grounds and powers and there are almost no problems with ground loops.
Now, if you want to do a proper ground separation then you need to have a net with a name different to "GND" in your schematic. I usually use "DGND" and "AGND", other people call it other things. Then you find out what frequencies you want to filter so they won't reach the analog ground (this is usually the clock frequency of your digital stuff), you you build an RLC (not RC) filter and connect the grounds using the induction of the filter, not the capacitance.
For this to have any meaning each ground zone/area must have its own, filtered, power supply(LDO).
Some remarks on the current design
To get the best layout look at the datasheets for both the ADC and the LDO. Towards the end they have layout recommendations with reasoning. It's really helpful to learn from that. Their layout solves many problems you might not even encounter but it, usually, will not create new one without someone warning you about it.
BTW, you're wasting half the range of your ADC because its bipolar and your design is not.
Many designs ago, on a PCB far away...
If we assume that you do not need something extreme accuracy-wise, I would just take a Cypress PSoC5 developement board. It costs about $10, and it has everything you need for this project on a single chip. Including a USB connection to the PC with drivers. Oh, and the multi-channel ADC project is just one of the existing demo projects for the CPU.
Am I over-answering this? Even if so I Hope I could help.
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H: Safe LED Operating Current
What current is best, longevity wise, to run an LED at?
For example in the below data sheet, an RGB LED from sparkfun, the absolute current limit is listed as 20ma. However running an LED at 20ma or close to it is likely to degrade that LED an an accelerated rate, correct?
If I want to achieve decent brightness but maintain a long life for the LED what current should I provide to an LED?
And if I do provide less than optimum current in order to increase life time, what sort of returns are expected?
Is it negligible or worth it?
https://cdn.sparkfun.com/datasheets/Components/LED/YSL-R596AR3G4B5C-C10.pdf
AI: It is the luminous intensity of LEDs that decreases over the life of a LED. Higher the current you supply to LED, higher will be its power dissipation, and its temperature will increase. This induces thermal stress and electrical stress on LED and speeds up the rate of decrease of luminous intensity. What you are asking for is the derating of forward current for improving reliability of LED.
Answering your first question, if you supply 20mA forward current then the luminous intensity will degrade by the percentage shown in below graph.
You should determine if this percentage of degradation is acceptable to you. If not, you have to reduce forward current.
You also need to consider effect of temperature on maximum forward current. 20mA maximum current is at 25 degree C ambient temperature (mentioned in your datasheet). But you also need to derate (reduce) this with increase in temperature.
Please see this datasheet form Kingbright
PS: I have used it only as example. The ratings are different from your LED.
This curve shows the derating you need to consider as effect of ambient temperature. So consider the maximum ambient temperature in which your LED will operate and then determine the maximum forward current at that temperature.
And in doing all this, the result you get is decreased luminous intensity, which is shown in graphs as below.
To conclude, in your case the power dissipation is too less (~150mW). So just limiting the current to 15mA will be fine if you are satisfied with the intensity.
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H: Hartley oscillator with ua741 amp in pspice
I'm trying to simulate a hartley oscillator in Pspice using an ua741 amp. The results are not oscillations..I don't understand what's the problem..
AI: This is more or less the circuit you should consider if you were designing a COLPITTS oscillator: -
Note that R3 is needed else it won't have enough phase shift to generate an oscillation
Note that the capacitors and the inductor used are not low impedances unsuitable for use with an op-amp
Using 50 uH and 100 uF are to radically low in impedance to work with an op-amp
So, simulate this COLPITTS as shown and then move on to making it run at 10 kHz (as per your Hartley intention) by lowering inductance and capacitance by the same ratio. Then play around with different ratios of L and C and see where the limitations are.
Remember also that these circuits can take a short/medium period of time to begin oscillating so don't expect a sine wave at the instant you switch on. Neither should you expect anything bordering decent sine wave purity. More than likely the waveform will clip against the rails or look triangular in nature due to slew rate limitations in the op-amp. Most good sinewave oscillators measure the output amplitude and control the gain (R1 and R2) to keep the amplitude stable and avoid clipping.
Then transfer this to a HARTLEY design by using inductors in place of C1 and C2 and a capacitor in place of L.
Also note this regarding the use of the 741.
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H: BU2505FV - Can I use SPI with this part?
I am planning to use the BU2505FV DAC in my design and to communicate with it using SPI.
Is the 3 Wire interface described in the datasheet compatible with SPI? The DAC expect 14 bits to configure an output, and my Microcontroller SPI can send only bytes (8 bits per byte). So what will happen if I try to configure an analog output by sending 16 bits (2 bytes) to the DAC?
Also, I plan to connect other devices to the SPI bus, such as the MCP23S17 I/O expander. Are there any compatibility issues with using both parts in the same design?
Thank you all for your help!
AI: Apologies if I'm wrong !
The clearance between SPI and shift register shifting is uncertain. Shifting a shift register with bitbang method isn't a hard thing to do. But, it is doable with SPI.
In the datasheet, there is a nice illustration showing that the device can be cascaded or should I say daisy-chained (like some SPI devices).
Now the implementation, BU2505FV has a 14-bit shift register, so, you have to left-shift the data 2 bit first and then do a ordinary SPI transfer.
A little advice, timing characteristics and pin functionality should be "studied" carefully.
A comfirmation: look at Data Interface section in this product detail.
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H: How to hook up a fan to this switching circuit
I am trying to build a controlable fan with a raspberry pi and I have found the below circuit for a switching circuit to allow the 12V power to go to the fan
My question is how do I then hook the fan up to this for it to recieve the 12V power. Am I missing something?
The current and everything i have checked, i just need help with physically wiring up the fan.
AI: You connect the fan between "12V out" and ground.
Q2 is configured as a switchable current sink. With 5 V on its base, its emitter will be at about 4.3 V. That causes 1 mA thru R2. Most of that will come from the collector, which in turn means it comes from the base of Q1. That current being drawn out of the base of Q1 turns it on. That switches the "12V out" line high. Its voltage will be the 12 V input voltage minus the C-E drop of Q1. For a saturated transistor without excessive current, that is usually around 200 mV.
You should check that the 2N3906 can handle the fan current.
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H: Can I estimate the leakage inductance of a power transformer taken from a catalogue?
I'm using PLECS to simulate an HVDC system and I've been using two ideal transformers (Y/Y & Y/D) in order to get a 12-pulse rectification. However, now I want to consider real parameters. PLECS gives me this box to replace leakage inductance and winding resistance, as other specs, for every winding:
That being said, I've been searching for these parameters and some catalogues only include its impedance in %.
With this I can know the impedance in ohms but not 'separated' as R+wL. Do you have a different approach for this? Is there a typical proportional relation between R and L depending on voltage level or MVAs? Finally, is important to mention that I only want these values to have something 'real' but not too real as I will be studying the efficiency of a converter at the DC side (after 12-pulse rectification). In other words, as minimum I have to consider overlap angle due to leakage inductance.
AI: You may be able to find "typical" L/R or X/R ratios for power transformers if you search. Also, some catalogs may state L/R. In power transformer specs, I believe it is more common to state per unit impedance and L/R ratio. When L/R ration is stated, I believe that is actually X/R at the rated frequency.
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H: Using a lower voltage for a replacement fuse
I need to replace a blown fuse in my Tacklife DM02A multimeter.
It says on the back of the multimeter that the blown fuse is F1 250mA 600VAC. Its size is 5mm x 20mm and it has to fit into a clip inside the multimeter. I think it is ceramic because it is not see through.
I have looked for an exact replacement for this fuse and have been unable to find any. Most 250mA fuses seem to be 250VAC and most 600VAC fuses seem to be 500mA minimum.
I know it would be a bad idea to use a higher current rating for the replacement fuse, but would it be okay to use a lower voltage? If I used a 250VAC fuse, say, would that just mean that I can't connect the multimeter to more than 250V? I've only been using my multimeter for simple battery powered circuits so can't think of a reason I would need to test that many volts.
Also, would it be okay to use a glass fuse instead of ceramic if I can't find a suitable ceramic one?
AI: The general rule is to always replace with the exact same type and rating.
Multimeter fuses can be hard to find and expensive because of safety considerations, to meet the CAT II 600V and equivalent IEC requirements.
If you replace it with a lower voltage rated fuse the multimeter will no longer meet the specifications, yet will be marked as meeting them, so it is a bit of a booby trap.
Under no circumstances use a glass fuse, they lack sufficient interrupting capacity even at lower voltages.
(I could speculate on the possibility that the fuses and meter could be marked in a misleading manner but it's better to be on the safe side).
I suggest contacting your supplier. You're surely not the first one to blow a fuse.
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H: Trying to analyze the audio attenuation.. Is this analysis correct?
I am learning about impedance. So sorry any stupid question here...
Consider this circuit:
I have an audio input, from 20 to 20 kHz.
I want to know how the AC voltage over AB will behave as the frequency increases from 20 to 20 kHz.
If my math is right, the impedance of the branch AB will be:
Zab = 1000 - j/(2πfC)
Plotting the imaginary part for the frequency range I see that the "length of that vector" (I don't know how to call it... I mean sqrt(a^2 + b^2)) of
Zab will fall from 8kΩ to 1kΩ.
Because the RC group is a voltage divider with R1, I imagine that at 20 Hz we will see a volt divider between R1 (100) and 8kΩ and at 20 kHz, we will see a voltage divider between R1 (100) and 1kΩ.
So, will Vab decrease from 8/9 of the input level to 1/2 of the input level as the frequency increases?
Is this what will happen?
AI: It's just easier to find the transfer function Vout/Vin =
$$\dfrac{R_2 + \frac{1}{j\omega C}}{R_1+R_2 + \frac{1}{j\omega C}}$$
$$=\dfrac{1+j\omega R_2C}{1+ j\omega C(R_1+R_2)}$$
At DC the T.F. reduces to 1 and at high frequencies it reduces to: -
$$\dfrac{R_2}{(R_1+R_2)}$$
If you want in-between values you need to get rid of the "j" term underneath by multiplying numerator and denominator by the denominator's complex conjugate....
.... Or do what every one esle does and use a simulator: -
R1 = 100 ohms, R2 = 1000 ohms and C1 = 1 uF
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H: Different footprints for different surface mount Resistor packaging?
When using the same surface mount package size (0402) for all my resistors on a board, but using resistors from different manufacturers or with different resistance values, should I create a different footprint for each manufacturer?
In other words, are all 0402 resistor footprints the same?
AI: Not all footprints are necessarily the same when pulled from manufacturers' datasheets, and different manufacturers will have different recommendations for different situations. There may be minor variations from manufacturer to manufacturer. This is why I always make my own libraries, to keep styles consistent and to standardize on footprint sizes. I make three of each resistor/capacitor size, based on IPC recommendations: "L", "N", and "M", standing for "Least", "Nominal", and "Most". "Least" means the pads are at their smallest, making that package best for dense boards. On the other hand, where boards are very sparse or where I plan to solder by hand, I might select "M" meaning maximum pad sizes.
Make your own libraries and do not create separate footprints for each manufacturer. Standardize. It's well worth the effort.
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H: Build circuit from a formula
I've this formula:
y = AB + AB'C + A'C
I've to build a circuit with only a 2:1 mux and a OR port.
I've done the truth table and k.map, but i've not idea how proced.
EDIT:
@jonk Thanks for your time and for an exaustive and complete answer. It's very usefull! Atm i've done this:
Y = AB + AB'C + A'C
Y = AB + C(AB' + A')
Y = AB + C( (A+A')(A'+B') )
Y = AB + C(A'+B')
Y = AB + C(A'B')
Y = AB + CA'B'
Y = (AB+A'B')(AB+C)
Y = AB + C
Then my circuit is:
Mux 2:1 with input A & B
Mux output enters into a OR PORT + C
simulate this circuit – Schematic created using CircuitLab
AI: I want to start out by showing you something that in this particular case isn't much of a difference, but is an allowed technique just the same.
I moved rows 2 and 3 from your original map on the left side, downward, to get the new map on the right side. In this way, the \$B\$ column entries are collected together for the map shown on the right side.
Note that all the rows are still the same. No differences. All I've done is rearranged their ordering in the table.
$$
\begin{array}{lr}
{\begin{array}{ccc|c}
A&B&C&F\\\hline
0&0&0&0\\
0&0&1&1\\
0&1&0&0\\
0&1&1&1\\
1&0&0&0\\
1&0&1&1\\
1&1&0&\color{red}{1}\\
1&1&1&1
\end{array}}
& & & \rightarrow & & & &
{\begin{array}{ccc|c}
A&B&C&F\\\hline
0&0&0&0\\
0&0&1&1\\
1&0&0&0\\
1&0&1&1\\
0&1&0&0\\
0&1&1&1\\
1&1&0&\color{red}{1}\\
1&1&1&1
\end{array}}\end{array}
$$
Again, this isn't that much of a help in this specific case because both examples are just as easily analyzed. So it's not necessarily an improvement. But I wanted you to see the technique so that you'd be able to use it in other cases where it may help more than here.
But in this case, by pure inspection of either the left side or the right side, you can see that the value of \$F\$ is exactly the same as \$C\$, with one exception shown in red.
So I think you can now easily see that \$F=C + A\:B\$ is correct.
You are allowed to make these kinds of row changes, if it helps you. You should practice this concept so that it becomes a little easier.
Doing it this way is kind of "hunt and peck," in the sense that there is no guarantee that you will instinctively see which rows to move where to simplify the expression. However, if you practice it enough then you will develop that intuition and it won't be "hunt and peck," as much as before.
And again, in this case, it doesn't make much difference. But in other cases, this idea may help a lot.
Now, if you aren't familiar with playing around using Karnaugh Maps, you should look into that. And in this case, it will be much more useful than the above technique. In fact, Kmaps are often helpful when doing this by hand, if the number of variables aren't too many (then the paper gets pretty busy-looking.)
For example, here is a K-map you might have started with:
$$
\begin{array}{lr}
{\begin{array}{c|cc}
\overline{C}&\overline{B}&B\\\hline
\overline{A}&0&0\\
A&0&1\\
\end{array}}
& & & & & & &
{\begin{array}{c|cc}
C&\overline{B}&B\\\hline
\overline{A}&1&1\\
A&1&1\\
\end{array}}
\end{array}
$$
Here, \$F=A\:B +C \$ almost stands out like a sore-thumb. So you can see that Kmaps actually can make this a lot easier to see without a lot of trouble. There are some nifty rules you can apply to Kmaps that are not unlike the earlier case where I moved rows around with your table, which can bring things into a clearer insights.
So, again, you should practice with Kmaps to gain skills there, too.
Finally, there is an algebraic approach you could take. That's already been shown in a comment by Cristobol, so I won't expand on that unless you don't follow one of slightly less well-known rules he applies, and you need further explanation.
At this point, you should find it a little easier to solve your circuit problem.
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H: Doubt about USB bus powered device
I want to improve my project to be more robust, because it needs to be available 24 hours a day. Initially, my design had one microcontroller and a USB (FT232R) interface. The FT232 is 5V powered and my microcontroller is 3.3V. I was using an external regulator to supply power to the microcontroller, but, to minimize possible issues that the approach of using two voltage sources can bring, I thought to use a bus powered solution.
I read on FT232's datasheet that the basic rules for USB bus powered devices are as follows:
On plug-in to USB, the device should draw no more current than 100mA.
In USB Suspend mode, the device should draw no more than 2.5mA.
A bus powered high power USB device (one that draws more than 100mA) should use one of the CBUS pins configured as PWREN# and use it to keep the current below 100mA on plug-in and 2.5mA on USB suspend.
A device that consumes more than 100mA cannot be plugged into a USB bus powered hub.
No device can draw more than 500mA from the USB bus.
My concerns:
Trying to satisfy this rule, I analyzed the current consumption of the microcontroller:
The microcontroller is a dsPIC33EP64MC202, and it has the following current's consumption according to its datasheet:
DC Characteristics: Operating Current(IDD) at +85°C 3.3V 70 MIPS:
Typical ........................................... 41 mA
Maximum ........................................... 60 mA
Absolute Maximum Ratings:
Maximum current into VDD pin ...................... 300 mA
Considering the operating conditions, it seems to be ok to use a bus powered approach, but, I'm afraid of the absolute maximum current that it can draw and what could happens if it draws this amount of current. So, my doubt here is, should I consider a high power USB device or not? Would be safe to consider a non-high power USB device?
I read what "Suspend mode" is, I understood that the host (the computer in this case) will decrease current when there is no activity on the bus for a time greater than a few milliseconds and, afterwards, it will decrease the current until shutdown the device.
Well, if this is right, I have a problem here, my device will receive a requisition via USB and, after a time, a few milliseconds, it will answer the requisition. How can I handle with this? The device can not be shut down so early in the middle of an operation
I did not understand this rule. If my device is a high power USB device, I should use one of the CBUS pins configured as PWREN# and use it to keep the current below 100mA on plug-in and 2.5mA on USB suspend. But how I will do this if my microcontroller is BUS powered? I need to configure the FT232 before mounting it on the PCB?
(4 & 5). The rule (4) is sufficient to rule (5), so, why specification on rule (5) was necessary?
AI: Power specification in Absolute Maximum Ratings is a worst-case scenario when pretty much all pins are sourcing maximum current. Only you can tell whether it ever happens in your design. If it ever draws more than 100mA then you should configure max power in FTDI EEPROM.
All the configuration of the FT232 can be done via USB after mounting on PCB. The software can be downloaded from FTDI website.
There are two ways you can support low powered mode.
Since you need to drop supply to 3.3V anyway you can use LDO with "enable" pin, controlled by PWREN/SLEEP. Another option to use power switch as illustrated in 6.3 of FT232 datasheet. This will cut power to your circuit, so you need to carefully plan your reset sequence.
You can use low quiescent current LDO to always supply your MCU and use PWREN/SLEEP to put MCU to sleep or wake up. This method leaves your code in control over the process.
In either case, note that suspend signal from USB host usually means your computer goes into sleep/hibernation/shutdown. As such, your device should not expect any requests coming from PC until it is brought back from suspend.
On the other hand, this is two-way street. If your device has some data it wants to communicate to PC it can use remote-wakeup signal (supported by FT232) to get its attention.
Regarding decreasing power when bus is inactive - host does not do it. It is important to understand what this feature is for. It was introduced mostly for devices that have their active operation and USB communication inherently tied. For example keyboard or mouse need to communicate with PC when they are used, but can safely go to sleep as soon as you stop typing or moving.
If your USB device has something to do in between (e.g. data collection) it can continue doing so. It is quite common to use timer interrupts to wake up, do some sensor readings (e.g. temperature) and go to low-power mode again.
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H: How do USB hubs work when same device is connected
I was reading on how USB hubs work and since there is only 1 master, master sends a command to an endpoint. However, how does a USB hub work when there are 2 same devices plugged into a USB hub? How does the device know which is being addressed?
AI: USB has a process called “enumeration” where each device, including hubs, is assigned an 7-bit number used to identify it to the host. When a hub is attached, it is enumerated and then each device downstream is enumerated.
This is the reason that no more than 127 devices may be attached at any time.
Therefore, each of your identical devices receives a different number. Which one gets what number depends on the order they are enumerated.
If you need to programmatically tell the difference, you must use the devices’ serial numbers, if they have them.
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H: Is it possible to use a digital potentiometer as a digital rheostat?
With a three-terminal analog pot, you can use the middle and one of the outer terminals for it to function as a rheostat.
As it happens, I need a digital rheostat in my circuit but I only have digipots on hand: an MCP4151 and an MAX5481. Since this is a one-off project and I'd rather not wait for a digital rheostat to be delivered, I'm wondering if it's possible to use a digipot as a digital rheostat, perhaps with some extra circuitry if needed?
AI: The MAX5483 and MAX5484 appear to be, the MAX5481 does not appear to be:
Source: MAX5481 datasheet
It appears the MCP4151 can be used as a rheostat:
Source: MCP4131 Datahsheet
Note 1 reads as follows:
Floating either terminal (A or B) allows the device to be used as a
Rheostat (variable resistor).
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H: Need help analyzing a circuit?
so basically i ran on this schematic , an led Color Organ from Circuit Skills. Now following the explanation of the circuit i pretty much understand the basic principle of it. However i have some problems figuring out about two things(I am an entry level Electronics hobbyist, so sorry about the dumb questions).
Q1: The elements following the op amp (Red Rectangle) are supposed to condition the signal (ac signal from the aux jack), however are they really necessary ? And what is their purpose ? The ones in the yellow box i think are for smoothing the blinking of the Leds in order not the blink instantly but add a little dimming effect.
Q2: Here in the circuit they use "Virtual Ground" for the Op Amps, however can they be powered by a single supply ?
Hope i can get some answers from the Electronic Gurus .
P.S. Here is the link from the website Circuit Skills
AI: Q1: The elements following the op amp (Red Rectangle) are supposed to
condition the signal (ac signal from the aux jack), however are they
really necessary ? And what is their purpose ? The ones in the yellow
box i think are for smoothing the blinking of the Leds in order not
the blink instantly but add a little dimming effect
It functions like a half wave rectifier (only using the positive portion of the wave coming into it and the cap and resistor filter it. You may be able to drive the transistor directly but it might not give you the effect you want. The other problem with driving the transistor directly is you would at minimum need a resistor to separate the low impedance sink of the transistor from the feedback network of the op amp. (there transistor might sink too much current and eliminating the cap could affect your sound signals)
Q2: Here in the circuit they use "Virtual Ground" for the Op Amps,
however can they be powered by a single supply ?
Virtual grounds are typically used for cables and other situations when your ground cant be trusted (like battery powered applications) to force the ground to be 0V. In this case, its not really a virtual ground, it's a reference functioning at half of the supply voltage and probably exists to create a bias current (which is really weird). The best thing would be to try it with the virutal ground or without and see which is better for your application.
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H: VGA cable arcing against computer case
I've tried to turn on my old PC with my old LCD monitor, which is powered by a kettle cable directly from mains, no power supply brick).
When trying to get it to work, I have noticed the following phenomena:
1) The VGA connector from the monitor produces electrical sparks against the PC case, even when the PC PSU is switched off (but both are connected to the same extender cord) - See video: https://youtu.be/6Jxlndc2ZUA
2) While bending down to look at the connector (with the VGA cable connected), and touching the PC case with my hand, my head accidentally touched one of the strings on my electric guitar and I felt an electric spark on my head (not very strong but noticeable). The guitar is connected to an external sound card, which in turn is connected via USB to my main PC, which is connected to a different power outlet.
At first I assumed it's some kind of grounding problem on my monitor. So I hooked up some random grounded electrical device I found in the house (the base of an electric kettle) to the same extension cord, and tried to brush the VGA cable against its metal casing while the other end is connected to the monitor. I couldn't see any sparks this time.
I have also tested this the other way - I have connected the VGA cable to my PC, and tried to see if it produced sparks when rubbing the other end against the electric kettle base casing, and nothing happened.
Since I am alive and the sparks don't look too big, I assume the VGA cable isn't really live with 220V but instead something else is going on.
Can anyone suggest an explanation to the above situation?
Update:
I have repeated the experiment using a different wall plug and extension cord, one that I have personally tested with a multi-meter and made sure that is wired correctly regarding live/neutral/gnd.
Turns out that one of the kettle cables I have been using is indeed missing a ground prong, and has a hole instead:
This is meant for sockets that have a ground prong (mine doesn't), so effectively, it wasn't grounded.
I have tested the following combinations:
1) ungrounded monitor, grounded pc (psu off) - VGA cable is arcing against PC casing
2) grounded monitor, ungrounded pc (psu off) - VGA cable is NOT arcing against PC casing.
In this case, I assume there is some kind of issue with the computer monitor. Getting a grounded power cable for it would merely hide the problem, and I should probably replace it.
Is there anything else I should look at before dismissing the issue, just to be safe?
AI: All VGA monitors must have Earth bonding. Yours doesn't, so get the right cable or hardwire a frame screw to earth bond screw. (for kiwi's only)
A continuity or line voltage tester or a DMM to check for gnd voltage can be done to isolate the HV problem.
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H: Circuit's power budget and power dissaption
I'm a designing a circuit that I'll prototype soon.
I'm curious about how should I determine my power budget for the circuit?
Could you guys please suggest me how to do it?
Should I calculate each power rail Watt and sum it?
Do you have any suggestions for 'excel' table for this?
I would like to hear suggestions please or to know how the pros do it.
I assume that power budget estimation is important because according to this estimation I choose, for example, a voltage regulator. according to the power estimation (W) of rail - the power shouldn't deviate the power dissipation of the voltage regulator - Am I right?
Thank you very much, also forgive me about the newbish question :)
AI: There are a few ways to do this:
1) Predict and model the design. This is done a few ways. If it's a circuit, simulating each of the pieces gives a nice idea of how much it will use. A spice package such as LT Spice can be great for this (if you hover over a part in LT spice an hold down alt it can graph out a power for that component). Estimation and bounding goes a long ways, usually pouring through datasheets and finding quiescent currents (min current) and max currents. Then estimate something in between. With microprocessors it is much more difficult to determine how much power they will draw, so a max case is usually best.
Estimate power supply efficiencies and DC to DC converters, get a current draw for the total design. It's better to give yourself some margin (like add 30%) to make sure you size a supply right and don't overdraw current.
2) The next way is to actually get some parts with prototyping and measure the currents to give you an idea of how much current the total design will draw.
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H: How do I swap two layers in altium?
I have two inner layers in altium for a flex cable, I want to swap one copper layer with the other without having to delete or copy everything. Is there a way to swap two PCB layers while maintaining everything on that layer?
AI: The easy way is to just tell the board shop what order you want, or to imply the required order by renaming the Gerber files to indicate the desired order.
I provide a readme.txt file with a board order containing the following (among other information):
The following files are required for this job:
alarm-Front.GTL Component side copper photoplot file
alarm-Back.GBL Solder side copper photoplot file
alarm-SilkS-Front.GTO Component layout silkscreen
alarm-MASK-Front.GBS Solder Mask
alarm.drl Drill file
readme.txt This file
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H: Can I replace a NIMH rechargeable pack with a resistor if I only want to run plugged in?
My kids have a pair of IKEA night lights ("spoka") where the internal battery packs have died. I'm debating replacing the batteries (3x AAA NIMH, marked 3.6V so in series) and have looked at this answer but since we've pretty much only ever used them plugged in, that seems like it might be better to just bypass the battery pack.
The lights worked with the the battery leads shorted, but there was an inline fuse on the old packs, and the circuit board gets uncomfortably hot.
One guess is that if I put a resistor there rather than shorting it, it will limit the current and keep things from burning up. At the same time, I've got very little sense what size resistor to try to convince whatever very simple battery management circuit is in there that there's a full pack.
I do have a basic multimeter if it makes sense to measure the current or voltage across the battery charge leads.
The PSU is a cheap 5V, 500ma. (edited: incorrectly wrote 200ma)
AI: In the spirit of fooling the battery charging circuit into thinking that it is attached to a charged battery and also getting at least a little light in the case of a power failure, you can replace the battery pack with an electrolytic capacitor instead of a resistor.
The charging circuit will charge the capacitor to the normal battery charging voltage and then the current will stop flowing. This minimizes the heat generated by the charging circuit. Just make sure to connect the capacitor with the same polarity as the battery. For even more run time, you could use a supercapacitor.
The capacitor voltage rating must be larger than the battery charging voltage in order to avoid damage. Note that the charging voltage is often higher than the rated voltage of the battery pack, so a 5V or higher rated capacitor should be used.
Standard electrolytics are about $1 and a small supercapacitor is only about $2, so I would go with the supercapacitor and the much longer run time.
(Picture of Illinois Capacitor DGH504Q5R5, which has a particularly good shape to fit in place of the battery pack)
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H: What symbol to use for a solid state relay in a schematic?
What symbol should I use to indicate a solid state relay in a schematic?
The internal schematic of the solid state relay is shown in the data sheet, but showing all of the internal components in the schematic is not necessary and would be more confusing than a single symbol.
AI: Use what is in the datasheet. Why? because it matters on what is inside the SSR. Is it optically isolated? Is it simply a mosfet, a triac or back to back mosfets?
With a single block it is impossible to tell. With a diagram inside the component you can tell what it's functionality is, saving some time.
If you draw what is on the inside and put it in a library its easier for you to tell what it is and use it later on. This of course is all up to you, and it's every person for themselves on this one. If your using it in a group library, then consult your group.
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H: What is the difference between usb root hub and usb host controller?
From the oracle wiki (usb controller):
The USB host controller has an embedded hub called the root hub. The
ports that are visible at the system's back panel are the ports of the
root hub.
What I understand from this is that the root hub merely is a point where all usb hubs come toghether.
-Is the root hub a piece of hardware, or is it a term used to denote the point where all data from usb devices come toghether?
-There are different types of interfaces between the root hub and the controller (UHCI,OHCI,EHCI), is it then correct to think of the controller as a "middleman" between the root hub and the actual computer?
AI: You can have more than one root hub, so no, it is not the point where all hubs come together. It might be more convenient to think of root hub as one of the several starting points for enumeration.
Root hub is a piece of hardware. More specifically, it is a part of host controller (which itself can be either separate chip or a part of chipset).
The interfaces that you mention are Host Controller Interfaces (HCI), i.e. interfaces of host controller, not root hub. Basically they are registers that software can access in order to communicate with host controller.
From the above I don't think term "middleman" is applicable as you pictured it.
UPDATE:
Here is a simple analogue to illustrate to relationships:
A vehicle is a controller. It has an interface (pedals) that software (driver) can use to operate the controller. It also has an engine (root hub) that performs essential part of the car functionality.
You can say that driver operates an engine using pedals, and that would be correct but not precise, because there are quite a few parts between the pedals and an engine. These parts correspond to internal logic circuitry of the controller.
So, more precise statement would be "driver controls the car using pedals, steering wheel and a stick, and since engine is part of the car it does its job share in the whole driving process". In a computer terms that would translate into "software controls the host controller using HCI, and since root hub is part of the host controller it does its job share in supporting USB communication".
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H: Why are computer PSUs so large and heavy whereas phone chargers weigh barely anything anymore?
I've noticed that phone chargers have gotten a lot smaller and lighter over the years, to the point where they weigh barely anything. The power supplies that you put in a PC still weigh 2kg. What prevents the improvements in phone chargers to be used for computer power supplies?
AI: For example, the PSU I have here is 500W for 2kg and the phone charger I have here is 18W for 25g.
I would like to start by pointing out that your premise is false: just because the two supplies you give as example show a phone charger having a higher power-to-weight ratio, does not mean this is always the case, and most definitely does not mean that it has to be the case for some underlying limitation of power supplies. See below for an example of what is possible when size or cost is important.
In a phone charger, as a customer you probably want something small and light - you do not want to have a big block to move around all day. This means that the size of that charger is to some extent important for the engineers designing it, and they will make design choices to get the size down: they may choose to go for more expensive but smaller (and lighter) capacitors, for example.
In a consumer desktop computer power supply, size is not a main specification - cost is. Size is often limited by the standards (for example, ATX) anyways, so there is no point optimizing further. As a result, designers will make choices to lower cost, and as a result may elect to use bigger, cheaper capacitors, use less efficient and larger but again cheaper heatsinks, etc.
Thermal management is a second problem: the area for the supply to dissipate scales more slowly than the volume, so as you go higher in power, it becomes more challenging to fit everything in and keep it all cool.
In servers, size is a constraint - we want to fit as much server in as little datacenter as possible. As a result, their supplies tend to feature much, much higher power densities. Take for example the FSP1200-50ERS, a 1200W redundant power supply unit, which is actually comprised of 2 1200W supplies and a ''combining'' frame. One of these two 1200 W supplies weighs in at about 1 kg, giving us a power-to-weight of 1.2W/g. If you compare that to the ''low'' 0.72W/g that your phone charger gives, it is clear that your initial assumption (''power supplies for computers have lower power density than the supplies for phones'') is wrong.
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H: What is the time derivative at t=0 for a second order low-pass step response?
For a first order system like an RC filter you have something like
$$y(t)=1-e^{-\frac{t}{\tau}}\\
y'(t)=\frac{1}{\tau}e^{-\frac{t}{\tau}}\\
y'(0)=\frac{1}{\tau}$$
But for a second order system there are 4 different cases. What I'm interested in is y'(0) of any second order low-pass filter in terms of its frequency and damping.
Taking any random image from the web, it can be seen that for all different damping modes, it appears to start slow (low derivative) ad then ramp up. Is y'(0)=0, or some fixed relation like in the first order case? You can't really tell from the graphs, and I've been unable to find any confirmation about what it is.
Doing it the time domain way, you get into pesky situations where some things are imaginary or not, leading to those 4 cases. Is there a way to get a general answer?
Using the frequency approach I did some questionable math to arrive at the following. Taking a generic second order low-pass system
$$H(s)=\frac{\omega^2}{s^2+\frac{\omega}{Q}s+\omega^2}$$
The step response is
$$C(s)=\frac{\omega^2}{s(s^2+\frac{\omega}{Q}s+\omega^2)}$$
Derivative in the time domain is multiplication by s in the frequency domain
$$c'(t) \rightarrow sC(s)=\frac{\omega^2}{s^2+\frac{\omega}{Q}s+\omega^2}$$
Now apply initial value theorem
$$c'(0) = s^2C(\infty)=\frac{s\omega^2}{s^2+\frac{\omega}{Q}s+\omega^2}$$
Apply L'Hôpital's rule
$$c'(0) = s^2C(\infty)=0$$
Does that make sense at all? Can this be seen directly in time domain as well?
AI: Starting from any transfer function \$H(s)\$, applying a step function will multiply it by \$\frac{1}{s}\$, then deriving it is the same as multiplying by \$s\$ in the Laplace domain. You find
$$\mathcal{L}\left\{ y'(t) \right\} = H(s)\cdot \frac{1}{s}\cdot s$$
We can then use the initial value theorem to find the value at t=0:
$$\lim_{t\to 0^+} y'(t) = \lim_{s\to +\infty} s\cdot H(s)$$
For a second-order transfer function, we have then two cases, one with and one without a zero (two zero's means that the transfer function can be reduced).
Without a zero
$$H(s) = \frac{b_0}{1 + a_1s + a_2s^2}$$
Applying the initial value theorem will yield
$$\lim_{t\to 0^+} y'(t) = \lim_{s\to +\infty} s\cdot \frac{b_0}{1 + a_1s + a_2s^2} = 0$$
With a zero
$$H(s) = \frac{b_0 + b_1s}{1 + a_1s + a_2s^2}$$
Applying the initial value theorem will yield
$$\lim_{t\to 0^+} y'(t) = \lim_{s\to +\infty} s\cdot \frac{b_0 + b_1s}{1 + a_1s + a_2s^2} = \frac{b_1}{a_2}$$
So there you have it. The derivative is always zero at \$t=0\$ unless there is a zero in the transfer function.
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H: Connection between std_logic and std_logic_vector(0 downto 0)
I am trying to connect one of my VHDL blocks to a Xilinx generated block (a dual port RAM).
The problem is that the write enable of the RAM is defined as an std_logic_vector(0 down to 0) instead as a std_logic and I do not know how to connect them.
The RAM block:
component bloque_4
port(
...
wea : in std_logic_vector(0 downto 0);
...
);
end component;
Whereas the component that tries to write into that memory is:
component bloque_3
port(
...
write_en_b3 : out std_logic;
...
);
end component;
In the test bench I wrote for testing the connection I defined a signal for establishing the communication between the two of them:
signal write_en_b34 : std_logic;
So far things are great, the problem comes when I try to map the write_en_b34 signal to the wea port.
uut: bloque_4
port map (
...
wea => write_en_b34,
..
);
I understand there is a type mismatch, but I do not know how to solve it. So, how could map a std_logic_vector(0 downto 0) to a std_logic??
AI: Do it like this.
uut: bloque_4
port map (
...
wea(0) => write_en_b34,
..
);
Its perfectly OK to associate slices or elements of port with a mix of signals and constants. The only restriction is that if you associate any of the port bits then must associate them all.
Here is an example of entity foo with an 8 bit port_a.
signal s_1 : std_logic;
signal s_2 : std_logic_vector(3 downto 0);
...
x: foo
port map(
port_a(0) => signal_1,
port_a(4 downto 1) => signal_2,
port_a(7 downto 5) => "000"
);
In the example above it would be an error if only some of the bits in port_a were not attached to a signal or a constant value. It would not be an error if none of the bits in port_a were attached, so long as the port had a default value in the entity definition.
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H: why does current like circulating?
why does the current in R2 remain always zero regardless the value of other parameters(V1,V2,R1,R3)?)
AI: This is more a physics question, not normal electronics.
OP question is probably caused by a common physics misconception: "Current" is not conserved. Current isn't substance-like. It does not flow, instead it just appears and vanishes. (Wave a magnet near copper, and current springs into being from nothing, with no source or sink.)
On the other hand, charge is conserved. Charge is substance-like. Wave a magnet near copper plates, and the sea of mobile electrons within the surface will begin moving, and a current will appear inside the metal. Where is this charge? All metals are always full of electrons.
And ...if charge is like water, then electric current is like water-motion. In other words, the phrase "flow of watermotion" is wrong. The correct phrase is simply flow of water. Water moves from place to place, while "watermotion" just appears and vanishes. (What flows in rivers? "Current?") And in E&M physics, the phrase "flow of current" is just as wrong. Electric current is itself the flow: it's a flow of charge. So, the correct phrase is simply "flow of charge." In circuits, charge flows from place to place, while current just appears or vanishes. Everything becomes simple if we strike out "flow of current" everywhere, and instead speak of "charge flows." Like below:
"Since a current is a flow of charge, the common expression 'flow of current' should be avoided, since literally it means 'flow of, flow
of charge.'" - MODERN COLLEGE PHYSICS, Richards, Sears, Wehr,
Zemanski
Still we can think like an EE rather than a physicist. In the OP schematic, if R2 is always full of charges, and there is a flow of charge inside R2, then the charge has no return path, and it must build up in the two circuit-loops shown above. Treat them as two capacitor plates. We add a capacitor "C1" (1pf?) Perhaps place it between R1 and R3.
Now, if there is 1 amp in R2, then the potential between the two above loops will increase by 1,000,000,000,000 volts per second! (One ampere through one picofarad.) That's not going to happen, so what if there were only 1 microamp in R2? Then the voltage between the two loops will only increase by a megavolt per second. Big nope.
Final answer: in a real circuit, for DC supplies during turn-on, perhaps a few nanoamps briefly appear in R2. It depends on the exact points where parasitic 1pF C1 is connected. But then it dies away almost instantly. After that, the flow inside R2 is zero, since there's a C1 picofarad capacitor in series with R2.
The OP question is for a DC circuit. What if the power supplies were AC? In that case we'd see a small flow in R2, where the return-path for the complete circuit was the invisible capacitor. The closed circuit goes through the space between the two loops. (Better add even more low-value parasitic capacitors, between every circuit node.)
The answer is clear: charges in DC circuits can only flow in loops, since otherwise we'd get billions of volts appearing. To eliminate any need for million-volt power supplies, our circuitry must resemble flywheels made out of charge: closed rings. "Complete circuits." Or instead, if your flashlight batteries were rated in billions of teravolts, then perhaps you could create some milliamps in open loops for awhile, until the picofarads of space-capacitance became filled with enormous e-fields. In the real world we'd just get lightning bolts. To work with such teravolt D-cells or tiny hand-held Wardenclyffe towers, either use them in hard vacuum high earth orbit, or embed it all in solid quartz!
:)
too long didn't read; wires are always full of electrons, so circuits are like flywheels made of electrons. Cutting a circuit is like applying a brake to the flywheel. That gives us the closed-circuits law. In above OP circuit, we have two flywheels, but R2 isn't part of either one. To cause a continuous current inside R2, R2 has to be one part of a wheel made of movable charges.
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H: Electronic metronome Wien oscillator
I've got to analyze an electronic metronome schematic and I'm having trouble understanding how the oscillator in this schematic really works.
I believe it's a Wien oscillator with variable output wave frequency.
Diodes in negative feedback loop are used for amplitude stabilization and output should be a half-wave rectified sine wave (only positive half-waves because of the opamp power supply) if I'm not mistaken.
But I'm wondering what do resistors R15 and R16 in parallel with capacitor C7 do? Are they just used as a voltage reference, or are they used for something else?
I assume that variable resistors are used to set frequency of the oscillator. Do I use Barkhausen equation to calculate the frequency based on the resistance of variable resistors, or is there an easier way to do it?
AI: I think, in principle your analysis is correct. And - yes, the resistors R15 and R16 provide a DC reference which enables a dc operating point (output voltage) at app. half of the powwer supply. Therefore - in contrast to your assumption, the output will consist of a DC voltage and a superimposed full sine wave.
The frequency of the sine wave wo (provided the diodes allow a good amplitude control) will be - of course - in accordance with the Barkhausen criterion. In this context, you have nothing to do than to find the mid frequency wo (center frequency) of the RC-bandpass in the positive feddback path. At w=wo the phase shift of this bandpass will be zero and the feedback factor 1/3.
Comment: The above mentioned facor (1/3) applies only if the bandpass in the positive feedback path is symmetric (equal R and equal C in the series resp. the parallel RC combination). In your case, there is an additional 10k pot (R20 ?) in series with the 30k resistor. This resistor slightly detunes the bandpass and, thus, can vary the oscillator frequency within a certain tuning range. As a consequency, the feedback factor (nominal 1/3) will slighly change as well. This will be, however, not a problem as long as the amplitude regulation mechanism can cope for this variation.
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H: Why does this H-bridge have PWM and Enable pins?
The BTS7960 H-brige has 6 pins (excluding current warning pins).
Right Turn PWM
Left Turn PWM
Right Turn Enable
Left Turn Enable
VCC
GND
I usually connect all the "Enable" pins to HIGH and only use the PWM pins to control the motor speed and direction. That works perfectly, but is that a good practice?
Are the "Enable" pins really unnecessary or am I missing something?
AI: If you don't need the enable pins, there is nothing wrong with tying them high. Just because they are unnecessary in your design, doesn't mean they are in some other design.
The purpose of the pin is to allow both transistors in each half-bridge to be turned off. The PWM pin (called IN by the datasheet) is used to select whether the high or low transistor is on, whist the Enable pin (called INH by datasheet) is used to switch of both transistors.
If for example you wanted the motor to freewheel (soft breaking in @vicatcu's answer), you would need to turn off both high and low sides, leaving the motor current to flow through the diodes in the bridge. If you want to stop the motor instantly (hard breaking), you switch both h-bridges to the same transistor (both high, or both low).
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H: Some questions about the emitter resistor added to the fixed bias circuit
In many texts it is mentioned that the emitter resistor stabilizes the bias circuit. For example particularly for the below example:
Which quantity is aimed to be stabilized initially? Vbe?
And how does adding Re archives this? Can you give an example scenario so we can see that how Re works?
AI: Assume there is no emitter resistor.
Increase in VCC will lead to increase in collector current, also base current. This may have negative effect. For example, the temperature will now increase because of higher current.. As temperature increases, Vbe of a transistor reduces further..
As Base emitter voltage drops, base current would gain further triggering rise in collector current and this will make the circuit less stable.
Adding the emitter resistor counter acts by slightly opposing the rise in collector current. Whenever there is a rise in collector current, the voltage drop across the emitter resistor increases. This voltage drop now acts as a negative feedback. Higher the drop across the resistor value, lesser will be the collector current due to lesser base current.
As VCC increases, voltage drop across emitter resistor increases and similarly when VCC falls, the voltage across emitter resistor falls enabling higher collector current due to increase in base current.
Ideally I would use resistor divide bias at this base side..and keep base current only a fraction of current flowing through to bias resistors.
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H: DRV8830 motor controller -- drive is working but brake is not
DRV8830 datasheet (control register info around page 11).
I have gotten this chip to run a motor with the following code:
void drive(int speed) {
// Write to the Fault Register to reset it
Wire.beginTransmission(MOTORA_WRITE);
Wire.write(FAULT_addr);
Wire.write(0x80);
Wire.endTransmission(true);
// Write to the Control Register
Wire.beginTransmission(MOTORA_WRITE);
Wire.write(CONTROL_addr);
byte regValue;
regValue = (byte)abs(speed); // Find the byte abs value of the input
if (regValue > 63) regValue = 63;
regValue = regValue << 2; // Left shift to make room for bits 1:0
if (speed < 0) regValue |= 0x01; // Set bits 1:0 based on sign of input.
else regValue |= 0x02;
Wire.write(regValue);
Wire.endTransmission(true);
delay(100);
}
These are the addresses:
#define MOTORA_WRITE 0x64
#define CONTROL_addr 0x00
#define FAULT_addr 0x01
Here is my code to brake the motor:
void brake() {
// Write to the Fault Register to reset it
Wire.beginTransmission(MOTORA_WRITE);
Wire.write(FAULT_addr);
Wire.write(0x80);
Wire.endTransmission(true);
// Write to the Control Register
Wire.beginTransmission(MOTORA_WRITE);
Wire.write(CONTROL_addr);
byte regValue=(byte)255;//0b11111111 -- I also tried 0b11 but that didn't work either
Wire.write(regValue);
Wire.endTransmission(true);
delay(100);
}
The code for driving the motor works as expected. When I call brake, however, it does not brake, even though bits 1 and 0 of the control register are set to 1.
I am using an ESP8266 for anyone interested.
AI: Can you measure the OUT1 and OUT2 voltages if possible? In both when enabled to run and when brakes are applied. Also, are nothing reverse and forward commands working fine?
Simple steps to make sure the commands are being transmitted or the bits are being interpreted properly.
Reverse and forward commands make sure that both bits are being addressed.
Brake should work.
If the motor is not stopping soon, I would do the following. If it is running in forward direction, I enable it to run in reverse direction for short moment and then apply brakes.. This brings motor into halt state faster.
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H: Problems understanding I2C pullup calculation
I have been trying to read about I2C pullups such that I can select an appropriate pullup resistor for an EEPROM (24LC02B-I/P) which I want to use as serial ROM to drive some 7-segment displays.
Despite the advice in this 'AddOhms' video I still am curious about how you actually calculate a pullup and a caulcated pullup range, but this TI document baffles me totally in section 2. Below are some specific questions:
Why does Rp(min) take an output low voltage from Vcc?
It talks of bus capacitance: the only reference I can find on the datasheet of the EEPROM is to pin capacitance (10 picofarads)- is this one and the same?
How comes T(r) is the rise time between Vol and not V = 0, or some median between Vol and V = 0? I was under the impression Vol was a determined V output maximum but necessarily the actual value.
How comes the calculations deal with output low/high for strong pullup and input low/high for weak pullup?
Sorry if these questions seem diverse and broad, I am just struggling with the concept generally and getting a bit frustrated with it
AI: In I2C protocol, the device operate in open collector or open drain mode. The devices (both microcontroller and the EEPROM) can drive the pins to logic zero (strong zero, assume as if they literally take the lines and short it to ground).
The logic one is merely achieved by the pull ups which are provided externally. Pull up resistor is in kilo ohms. (We will seethe values in a moment). There will be parasitic capacitance on the bus due to multiple I2C devices connected, PCB stray capacitance etc..
When signal is going high, the current has to flow from VCC through the pull up resistor and to the IC pins. So, the RC time constant kicks in.. It makes the rise of the signal sloppy. Example, if capacitance is 100pF and pull up is 10kohms.. Rise time will be five times R*C. Here, it will be 5us.
The fall time will not b an issue because, it will be almost instant.. From the IC pins to ground.. There is no resistors in the path to delay.
Question 2
It talks of bus capacitance: the only reference I can find on the
datasheet of the EEPROM is to pin capacitance (10 picofarads)- is this
one and the same?
Yes. Plus the MCU capacitance and also the PCB stray capacitance and PCB trace capacitance.. I would keep a margin of extra 20pF for those other than device parasitics.
Question 4
Minimum and maximum pull-up values
Assume pull up is strong (low value resistance).
When the MCU outputs a low, there is connection between VCC--->pull up resistor value--->MCU pin--->nMOSFET of the pin of MCU (which is on) ---> ground.
In this case MCU sinks more current. This also means that MCU starts building voltage at the output pin (outputting low). This voltage is due to ohmic loss across the nMOSFET of the MCU pin.. It will have a finite resistance. Hence, the output voltage of MCU will not be true zero but a few 100 mV (an example) which should be still within its VOL specification.
To case of weak pull up (very high resistor value, say 100kohms)
Assume the EEPROM clock input current is 10uA. It can be higher also.
When the MCU drives the clock pin high, MCU actually releases the clock pin.. EEPROM sees high because of VCC.. But what exactly will be the voltage at the clock input of the EEPROM?
Let's see If VCC is 3.3 V.. Then due to clock pin input current of 100uA there will be drop of 10 uA * 100k across the resistor, which is 1000mV or 1V.. So voltage across clock pin will be only 2.3V.. Hence, one has to care for input high voltage when choosing weak pull up resistor.
More importantly, if the resistance is too high, chances of failing the protocol required rise time will be more.
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H: KiCad Circle Dimensions
Bit of a newbie to KiCad. Trying to get two edge cut circles, one with a diameter of 50mm and an inner one with a diameter of 40mm.
Here is my settings for the 50mm one (using 25mm as I assumed this was the radius measurement):
However this produces a circle with a diameter of 70mm. The same with the inner circle when I set the Point X and Point Y to 20mm, the resulting circle has a diameter of 56mm.
How can I get correctly dimensioned circle cuts in KiCad?
AI: You will need to set one of your dimensions the same as your center. So, in your case, set the X=0, Y=25. With them both=25, R=\$\sqrt{25^2 + 25^2}\simeq35\$.
For your 40mm circle, set X=0, Y=20. It would also work to set X=20, Y=0.
Note, that this is only for v4. With version 5, the KiCad circle properties window looks like this:
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H: Breadboard connections
I am new to breadboard electronics projects. I am looking to do this project but am a bit lost on what all I need parts wise. This is my current parts list:
WAV Trigger
Breadboard
1n914 diode
6N138 optoisolator
2 Resistors
3 M/F Jumper cables
Midi Cable
2 Ports
Are these correct?
What resistors do I use for this project?
How do I connect a midi to a port and what type of port should I buy?
What are the wires circled in the picture below? How are they connecting all the components?
In step 1 what is he closing the connection with? Should I add that to my parts list?
Thanks!
AI: The 1N914 diode was state of the art when the MIDI specification was written (over thirty years ago). Nowadays, the 1N4148 is better and cheaper. Any other small silicon or Schottky diode would also work.
The resistor values are shown in the schematic:
(source: robertsonics.com)
Red/red/brown is 220 Ω, red/violet/brown is 270 Ω. (The circuit can be improved with a 10 kΩ resistor between pins 5 and 7 of the optocoupler, and then the 270 Ω resistor can be increased to about 1 kΩ.)
There are different styles of MIDI sockets:
All of them are described as "DIN socket, female, 5 pins, 180 degrees", and are meant to be soldered. The square one could be jammed into a breadboard, with enough force.
Alternatively, you could take apart a MIDI cable and solder two pins to the two signal wires so that you can plug it directly into the breadboard (this is what the linked articel does).
In a breadboard, the five holes in each vertical row are connected together.
See, e.g., Sparkfun's How to Use a Breadboard for details.
You could make your own connector wires from AWG 24 hookup wire, or buy premade jumper wires.
This jumper is called a solder jumper; you are meant to apply a blob of solder to connect them.
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H: Determine transconductance of a JFET given only voltage gain and internal drain resistance
I have a homework question as follows:
If a JFET having a specified value of rd=100 kΩ has an ideal voltage gain of Av(FET) = -200,
what is the value of gm ?
As far as I know, the closest formula for gm relating Av and rd is Av = -gm(rd||RD)
but RD is not provided in the question. I would use RD=0Ω, but that would result in 1/(1/100kΩ)+(1/0Ω), which is undefined. Is there some other way of doing this?
AI: I think I figured it out.
Since we are talking about a JFET in isolation, Av=VDS/VGS
Since ID=gm*VGS, we can rearrange to
VGS=ID/gm
and since VGS is always negative, we can make this VGS=-ID/gm
lastly, since VDS=ID*rd we can plug these 2 equations into the first one to obtain
Av=ID*rd/-ID/gm
rearranging gives Av=-rd*gm which we can plug in -200 and 100kΩ to get a gm=2mS.
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H: Bypass button press on fan for direct power on when plugged in
I have a fan that I want to plug into a thermostatically controlled power outlet so that the fan comes on when the temperature reading reaches a certain set point.
The fan is currently wired through an on/off switch which also included a switch for a motor that operated the oscillation of the fan. I'm not using the oscillation motor/function.
Originally I was thinking I could just cut the three wires going to the motor and the same three wires going to the switch circuit board, match colors and solder them together. But there are a couple of capacitors on the board. Now I'm not so sure that would work. What is the correct way to bypass the fan switch for direct power on?
Here are photos of the front and back of the switch board.
The button on the left operates the fan.
K1, on the right, is the fan button.
AI: looking at the photo there seem to be some triacs (in semi-cylindrical TO92 packages) that do the actual switching of the current.
removing the circuit board, and connecting the white wires together and connecting the red power wire to either the back high-speed or the red low speed terminal should get the fan motor running.
simulate this circuit – Schematic created using CircuitLab
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H: The Art of Electronics 1.35
Forgive me if this is not the proper question format. Please critique it if not. I am new to this site. I am reading "The Art of Electronics" and cannot understand the jump made in equation 1.35 to go to from \$V_{out} = \frac{R}{[(R^2 + (1/\omega^2C^2))]^{1/2}}V_{in}\$ to
\$V_{out} = \frac{2\pi fRC}{[1 + (2\pi fRC)^2]^{1/2}}V_{in}\$ for the magnitude of the Voltage output in a generalized voltage divider.
Thank you!
AI: $$V_{out}= \frac{R}{{(R^2+(1/\omega^2C^2))}^{1/2}}V_{in}$$
$$V_{out}^2= \frac{R^2}{{R^2+(1/\omega^2C^2)}}V_{in}^2$$
$$V_{out}^2= \frac{R^2\omega^2C^2}{{R^2\omega^2C^2+1}}V_{in}^2$$
$$V_{out}^2= \frac{(R\omega C)^2}{{(R\omega C)^2+1}}V_{in}^2$$
$$V_{out} = \frac{R\omega C}{{((R\omega C)^2+1)^{1/2}}}V_{in}$$
$$V_{out} = \frac{2\pi fRC}{{((2\pi fRC)^2+1)^{1/2}}}V_{in}$$
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H: How to make active buzzer louder
I have an active buzzer connected to an Arduino and everything works fine but the buzzer is just not loud enough. I don't know any specs about the buzzer but I've tried connecting it to a 9v battery using a transistor with the collector connected to +9v, the base connected to the digital output pin of the Arduino, and the emitter connected to the buzzer. This did not seem to do anything different. I tried using a passive buzzer as well using a PWM pin, but I was not able to achieve the same results so I'd like to stick with the active buzzer. Thank you.
AI: Put the buzzer in the collector circuit and it should be about as loud as it is connected directly to the 9V source. If that's not loud enough, get another buzzer. Hopefully it's rated to work with 9V.
simulate this circuit – Schematic created using CircuitLab
You were connecting it as an emitter-follower which gives you about 0.7V less than the logic input voltage (4.3V with 5V logic) and the remainder (4.7V with a 9V supply) wasted in the transistor. A higher supply would just result in more wasted power. Depending on how much load the buzzer represents the emitter follower may result in a bit less loud than a direct connection or a bit louder (since the MCU output will be loaded significantly by most buzzers and you won't get the full 5V out).
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H: Questions about the circuit of the Arduino Micro
So I'm looking at the schematics of the Arduino Micro and I have a few questions.
On their website, Arduino claims that:
The Micro can be powered via the micro USB connection or with an external power supply. The power source is selected automatically.
I'm looking at their schematics, and more specifically here:
And can't really understand how T1 works, assuming only USB is connected. If there is no Vin, how is there any Vgs voltage, and how does the transistor T1 open/close?
What is the function of the Diode D2?
Thank you.
AI: When 5 V is available and Vin is not available
In the beginning only the body diode of T1 conducts.
Hence, there will be (5V - diode drop) at the source of T1.
that is only momentary,because, now we have a valid Source voltage. Gate is pulled low to ground via R9 (10kohm).
Now, Since, Vgs is more negative, PMOS is ON. Once it is on, diode gets bypassed by the MOSFET. Hence, one will get almost 5V finally for the 3.3 V regulator .
One can assume, the low on-resitance of PMOS will certainly create very
low ohmic drop.
When 5 V is available and Vin is also available
The body diode may conduct in the beginning if 5 V is plugged in first.
The MOSFET too may turn on sooner and provide almost 5 V to 3.3 V regulator
As soon as Vin is connected (assuming that Vin is greater than 5 V), the MOSFET turns off because VGS is no more a negative value.
The current from USB will no longer be used because, the strong 5 V is available from 5 V regulator which is now powered from Vin.
When 5 V is not available and Vin is available
T1 will not be in the picture
T2 body diode can conduct and supply Vin to the U2 ( 5V regulator)
5 V regulator will feed the 3.3 V regulator as previous case
Function of D2
There is a reset switch. Any spike arising out of the reset switch due to debounce can be sometimes higher than 5 V supply itself. This may inherently cause damage to the RESET pin of the MCU. Hence, placing the diode will start to conduct when voltage higher than 5.4 V (example) is present at the output of the switch.
Consider it like a clamping circuit and clamping voltage is set to 5 V plus the forward voltage of the diode.
Normally, there will also be diodes internal to the MCU pin for protection, but placing the external diode is definitely a good practice. The internal one is for emergency use only, i would say.
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H: esp8266 doesn't work when connected to same supply as relays
The problem:
Circuit one (with Arduino Nano) did work fine. I used a separate power supply (5V wall wart) for it, because I didn't think that the on board regulator could handle 12V.
Circuit two (with NodeMCU) does not work - either does not turn on, relays are being switched chaotically, does not connect to wifi. When I disconnect the D1-D8 pins from the transistors, it turns on and connects to wifi. I guess, when I will connect the NodeMCU to a separate supply, all will work as expected.
My question is - why can't it be connected to the same +12V? Is there something horribly wrong with the second circuit?
P.S. The project is controlling three AC motors that move metal blinds (security shutters). I made the original circuit a few years ago, now I wanted to add wireless connectivity via blynk. I know that there should be flyback diodes across relay coils, but at the time I didn't know that, and the thing was functioning fine without them. I will probably add them now, however.
Thanks
AI: I definitely recommend adding the flyback diodes across the relays
The bigger the difference between the Vin and Vout, higher will be the power dissipation internal to the regulator. This regulator has an internal power dissipation protection circuit, which may be triggering and resting the board. you can monitor the 3.3 V output for that
It will be helpful to add a series resistor for the switches and also a capacitor for the two input pins.
Also a 100k pull down to all the transistor base pins if you have space. This will help not to trigger relays accidentally when MCU is reset due to either an ESD event or a spike on it's one of the pins.
i assume 12 V supply is same as the one used for Arduino nano setup, so not doubting on it's current capability.
Try adding only one relay and monitor the 3.3 V supply pin on an Oscilloscope if possible. If it works, go on adding the load.
Consider adding a few caps at the voltage input pin. It will also help to absorb higher energy coming from make break of relay contacts.
Here is the datasheet of Node MCU ESP 12 Module.
http://bienonline.magix.net/public/esp8266-faq/NODEMCU_ESP12.PDF
As per the schematics, a 5 V is expected. the input range is upto 16 V is mentioned in the datasheet. The datasheet of the regulator can be found here.
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