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H: What is the difference between PDIP and MDIP?
What is the difference between these opamps?
MDIP: http://dk.rs-online.com/web/p/komparatorer/5338186/
PDIP: http://dk.rs-online.com/web/p/komparatorer/0428458/
PDIP: http://dk.rs-online.com/web/p/komparatorer/7140789/
I need an LM311 which I can use on bread board as a comparator with fast switching. Some has MDIP some PDIP. What is the difference? ?Are all these the same except their switching times and voltage ranges? Will they be treated the same way?
AI: The opamp is the same, it is only the packaging which is (slightly) different:
PDIP = Plastic Dual-In-line Package
MDIP = Molded Dual-In-Line Package
Since both are DIP (Dual-In-line Package) you can use them on a breadboard.
The difference between Plastic and Molded is completely irrelevant for you !
Just get the cheapest.
The silicon circuit inside is IDENTICAL (assuming they are from the same manufacturer).
So switching times and voltage ranges are also IDENTICAL. |
H: The calculation of Conventional non-tripping current and Conventional tripping current of MCB
IEC 60898-1 defines the Conventional non-tripping current and Conventional tripping current of a circuit breaker is 1.13In and 1.45In. But why these two numbers? Well, the normal wave of power network may have been taken into consideration. How to calculate them?
AI: You wouldn't expect a 10A fuse to blow at (say) 10.5 amps but 13% above this at 11.3 amps you might expect a fuse to eventually blow. It's exactly the same with circuit breakers and they both have the 13% overload point meaning the CBs/fuses should not trip if they were at this level all day. On the other hand, the 45% overload level should trip after 1 hour and at 155% overload (2.55 times rated current) it should trip after one minute.
However there are different breaker technologies that will accelerate this: -
Data taken from here and note that is just shows the thermal part of the breaker's characteristic. The magnetic part handles the much bigger overload currents. |
H: Power supply for LED display
I've created a special microcontroller driven LED display which I need power supply for. The display uses 24VDC and draws any current between 0 and 8 amps depending on how many LEDs are illuminated. Most of the time it's not illuminated and only microcontroller needs a little power.
So far I've used a battery charger as power supply for testing but I will need a proper power supply for it. The power supply needs to be weatherproof as it's going to be installed outside.
But it's very hard to find this kind of power supplies. So far I've found some LED power supplies like Mean Well HLG-240-24. Can I use this kind of power supply for my project? I think not as it's a constant current supply. Am I right? What other options I have?
AI: Without directing you to a specific supply, you already know most of what you need to find.
Outdoor rated supply, so you want one with an IP rating of 66, 67 or 68.
Constant Voltage, as you need variable output.
Since you need 24v at 8 Amps (195 Watts), adding in a margin of safety, look for a 210 Watt or higher supply.
If you are willing to add in a switching voltage regulator, you could look for a higher voltage supply and regulate down. 48V 5A for example. |
H: Xilinx clocking wizard - How to connect clkfb_in and clkfb_out
I created a VHDL design which needs a 50 MHz clock input. The Spartan-6 I'm working on gives me a 100 MHz clock signal, so I used the Xilinx Clocking Wizard to get a 50 MHz clock. When I choose "No Buffer" two additional ports will be created - a clkfb_in and a clkfb_out. I don't understand what these ports are good for and how do I connect them?
AI: The additional feed-back ports (clkfb_*) are visible when you select something other than the default "Automatic control on-chip" for the "Clock Feedback Source" (Page 3 of Clocking Wizard, version 3.6). It has nothing to do with the selection of "No Buffer" for the input clock.
If you just want to get a 50 MHz internal clock out of the 100 MHz external clock select the default "Automatic control on-chip". And on the first page select for the input clock:
either "Single ended clock capable pin" if the external clock is connected via a single wire to the FPGA (most common for 100 MHz),
or "Differential clock capable pin" if the external clock is connected via LVDS.
The other feedback options are only required for more advanced control of the phase relation-ship between the original and the generated clock. For this, the clkfb_in and clkfb_out ports provide access to the feedback loop of the PLL.
An example scenario is the Zero Delay Buffer, where the generated clock is outputed again by the FPGA. If the original clock (at the input clock pin) and the generated clock (at the output pin) should now be in phase, the feedback loop must also encounter the delays of the input and output drivers of the FPGA pins. Thus, one must feed back the generated output clock (at the output pin) to another (clock) input pin of the FPGA via the PCB, and connect these input pin to the clock-feedback input port of the PLL (clkfb_in).
If the generated clock has a different frequency than the original clock in this scenario, one must bring out the clock-feedback output signal (clkfb_out) and feed this back via the PCB. A picture of this setup can be found in the user guide UG382 Spartan-6 FPGA Clocking Resources in Figure 3-13 on Page 111. |
H: Why am I getting negative base current in LTSpice simulation?
When I was trying to bias an NPN transistor I noticed that the base current Ib is negative in LTSpice. So for the sake of simplicity I only apply voltage to the base-emitter junction. As you see in the figure above LTSpice shows this current negative. Infact when you bring the cursor on R3 the arrow points +V2.
Isn't the direction of Ib is from +V2 to GND in an NPN transistor?
Here is one example in tutorials:
http://www.zen22142.zen.co.uk/Design/cct/sw1.gif
I'm confused..
AI: You didn't measure the base current, you measured the current through R3.
Even though the symbol doesn't show it, LTSpice is keeping track of which pin is 1 and which is 2, and defining the sign of current with some fixed convention relative to those pin numbers. Either current is defined as going in to pin 1, or into pin 2, though I don't know which one.
To get the current through R3 to have the same sign as the current in to the BJT base, you just need to turn the resistor around 180 degrees.
Edit: User W5VO made some images showing how the cursor shows the reference direction when you hover over the resistor:
And how it changes after you rotate the resistor by 180 degrees: |
H: Is it possible to test a lithium ion battery for safety? How?
There have been stories in the news recently about fires that are believed to be caused by the lithium-ion batteries inside hoverboards.
If you had one of these devices and didn't mind taking the hoverboard apart to get at the battery, could you actually test to see if its battery is safe/up to spec/liable to cause a fire? If so, how?
AI: There is no non-destructive black-box test you can do on a battery to see whether it has any dangerous failure modes. You can test it for voltage, for capacity, for internal impedance, for in/out charge or energy efficiency, but you cannot test it for what it takes to blow it up without blowing it up.
Amongst some hobbyists whose forums I follow, the advice for getting the most performance out of power switching devices is to turn up the power until it blows up, then back off a bit! The same would go for batteries. Though you would need a supply of batteries to a) get any meaningful statistical results and b) still have a working one left to actually use. |
H: Is over-volting a motor just a little bit likely to affect its lifespan?
So, I have a DC marine water pump. It's typically rated for "12v" lead acid batteries, so it should be designed for around 13.5v. I am going to be pwming it and monitoring the current, with a base voltage of around 15.5v. Is this likely to significantly affect the lifespan of the motor?
AI: If you are going to regulate the current using PWM, the voltage of the pulses will not make much difference in the range of 15% or even 30% above the rated DC average voltage at this voltage level. The important thing is not to overload the motor. If you were to increase the average voltage by 15%, that would increase the motor speed by 15%. To drive a centrifugal pump 15% above normal speed requires 32% above normal torque and 52% above normal power. |
H: 125kHz RFID and NFC simultaneously
It it possible to have a passive NFC tag and a 125kHz RFID tag back to back in the same holder and not have one interfere with each other, reading one at a time? E.g Detect 125khz RFID tag, read it, disable 125khz reader, read NFC tag and then disable NFC reader, re-enable the 125KHz reader.
If this is possible, can both readers be active, reading their corresponding tag simultaneously?
For what application this would be used I'm not sure. I'm simply curious about whether or not this is possible.
AI: As far as I know, NFC tech operates within the 13.56Mhz band. 125Khz and 13.56Mhz are far enough apart that there should be no problem with both readers active at the same time, as long as your code can handle it. An NFC reader reads only tags operating within its frequency range and the same goes for the 125kHz reader. So each reader will operate without interfering with each other. |
H: Controls: Getting the feedback transfer function of a Plant and Controller
I'm designing a function in Python similar to MATLAB's 'feedback(T)' command. I know modules already exist, but it's something I want to do for myself for fun. However, I am running into issues. Let's say I have the transfer function of some arbitrary plant
$$T(s) = {s + 5\over s^2 + 4s + 7}$$
Let's also say I have some arbitrary PID/PI/PD controller (Not to imply this controller is actually good, this is more to demonstrate the concept, so keep that in mind!)
$$C(s) ={2.3802s + 7.7309 \over s}$$
We know that the Closed Loop Feedback Transfer Function has the form of
$$CLTF ={T(s)C(s) \over 1 + T(s)C(s)}$$
When CLTF computed above in Matlab, we get ...
$$CLTF = {2.38 s^5 + 29.15 s^4 + 133.8 s^3 + 292 s^2 + 270.6 s\over s^6 + 10.38 s^5 + 59.15 s^4 + 189.8 s^3 + 341 s^2 + 270.6 s}$$
However, using MATLAB and feedback(T*C,1), we get the result of ...
$$2.38 s^2 + 19.63 s + 38.65 \over s^3 + 6.38 s^2 + 26.63 s + 38.65$$
I already realize I can take my CLTF in MATLAB, put it in pole/zero (zpk) and things will cancel to get the same result as MATLAB's feedback command. However, no symbolic program seems to be able to factor these polynomials. MATLAB is clearly doing something I don't know about then. Does anyone have a clue how matlab's algorithm works? Or how I could code this same function?
AI: It depends how the calculation is done. Take as an example \$\small G= \large \frac{1}{s+a}\$, and \$\small K= 1\$. We may write the CLTF as:
$$\small\frac{G}{1+GK}=G.\frac{1}{1+GK}=\frac{1}{s+a}.\frac{1}{\left(1+\frac{1}{s+a}\right)}=\frac{1}{s+a}.\frac{s+a}{(s+a+1)}$$
This expands to:
\$\large\frac{G}{1+GK}=\frac{s+a}{s^2+(2a+1)s+(a^2+a)}\$
which is correct but inconvenient, and which reduces to:
\$ \large \frac{G}{1+GK}=\frac{1}{s+(a+1)}\$ when the \$(s+a)\$ factor is cancelled.
To force the reduce form, you could try writing \$\small G\$ and \$\small K\$ in numerator/denominator form: \$\small G=\large \frac{N_g}{D_g};\:\:\:\:\small K=\large\frac{N_k}{D_k}\$, then write the CLTF as:
$$\small\frac{G}{1+GK}=\frac{N_g\:D_k}{D_g\:D_k+N_g\:N_k}$$
Note that Mathworks recommends using the FEEDBACK command to derive closed-loop TFs, as this gives the reduced form. |
H: Where are details regarding peripheral configuration for STM32 controllers in datasheets?
I have recently begun working more with STM32 processors coming from the more simple Atmel 8bit variety. The Atmel datasheets are very nicely laid out -- specifically speaking to how they provide information relating to hardware configuration registers.
However, I am having a difficult time finding similar information in the ST datasheets. How, for example, do I find information about configuring the alternative options on a pin, or the sampling rate of the ADC? I can find only general information about this hardware for a given processor, but never as much detail as provided by Atmel shown above.
Am I just looking at a condensed datasheet? I pulled one available directly from mouser: see an example.
AI: To get the detailed info including register map and other register details for an ST microcontroller, you want what they call the reference manual, not the datasheet or the user manual.
See for example:
Reference manual for STM32F405/415, STM32F407/417, STM32F427/437 and
STM32F429/439 lines
Reference manual for STM32F0x1/STM32F0x2/STM32F0x8 lines
Reference manual for STM32F401xB/C and STM32F401xD/E lines
Reference manual for STM32F100xx line |
H: Finding voltages in a circuit with current source
I am trying to understand the basics of current source, but I don't know how to calculate the voltages v1 and v2. I tried to sketch the expression for current divider, but I think I didn't actually understood how to use it properly on an exercise.
simulate this circuit – Schematic created using CircuitLab
AI: You can calculate the current through the R2/R3/R4 branch using the current divider rule. Knowing the equivalent resistance of the R2/R3/R4 combination is 50 ohms,
$$I_{234} = I_1\frac{1/50}{1/50 + 1/75}$$
$$I_{234} = (25)\frac{75}{75 + 50}$$
$$I_{234} = (25)\frac{75}{125}$$
Which is the form given by your book. |
H: Why is this 10pF capacitor reading 79pF?
This is my implementation of this circuit, for connecting a Teensy 3.0 to an MSGEQ7. It worked fine when I set it up on a breadboard, but now I've soldered it onto veroboard it doesn't.
Checking through with my multimeter, I find the capacitance between pin 8 (bottom left as pictured) and the Teensy's AGND pin (connected to the black wire in the middle) to be 79pF, rather that the 20pF* it was when I measured the component before soldering.
Is there anything wrong with soldering one leg of the 100nF from pin 6 to the leg of the 10pF? They're both meant to be connected to ground according to the schematic.
Looking closer at the capacitor itself, it's marked "10", which should mean it's 10pF in the first place? Might I have damaged the capacitor while soldering?
AI: The only way to be sure of a capacitor's true value is to disconnect it from the rest of the circuit before you measure it. Other components within the circuit could be contributing additional capacitance and other effects if you try to measure it in-circuit.
It's unlikely that you damaged the capacitor when soldering it in, non-electrolytic ones can usually take the heat without any risk. |
H: Can a flip flop possibly work at over 800MHz?
As I know, the setup time is at least required time for data to become stable at the input of a FF before the sensitive clock edge. Hold time is the required time for data to remain stable after the clock edge.
Usually I use a clock from a 24MHz OSC, when I use a test board. But when I synthesize with the RTL to make a chip, I used to 88MHz to 120MHz. I think this is meaning that this board can work at almost 120MMz.
Then what if I want to make a chip with RTL that works at almost 800MHz frequency, then is this meaning that the Flip-Flop is working in 800MHz?
If yes, which fab companies support that frequency? Is this possible way?
Is this needed some unique process in a fab?
AI: Here is a D flip-flop spec'ed to operate at 40 Gbps. Setup and hold times are advertised as 4 ps. It consumes only about 750 mW.
These are manufactured with a SiGe process, although I don't know which one.
There are several foundries offering SiGe process, including GlobalFoundries, TSMC, and TowerJazz. |
H: Pressure sensing controller using Stress Ball
I am thinking of a project proposal for my robotics course and we are required to make one that has a potential application on physical therapy or medical fields. One thing that came across my mind is a motorized wheelchair that moves when a stress ball control is squeezed by the user. As an electronics novice, I wonder if I could integrate a sensor circuit with a rubber ball so that when it is pressed, perhaps by a stroke patient, it triggers some driver circuit. is this possible? if so, how?
AI: Of course it is possible. You can measure the squeezing force for example with an force sensitive resistor (FSR sensor) (see Adafruit example) or even built your own (fabric) pressure sensor (see www.kobakant.at). All you need is a microcontroller with an ADC. For example every Arduino board has this capability. In addition you can use a motor shield/board or built your own circuit to control the motor system. |
H: Schematic of switching power supply 230V to 5 / 3.3 VDC
I would like to ask you if you have the schematic of the power supply mentioned below. There are various variations but the input is always AC 85-265V 50/60 HZ while the output is, depending on the model either 5VDC or 3.3 VDC. The maximum output current it can deliver is around 500 mA.
The power supply is the following and could be purchased from various sources on the Internet (eBay, Amazon, Alibaba, etc.)
So far I have identified the following electronic components on the PCB:
THX208 - PWM Switching Power Supply Controller
MB6S - 0.5A Bridge Rectifier
LTV-356T OPTOISOLATOR 3.75KV
Electrolytic Capacitor 10V/1000 uF
Electrolytic Capacitor 400V/4.7 uF
Electrolytic Capacitor 25V/22 uF
High Frequency Transformer (no visible marking on the transformer)
Additionally there seems to be in SMD:
Zener diode
Led
Capacitors
Diodes
Resistors
But their printing is to small for me to read with our a magnification glass (which I do not have yet)
AI: This is what you need to do:
Step 1: Google it
Open the link Andy gave. Or search for offline power supply. You will see lots of schematics. Pick a few which seem simple and manageable with the knowledge you have. Out of those, narrow down your search by eliminating those ICs which are too expensive/not easily available where you live. ST Viper22a is one of the cheap and most commonly solutions available.
Step 2: Datasheets and app notes are your best friends
Once you have decided the IC, look for the datasheet and app notes for that particular IC. You will find all details inside. Try to understand what each part does by dividing it into small logical parts. For ex - Rectifier, filter, switch etc. Unless you understand the circuit, it'll be too difficult to make it and you will never know what went wrong.
Step 3: Get your hands dirty
Buy the parts you need. In these power supplies, flyback transformer is the most tricky part, everything else is simple. For transformer, try to break apart a transformer, count the number of turns, figure out the transformer package etc - Or give the sample to a local vendor who will replicate that for you. Once you have the basic working circuit, then you can think about adding filters to improve the output.
If in between you encounter any issues, you can post what you did and people will most likely help you. |
H: What's the purpose of this section in an RF amplifier circuit?
I'm relatively new to electronics and I've just grasped the concept of bypass caps and some common decoupling practices (so you have an idea of my general level) – but I can't seem to understand the purpose of the circled section of this circuit:
As I said, I'm very new to electronics so don't be too hard on me – it's probably something blatantly obvious I'm missing. Or not.
AI: This appears to be your source, or a source - Wideband RF amplifier
Is this your image source? - if not please advise where.
Their explanation is close to my one in the comments above. I noted that the R2 R3 L2 path provides negative feedback with impedance rising with frequency - which decreases feedback and so increases gain, as they note.
It says
This is a classical RF amplifier design.
The feedback resistors R3 and R2 define the gain.
By changing the values we can get a higher gain at low frequencies, but this will influence the overall gain taper of the amplifier.
Coil L2 is used to get more gain at high frequencies.
If the value is increased, instability will occur.
My above L2 guess was only partially correct. They say:
Dimensions of L2 are: 6 windings, inner diameter is 3mm and wire thickness must be 0.4mm. In the proto type I used and SMD type for L1, make sure it’s a high Q coil.
My original assessment:
R2, R3, R4 together provide DC bias.
The spec on L2 MAY mean eg 6 turns wide x 3 layers deep on a 0.4 some-units former - or something else :-).
Without C3 I'd have guessed it was simply an RF choke to prevent RF feedback BUT as C3 bypasses R2 and as R2 is >> R3 it suggests that it is intended to allow RF feedback controlled by R3 & L2.
It's negative feedback so would stabilise the gain.
Arguably R3 L2 have a frequency dependant effect with impedance increasing with frequency but it's barn-door wide. |
H: AC/Phasor Circuit Output Voltage Question
So we have a pretty simple circuit, just a 10V voltage source in series with an impedance of 1.8k ohms and a capacitor with a capacitance of 100nF. We're asked to check the voltage across the capacitor at various frequencies.
I was told we use the reactance of the capacitor to find the voltage, which is 1/wC. I do (what i thought was) a simple voltage division across the capacitor, which I thought was just V * Xc/(Xc + R) with Xc being the reactance of the capacitor and R being the impedance of the other element.
The answers I get make sense but the solutions say that I should have used this formula: V * Xc / sqrt(Xc^2 + R^2). the answers I get using either formula are both similar but why would I use that second formula? Where'd they get that from?
AI: For a shared current into a resistor and capacitor you might be tempted to say: -
\$V_{SUPPLY} = V_R + V_C\$ (incorrect)
This would not be true because the voltage across a capacitor does not rise and fall sinusoidally as the current rises and falls sinusoidally. For a capacitor the current and voltage looks like this: -
(source: electronics-tutorials.ws)
In other words it is 90 degrees out of phase with voltage. This is because the basic formula for a capacitor is
\$I = C\dfrac{dV}{dt}\$
And, if V is a sinewave voltage then I has to be a cosine current.
If instead of real waveforms we drew them as phasors we would represent the voltages and current like so: -
So now if we want to "relate" Vsupply to the individual voltages of the capacitor and resistor we have to add them using pythagorous i.e.
\$V_{SUPPLY} = \sqrt{V_R^2 + V_C^2}\$.
It follows from this that impedances also add this way. |
H: Would you help me understand the design of this induction motor?
I need to understand the design of a single phase induction motor (I think it is a permanent split capacitor motor).
The motor works on three different speeds. It has 8 poles as shown in figure.
Let's assume that coils 5 & 7 are the main (Running) coils. So, Coils 6 & 8 are the starting (auxiliary) coils that are connected to a capacitor.
There are 4 more coils:
1.What are they used for?
2.Which one is north? and Which one is south?
3.Which one is a main coil and Which one is auxiliary?
4.Can I differentiate between main coils and auxiliary coils visually?
More information about my Motor:
1It is a motor of a small table fan (220V - 40 watts). A picture of a fan that is similar to mine is here: http://konwin.gmc.globalmarket.com/products/details/small-standing-fan-1547568.html
The motor has 16 solts.
AI: Based on the video, I believe that you are correct. This is a permanent split capacitor motor. The capacitor is connected in series with the auxiliary winding to provide a phase shift to the current in that winding so that the motor has a defined direction of rotation and will start automatically. The best way to identify the auxiliary winding is to observe its series connection with the capacitor. It may also have slightly smaller wire. There are four main coils and for auxiliary coils in a 4-pole motor. |
H: How do I build the current regulator circuit referred to on the LM337 datasheet?
What I would like to accomplish: I am trying to add current regulators into a home built dual rail linear regulated power supply. I previously asked this question about transformer fusing and received useful responses from the EE Community. The supply is mostly complete now and I also added a current source using the following schematic off the LM317 datasheet:
I adjusted the resistor values though to ensure that the current source stays well below my max current (.35Amps on each secondary of the transformer).
I would like to also build a current regulator on the negative rail using either Figure 12 or Figure 15 from the LM337 datasheet:
Problem: I may not understand exactly what is going on with the LM337 schematics, but I cannot figure out how to connect this circuit up correctly, especially after the LM317 current regulator was straight forward.
Where do I place the load? I think this is supposed to be a Current Source where the load goes between V-in and V--. I appreciate any help you can provide in understanding how the LM337 current regulator configurations are supposed to work.
AI: Use them exactly as you used the 317, -ve supply input to Vin, load between ground and ADJ, resistor between ADJ and VOUT. As shown in the schematic below:
simulate this circuit – Schematic created using CircuitLab
They are shown the way they are shown in the data sheet because current flows from ground, out of Vin and into your -ve power supply pin - remember conventionally we say that current flows from +ve to -ve |
H: Generating 5V DC in an AC system without the neutral wire
This is my first foray into AC circuits, I've only worked in low voltage DC circuits before.
I am building an AC dimmer circuit with a wireless radio, a bit like this device and I don't quite understand how I can generate a 5V DC voltage without the neutral wire being present.
The AC to DC converter module I use requires both a live and a neutral wire connected:
In the product linked above they must have some form of DC voltage present for the radio circuitry, I am guessing.
How would I go about either wiring the AC-DC module without the presence of a neutral wire and failing/ditching that, what kind of a power circuitry I would need to get5V DC with just the Live wire being present?
Thanks.
AI: So you have a device that operates in series with a load and must draw it's power from this series connection while turning the load on and off. How do we do that?
When the load is "on" we allow a small voltage drop across our control device. We have a small voltage but lots of current which provides us with the power we need.
When the load is off we allow a small current in the circuit. Now we have a small current but lots of voltage and again we get the power we need.
Note that this approach does have some issues.
The power circuit design will likely be quite complex. It will need to operate under two VERY different sets of conditions, high voltage but low current and low voltage but high current.
The power needed by the control device must be much smaller than the power the load consumes.
The Load must have suitable characteristics. It's voltage/current relationship must be suitable and it must not be adversely affected by small currents flowing when things are nominally turned off. Incandescent light bulbs were fine but CFL and LED bulbs can be more problematic. |
H: GPS antenna type
i want to interface a gps module and an antenna.
I found this kind of antenna (example)
It does not mention its type.
Is this an active or a passive antenna?
How to be able to know by myself without the need of asking here?
AI: The data sheet says: -
ORG9802 is a miniature antenna assembly, comprising four components:
Ceramic patch antenna element
Adaptor PCB
Coaxial cable (option)
Connector (option)
Everything above is passive |
H: How to send (simple) data from GATT client to server?
I have a PCB which is using a TI Bluetooth LE chip (CC2541). I'm hoping to send some simple weather data from the client (e.g., phone) to the server (CC2541) infrequently (once a day/week). Will a custom profile need to be implemented for this? Could an established profile be modified to handle the data, e.g., the Proximity Profile but with larger attributes?
If every type of data needs a profile, it seems rather clumsy. What is the canonical approach to sending/handling simple data streams?
Thanks
AI: The right way to do it would be to use a custom service that you've created for your specific data, but if this is just for your personal use you could piggyback off an existing service (like what could be in an example project) and add whatever characteristics for the data as you see fit.
Another approach would be to emulate the classic Serial Port Profile (SPP), which basically acts as a virtual serial port between the two devices. So, you could imagine how this could work with simple ASCII transmission of the weather data. There are some examples of this on the web if you search "BLE SPP". Bluegiga (https://bluegiga.zendesk.com/attachments/token/rx8se3yhwe3tlnh/?name=BLE_Application_Note_SPP_over_BLE.pdf) and other BLE modules have implemented this over the Generic Attribute Profile (GATT).
Link to SPP: https://developer.bluetooth.org/TechnologyOverview/Pages/SPP.aspx
Although, I think it would be more efficient to create a custom service for the weather data, because you might want to read or write different pieces at different times and it would be easier to manage the data. You could have a characteristic on the service for each piece of data you want (e.g. temperature, wind speed, wind direction, humidity, etc.) or you could create multiple services that represent different types of weather data (e.g. a wind service that has speed and direction characteristics, and a temperature service that has current, min, and max characteristics, etc.). |
H: Run an atmega328 using an 16Mhz crystal with 22nF caps
Can you run an ATmega328 using an 16Mhz crystal with 22nF capacitors instead 22pF?
AI: You cannot use 22nF instead of 22pF, it just wont work. Here you can read more about it.
http://ww1.microchip.com/downloads/en/AppNotes/00826a.pdf |
H: Eagle and vias - board layout
I will start out by saying that I'm an electronics hobbyist and I'm currently in the process of laying out my first 4 layer board in eagle. Now all of the PCB manufacturers I've looked at either don't support or charge a lot for blind vias.
In eagle I get several options for vias as show in this image.
Now do I just want to select 1-16 and rout on the required layers keeping other traces away, or do I select 1-2 for routing from layer 1-2, keeping in mind that I can't have blind vias.
AI: Though @Samuel has already written what you need, here is a little more about the (EAGLE) internals.
PCBs are usually made of a resin reinforced by glass fibers. To make multi-layer PCBs, usually several thin double-layered PCBs (cores) are made and glued together by a so called prepeg. After this, the vias are drilled and the walls of the holes are coated by metal to make the vias conductive.
However, it's possible to add vias already to the cores and so to make vias between distinct layers. But this adds extra work / costs.
EAGLE allows to configure between which copper layers vias can be made in the LAYERS tab of the design rule window:
Here, two cores (green) are glued together by a prepeg (grey), and vias are possible through each core as well as the whole PCB. This is defined by the string ((1*2)+(15*16)) in the setup.
You can change it to (1*2*15*16) which also defines a four-layer PCB, but only with vias across the whole board.
Finally, you can of course your set up and use "1-16" vias only, and this is more for completeness. |
H: Are there high quality alternatives to Sigma-Delta for Audio
Is Sigma-delta pretty much the only game in town when it comes to ADC in the audio world (min 20-20k frequency response) ?
By looking at some of the major players and chip manufacturers like TI, Analog Devices, and few others, that certainly seems the case.
Looking for maximum performance--linearity, timing, F response, S/N (if that is even a factor).
I think $100 max per stereo pair. That seems crazy given you can get a Burr-Brown Ti or others for under $30.
AI: Certainly not, it's the most common and probably cheapest, but you can find SAR (Edit: successive approximation) converters that are quite competitive (in performance) with very good Delta-Sigma converters. |
H: Can I use a TRIAC on a secondary isolated AC winding?
Can a TRIAC be used on the secondary winding of an AC isolation transformer?
Say I have 230 V on the primary, but I want to use the 12 V AC secondary, will a TRIAC work on the secondary?
What I want to achieve is this: Use the TRIAC on a secondary winding (say 12-24 VAC) to use on a spot welder. The control pulse to the gate of the TRIAC will be delivered via two optocouplers (one for the positive cycle and one for the negative cycle) of the AC wave. The optocouplers will be controlled by a single-shot (mono-stable) pulse from a 555.
AI: A simple answer is "yes you can". The better answer is "you don't have to", because in your situation, it is better to use a triac control on the primary side. I have seen many special heating devices that use this approach, the current is smaller compared to the secondary, so you will not have trouble with short circuits where the major resistance would be your triac, thus the spot welder will heat mostly your triac and not the spot.
Forget about using a zero cross detector circuit, the worst case for a transformer is to turn it on at 0V and don't use the 1.9T toroidal transformer (this is what you'll get in a shop for hallogen lamp), a use transformer designed with max. flux 1.6 Tesla or maybe less in order to keep dI/dt manageable. |
H: xV input from a wall wart to +9v, -9v, +9v output
I am trying to modify a circuit Circuit schematic that requires three 9v batteries. Two to supply +9v/-9v for an lm358N opamp, the other +9v is to drive a DMM display.
I have dozens of wall warts of just about every voltage and amperage available. Can I simply use two 7809's for the two +9v and one 7909 for the -9v all off of one input ps?
I haven't dealt with electronic circuits for well over 30 years. I'm not afraid to search if someone can gently lead me in the right direction.
AI: Yes, you can use two DC-output wall warts together to make a + and - supply.
Connect the - output of wall wart A to the + output of wall wart B. That point then becomes your ground (0V reference for everything else). The + output of wall wart A will then be the + supply, and the - output of wall wart B the - supply.
If these are 9 V regulated wall warts, then you don't need the 7809 and 7909 regulators. That would be simpler and the recommended arrangement.
If you do use a regulator, not that the negative one needs to be a negative regulator, not a 7809 as you say. A 7909 would work, and is the negative equivalent of the positive 7809. The unregulated voltages from the wall warts would also need to be a few volts past (higher for positive, lower for negative) what the regulators need. The 78xx and 79xx series require a few volts headroom. See the datasheet.
There is no need to use a separate supply for the DMM display. It should be able to run from the same +9 V supply as the amplifier. |
H: Is it good to clear the state on 'posedge enable' in verilog
I am just getting started with verilog and I wanted to try to create a module which calculates whether a point in the Mandelbrot set diverges or not. I am planing on using the Xilinx IP for 32 bit floating point math. Bellow is the code I have so far which is far from complete.
What I want to do is when the enable wire is flipped from false to true I want to reset the state of all of my registers so the calculation can begin on the next clock cycle. I was wondering if this is a good practice or not. I was thinking the issue may be that when enable changes to true, but the always @(posedge clk && enable == 1) begin executes before the initialization is done. Is there a better way to go about this? Maybe I should have an internal enable register which is changed when the enable wire is triggered.
Also I am just wondering if the EE stack exchange is the best place for verilog questions? I have been posting on stack overflow but these questions tend to not get much attention.
module mandelbrot(
input [31:0] x,
input [31:0] y,
input clk,
input enable,
output reg [7:0] count,
output done);
reg [61:0] z;
reg [61:0] zsq;
reg [1:0] state;
parameter SQUARING = 0;
parameter COMPARING = 1;
parameter ADDING = 2;
reg valid_sq;
reg done_sq;
reg in_sq;
reg valid_add;
reg done_add;
reg in_add;
reg valid_lt;
reg done_lt;
reg in_lt;
always @(posedge enable) begin
z = {x, y};
valid_sq <= 0;
done_sq <= 0;
in_sq <= 0;
valid_add <= 0;
done_add <= 0;
in_add <= 0;
valid_lt <= 0;
done_lt <= 0;
in_lt <= 0;
end
always @(posedge clk && enable == 1) begin
case(state)
SQUARING:
COMPARING:
state <= ADDING;
ADDING:
state <= SQUARING;
endcase
end
endmodule
AI: always @(posedge clk && enable == 1) begin
That's not the way to do it. I'm not even sure it's a valid syntax. Furthermore, you can only control a reg or integer type variable from a single always block, so having the first always block that is sensitive to enable means you couldn't control any of those signals in any other always block.
What you are looking for depends on what the logic connects to. For example if you want to do calculations while enable is high, but then don't use the values when it is low, then you can simply use the enable signal as a negative reset. If this is the case then really the signal should be called just that, "reset" not "enable".
always @ (posedge clock) begin
if (~enable) begin
//Reset the values ready for next time
end else begin
//Do stuff when enabled
end
end
This may not be what you want. For example if you need the registers to hold their value when the enable signal is low, and then clear them just before a calculation. This can be done too, but only if you don't mind it taking one clock cycle. This approach can be accomplished using a synchronous reset and an edge detection circuit.
reg enableDelay;
always @ (posedge clock) begin
enableDelay <= enable; //Keep track of the previous value
end
wire enableRising = enable && !enableDelay; //enableRising will be high for a single clock cycle at the rising edge of enable
always @ (posedge clock) begin
if (enableRising) begin
//Clear stuff on rising edge of enable
data <= 1'b1; //Maybe we set the register 'data' to 1 or whatever
end else if (enableDelay) begin
//While the delayed enable signal is high, do stuff.
data <= something;
end
end
The code above will produce the following output:
There is a rising edge of the enable signal. Notice how the enableRising signal also goes high at the same time.
The enableDelay signal goes high as it is always one clock cycle delayed from the enable signal. At the same moment, the second always block detects that the enableRising signal is high and performs the "reset" operation. This is indicated by the data signal going high.
On the third clock cycle, enableRising is now low again, so the data signal is set to whatever calculation you do in the else part of that block. It will keep executing the else part each clock cycle until the enableDelay signal goes low again.
Basically the block will clear on the rising edge, and then do n calculations (where n is the number of clock cycles that the enable signal was high).
The trouble with your question is a classic X-Y problem. You are describing Y when really you should be telling us X. Y is what you think is the way to do something, X is what you actually are trying to do. Please clarify in your question.
Directly answering the title of the question: "It depends". Some signals you might want to clear - maybe a counter needs resetting to zero, or something. There may be others which don't matter - say the output of a calculation that doesn't affect the input.
Tasks that require doing a sequence of events are best organising into a state machine, such that when some trigger occurs (e.g. rising edge of a signal), your state machine starts running through each state. Once the task is complete, it then returns to an idle state waiting for another trigger. This way you don't need to reset stuff on the trigger as the state machine if designed correctly would leave all the signals it controls in a default state when it returns to idle. |
H: Replacing 5 V pin with battery not working
I have a small breadboard that has a L293D motor controller and 2 DC motors. The board is hooked up to a Nordic DK and everything on the PWM side is fine. The breadboard is powered by the development board's 5 V pin but I am ready to move to the next step of a PCB so I will need a battery.
I have two 2032 coin cells that were taped together and have jumpers for positive and negative but whenever I try to use it as the power source on the breadboard it fails to work. I checked it with a multimeter and it's throwing out at least 5.6 V.
Is there something I am missing? Are lithium batteries not applicable for this? Can I still make a PCB with what I have now?
AI: Your coin cells have far too little peak current capacity to run anything but the tiniest sort of motor. As a result the voltage is probably much lower under load. Your L293D being a bipolar bridge will also have very high loss - probably in excess of a 1-volt drop by the time you count both top and bottom switches.
Further, your develoment board may not be designed to handle the (lightly loaded) voltage of two coins cells in series, so you may have already damaged it.
If you want an "easy" way to replace a 5v supply with a battery, you might consider using a USB powerbank, though they can have various sorts of turn-on behavior and some may turn themselves off below a minimum current draw. Doing it yourself is likely to either require a number of AA cells to get well above the target voltage even at end-of life, followed by a linear regulator. Or better your can use switching regulator or potentially a boost converter from a lower battery voltage (which incidentally is what a USB power bank is - some buck regulate from 2 lithium cells, others boost from 1, both typically cells good for well over an amp). |
H: Eagle: PCB layers stack-up and impedance
I had a PCB board with 8 layers to be fabricated. I have used an opensource deign modified it a bit and want to get them fabricated. The PCB company asked me to provide layer stack and impedance requirements.
In order to make better PCB, please offer me the layer stack for every layer and the impedance requirements.
I am not sure what exactly to reply with specially regarding the impedance requirements
Here is my layers setting in eagle and regarding impedance control I have an A20 soc and DRAM.
AI: The PCB manufacturer is asking for the stack-up because generally people include Power planes and Ground planes in between the layers.
So how would the PCB manufacturer know where to put which layer?
Sophisticated PCB Manufacturers also have impedance control on signals. You should provide him the stack file.
Like USB Differential Signals (D+ and D-) require impedance control on tracks. AFAIK, 90 ohm to be exact.
He requires these files for quality manufacturing. |
H: op-amp: what is internal frequency compensation?
I'm an electronics student.. while reading the operational amplifiers in detail, I came across the word "internal compensation" in the summed up features of an op-amp. please give me the detailed explanation of this feature.
AI: Assuming you've already studied the internal schematic of the classic 741 op-amp, you already know the major internal blocks are a differential-to-single-ended input stage (differential pair fed by current source), a common-emitter amplifier stage, and an output driver stage. The internal compensation is a small negative feedback capacitor within the common-emitter amplifier stage. If you refer to TI LM741 datasheet, 7.2 Functional Block Diagram, the internal compensation capacitor is C1 30pF near the center of the schematic. (Note: TI's block diagram has an error, they have two transistors labeled Q15 and one unlabeled transistor.)
The purpose of this internal compensation is to reduce the open-loop gain at higher frequency, so that there will be less than unity gain at the frequency where the phase shift becomes 180 degrees. This is a heuristic to help ensure that there is sufficient phase margin to avoid oscillating, when the op-amp is externally configured as a unity-gain amplifier.
This is also a marketing feature for the IC manufacturer. They can make one version of the op amp that has internal compensation, for customers who care about unity-gain configuration. Then they also make a slightly different version that does not have the internal compensation, and thus will not be unity-gain stable. However the "uncompensated" op-amp will be stable at some minimum gain, for example 2V/V or 5V/V -- this will be specified on the data sheet. |
H: Is there a way I can power this circuit without a +- 15V power supply?
Simple Amplifier Kit
I built this audio amplifier for my circuits lab course. In the lab I had access to a benchtop power supply for the necessary +- 15V. Now I'd like to give the completed amp and speaker to a friend as a Christmas gift, but I need some way of powering it without the power supplies we had in school.
I intend to build it inside a tin lunchbox and I'm considering just using the necessary batteries. However, I'd also like to know if there is a simple way to get the +- 15V I need through a standard 120V wall outlet.
Thanks!
AI: If you can find a 10VAC mains powered transformer, then you can make a simple power supply like this:
simulate this circuit – Schematic created using CircuitLab
Failing that, two 12VDC-output switching adapters will do a fine job, at the cost of some convenience (two plugs have to be put in the wall). Put a diode (eg. 1N4004) across the output of each adapter (reverse biased) so that if just one is plugged in the other one does not see much reverse voltage at the output.
The power supply voltage for your amplifier is not critical, a bit lower does no harm other than lowering the maximum power output (for a given speaker) a bit.
Laptop supplies may not work because some of them have the minus lead common with earth, so connecting them as required will short the outputs. |
H: How to exit from this view mode in Altium!
There are so many shortcut keys in Altium. I entered this view mode without noticing what keys I stroked, just can't exit from this view mode :(.
AI: I think that is Single Layer mode. Try Shift+S. |
H: Magnetic modulation/ induction
I've been looking for a viable means of communication under water (other than sonars), be it short or mid-ranged, and I have come across MM and MI.
I am no engineer, so I need help with this, and I guessed you guys would be helpful.
In this case, the emitter would be located in an AUV (Autonomous Underwater Vehicle), so the power input to the comm system can't be too high, let's say no more than 20 or 25 WH/dm^3, and it should last for more or less 30 hours.
The question is: What would the maximum range of this system be?
Thanks in advance!
AI: Is there a case for radio over magnetism underwater?
You can send and receive data using radio underwater but you will find that sea water and fresh water are quite different mediums: -
The graph is comparing seawater with Adelaide fresh water and yes, the graph is a bit poor quality but the formulas are here: -
Attenuation (α) in dB/metre = 0. 0173 √(fσ)
where f = frequency in hertz and
σ = conductivity in mhos/metre (siemens per metre)
The graph tells you attenuation per metre and is taken from THIS document. So why persist with radio waves when you can do it magnetically?
Answer - In the short range "arena" magnetism wins but as distance increases the voltage induced in a receive coil falls as distance cubes (as does the E field when not conjoined to a H field like it is in a proper EM wave). If you transmit a radio wave then this is a proper EM field and individually E and H falls as plain ordinary distance. That's the beauty of radio - you appear to get something that is totally better than the components that it's built from.
See my answer to this unrelated question for some more detail and also this answer which has the following pretty picture: -
The picture above shows the formula for flux density at a distance from a transmit coil and note that as Z gets dominant over the coil radius the denominator becomes \$2Z^3\$ i.e. an inverse cube law.
So, my recommendation is to strongly consider a proper radio wave or at least compare the levels of signals you are likely to receive versus distance. Also, read the very excellent document with the bold link under the bullet points. You can learn a lot from it. |
H: What is the difference between MibSPI and SPI?
The following text is from the TI TMS570LC4357 microcontroller features overview:
Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
MibSPI1: 256 Words with ECC Protection
Other MibSPIs: 128 Words with ECC Protection
MibSPI seems to be a Texas Instruments term.
What is the difference between MibSPI vs SPI?
The physical layer is the same, right?
Can I connect standard SPI devices to the MibSPI module?
AI: From the Reference Document:
This reference guide provides the specifications for a 16-bit
configurable synchronous multi-buffer serial peripheral interface
(MibSPI). The MibSPI is, in effect, a programmable-length shift
register used for high speed communication between external
peripherals or other microcontrollers. Its multi-buffer allows
multiple transmissions with different peripherals without any CPU
action.
It kind of is for your µc SPI communication what DMA is for memory, it allows you to offload some work from the CPU. |
H: AC load driving using FET
I want to drive an AC 220 V load(heater) controlled PWM from Microcontroller. I want to use power FETs to load drive upto 2000 Watts. I m not guessing any valuable circuit design. If anyone have any idea to do this, please help me out... thanx for all...
AI: If anyone have any idea to do this, please help me out
You can do this with a triac and opto-couplers: -
Here's another idea using a 555 timer: -
Note that this is only good for a few hundred watts - you'd need a more powerful triac and drive interface for 2 kW. The circuit below might give you 1 kW: -
Looking around at triacs I think the BTA41 should be man enough for the job. |
H: ATSamd10 Atmel ARM programming via UART bootloader
I'm trying to collect info on how to program ATSAMD10 chip (Atmel Cortex-M0 ARM).
E.g. with LPC111x from NXP I've used gnueabi gcc toolchain to create hex-files and then uploaded them via UART using LPC21PRG or MXLI tool. It only required to drive low PIN0_0 during reset to enter bootloader programming mode.
As far as I can understand, for Atmel chips I need to use SAM-BA utility. However I could not at once find which pins help to enter bootloader mode, what minimal hardware configuration is needed etc. However as about firmware, I think the same gnueabi gcc and hex files should be ok, right?
AI: I would expect the GNU tool to do exactly what you need. It is a standard Cortex-M0, so the code generated will work. However, you will need startup code to initialise the peripherals, and library code to use the peripheral interfaces.
Atmel are pushing people to use their Atmel Studio software for upload.
AFAIK, there is no guarantee that software can be uploaded via UART on a raw (newly manufactured, unprogrammed) AT SAMD10. Looking at the AT SAMD10 datasheet there is no serial bootloader built into the chip.
So you need to load one, and flash it into the chip. This, of course, is a 'chicken and an egg' bootstrapping problem. I've done a quick web search, and haven't found a serial bootloader for the SAMD10, so their may be no serial bootloader, and you'll have to write it.
Instead of a serial (USART) botloader, you could use a hardware upload/debugger which connects over the ARM two wire SWD interface (the two pins SWDIO and SWCLK). This can program a raw AT SAMD10.
Look at the AT SAMD10 datasheet 6.2.2 "Serial Wire Debug Interface Pinout" for more details.
The SAM D10 Xplained Mini demo-board includes a hardware upload/debugger. They are under $10, so that is likely the cheapest way to get an upload system. The interface is USB.
You could buy more expensive products from Atmel, or look at OpenOCD (though I can't find SAMD10 support), or look at other hardware debuggers like Segger J-Link.
The issue is not that ARM's SWD interface is proprietary, it is the protocol from the host to the debugger which is the problem.
That will need some software to drive it. AFAICT BOSSA from Shumatech provides an Open Source alternative to the Atmel SAM-BA utility. Unlike the Atmel SAM-BA utility they say "Versions of BOSSA are available for Windows, Linux, and Mac". |
H: No plot for DC current gain in datasheet
Here is the data-sheet:
https://www.fairchildsemi.com/datasheets/2N/2N4401.pdf
I want to use a 2N4401 NPN transistor in active region for amplification, and I want to know its beta(DC current gain) value in this region. (I thought it was a fixed value).
In saturation mode there is only one beta value and it is 10. There is even a plot for that: Vcesat vs Ic plot in page 4.
But if my aim is to use this transistor for amplification, and when I look at the data sheet there are many beta values(DC current gains): two Vce values 1.0V and 2.0V.
In general, if Vce is greater than 0.2V the transistor is in amplification region isn't it? I though the beta is a constant in that region.
Mt questions are:
1-)What if Vce is a different number lets say 5V. What would be the DC gain? There's no plot about it.
2-)Is my assumption wrong about transistors which is: DC current gain(beta) is almost constant in amplification mode?
AI: Try this: -
And then there is this: -
That's a fair bit of information to find in a BJT data sheet. But, if in doubt, use a sim and get the Fairchild model of the part. |
H: Learning how to build circuits using data sheets
I'm 15 and trying to use an AD9952 DDS in my circuit. Up until now, there has been plenty of help online for the Arduino and corresponding parts. I haven't seen any schematics using the AD9952 and I don't understand the data sheet. I figure if I start with easier devices like the 555 timer, I could build my way up to using the AD9952. Is this an effective method of learning to build circuits and reading data sheets or should I learn another way?
AI: Data sheets will only take you so far. In order to understand how a chip like the AD9952 (a Direct Digital Synthesizer) works you need to know a bit about logic and signal processing as well as some analog electronics.
The basic concept is pretty simple- a number is added onto an accumulator periodically and part of that accumulator is used to index into a table that gives a sinusoidal output. The output goes to a fast DAC, so you get a steppy sine wave coming out of the push-pull current-out terminals. That can drive a transformer or a differential amplifier. External filtering (which the user has to add) makes it into a fairly nice sine wave if it's done right (and the output frequency is much lower than the frequency of addition). Designing the filter is not trivial.
One thing you can do if you really don't see how the part would be used is to seek out evaluation boards- they're designed to allow an engineer to evaluate the part so they will show other components around the part that allow it to be put through its paces. Sometimes the boards are very expensive, sometimes they are sold almost for free to try to get design-ins. In the case of this chip, the board costs $400 US from Analog. They supply Gerber files so you could have one made at a cheap proto PCB place and assemble it yourself (it won't be that cheap if it's a multilayer board, which it probably is). There are Chinese boards available for cheaper, but you should refer to the documentation on the original. Study the schematic and check out the datasheets for the other parts, taking note of anything you don't understand. See also AN-1051 for another application.
Frankly, some of this you will have trouble understanding very well without at least a few years of University level education. That doesn't mean you can't apply the chip using a canned circuit, but if anything goes wrong you'll have a tough time figuring it out.
You can get inexpensive modules based on the AD9850/51 quite cheaply and experiment with those (especially if you have some experience with Arduino or other microcontroller platforms). Some come as kits.
There is a huge step between something like a 555 and a DDS chip- the internal complexity is many orders of magnitude higher, and the 400MSPS internal frequency of the latter means that PCB layout and bypass capacitors become very important- the eval board has more than 30 bypass capacitors, usually 1 or 2 will suffice for a 555. |
H: more current needed in an electrical circuit
Currently, I'm doing my wind turbine electrical project. Let me get straight to the topic, wind turbine, with a small generator in it. Lets say it can produce 2V and less than 1A . It is connected to an inverter to increase its voltage. Now my idea is to connect the output to a load, where I will need more than 30A. Do you guys have any idea on how to make this happen?
Or not necessarily to connect it to an inverter, anything to increase the current. I have many ideas to increase the voltage.
AI: You can't cheat physics. You can convert between different voltage and current tradeoffs, but you can't make more power out than in. Power is Volts x Amps, so whatever Volts x Amps you convert to can't exceed the Volts x Amps you have coming into the converter. Actually the output will be a bit less due to inevitable loss. No converter is 100% efficient.
You have 2 V and 1 A available. (2 V)(1 A) = 2 Watts. That is your input power, which means it's also the upper limit on your output power. Let's say you make a converter that is 80% efficient. 80% of 2 W is 1.6 W, which is how much your converter can put out. That could be, for example, in the form of 10 V and 160 mA, 5 V and 320 mA, etc.
To get 30 A out, the voltage would only be (1.6 W)/(30 A) = 53 mV. In practice, such a large conversion ratio (30:1 in this case) and very low output voltage will make the converter very inefficient. You're not going to convert 2 V and 1 A to 30 A at whatever voltage with 80% efficiency.
By using storage, like a battery, you can have temporary peak output power exceed the input power. However, in the long run, you're still limited by the same laws of physics. You could, for example, make a circuit that charges a 12 V car battery from the 2 V at 1 A input. Let's say you can do that at 80% efficiency, so the current into the car battery would be (1.6 W)/(12 V) = 130 mA. If you draw 30 A from the car battery for a short time, it would take (30 A)/(130 mA) = 230 times longer to recharge the battery, and that's not taking into account the efficiency of the battery itself. For example, 30 A for 1 minute would take 3 hours 51 minutes of charging time to get back to where you were. Taking the battery efficiency into account, it's probably closer to 4½ to 5 hours in reality. |
H: How to model a DC motor in LTSpice if only its nominal voltage and max. current is known?
Is there a simple way to model a DC motor in LTSpice when controlling it with a PWM signal? Lets say the motor is 9V/2A.
I was thinking the safest way to measure the stall current and use the nominal voltage but I think there is more to handle this.
edit: Or should I say, can we model a DC motor as a resistance if we know at a particular rpm and voltage it draws known amount of current?
AI: What are you modeling it for?
Noise immunity of nearby circuitry?
PID control loop characteristics, to allow loop tuning?
Short circuit, temperature and stall current protection?
Overvoltage protection, including driving the shaft without applied power?
Or basic startup and speed control in the driver?
All of these require different simple models, or one really comprehensive model, which would be unnecessarily complicated in most scenarios..
For a simple model for a toy motor, you can ignore mechanical aspects like the inertia of the load.
I suggest running several models of increasing complexity or severity.
A simple resistance = rated voltage/rated current. Tests basic operation. Look at power dissipation in the driver, compare with your heatsink.
A simple resistance = measured winding resistance. Tests that the driver can survive a stalled motor. It's OK if it shuts down or consumes enough current to reliably blow a fuse (say >= 2x the fuse rating). Or Look at power dissipation in the driver in this worst case, compare with your heatsink.
A more complex model including back-EMF (speed-dependent voltage source) and a realistic inductance in series with the stall resistance. This tests the driver can supply enough current to start it, and overvoltage conditions from the motor's inductance. Drive the voltage source with a ramp from 0 to rated speed over a few seconds.
If it is possible to rotate the shaft while the driver is unpowered, teh motor will act as a generator. Model (3) can be used to test that the driver will survive this scenario. |
H: TimerA: How to get PWM in upMode configuration?(TI MSP432 Launchpad)
I try to use UpMode timerA configuration on MSP to get PWM with arranged Duty Cyle. So here is my code below:
#include "msp432.h"
#include "driverlib.h"
void SetConfiguation(void);
int main(void)
{
WDT_A_holdTimer();
SetConfiguation();
while(1);
}
void SetConfiguation(void)
{
Interrupt_disableMaster();
CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_24);
CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_128);
/* TimerA UpMode Configuration Parameter */
Timer_A_UpModeConfig upConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK, // SMCLK Clock SOurce
TIMER_A_CLOCKSOURCE_DIVIDER_64, // SCLK/64 = 24MHz/128/64 = 2929 Hz
24, // 50000 tick period
TIMER_A_TAIE_INTERRUPT_ENABLE, // Enable Timer interrupt
TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE , // Enable CCR0 interrupt
//TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE, // Disable CCR0 interrupt
TIMER_A_DO_CLEAR // Clear value
};
P1DIR |= BIT0;
P1OUT &= ~BIT0;
Timer_A_configureUpMode(TIMER_A0_MODULE, &upConfig);
Timer_A_CompareModeConfig compConfig =
{
//uint_fast16_t compareRegister;
TIMER_A_CAPTURECOMPARE_REGISTER_1,
//uint_fast16_t compareInterruptEnable;
TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE,
//uint_fast16_t compareOutputMode;
//TIMER_A_OUTPUTMODE_SET_RESET,
TIMER_A_OUTPUTMODE_TOGGLE_RESET,
//uint_fast16_t compareValue;
6
};
Timer_A_initCompare(TIMER_A0_MODULE, &compConfig);
//Timer_A_enableCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_0);
Timer_A_enableCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_1);
Interrupt_enableInterrupt(INT_TA0_0);
PCM_setCoreVoltageLevel(PCM_VCORE0);
PCM_setPowerState(PCM_AM_LDO_VCORE0);
Timer_A_startCounter(TIMER_A0_MODULE, TIMER_A_UP_MODE);
Interrupt_enableMaster();
}
void Port1IsrHandler(void)
{
}
void Timer_AIsrHandler(void)
{
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_0);
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_1);
Timer_A_clearInterruptFlag(TIMER_A0_MODULE);
P1OUT ^= 1;
}
In the Code, upMode works fine, interrupts work fine so I get 60 Hz what I want. But, to get PWM with arranged duty cycle, I need to use compare mode So I structed compConfig as seen on the code. However, it seems like there is no interrupt created for compare Mode. I use compare_register1 to catch interrupt but whether I put the compare interrupt enable or not result is same. It has no effect on the output. So, where am I doing wrong here? What is the correct way to achieve adjustable PWM.
AI: Problem solved. I forgot to enable INT_TA0_N interrupt which includes CCR1 to CCR7 vector. In this case CCR1 determines the duty Cycle so I just added one more Interrupt to NVIC and enabled the interrupt. New code is like this:
#include "msp432.h"
#include "driverlib.h"
void SetConfiguation(void);
int main(void)
{
WDT_A_holdTimer();
SetConfiguation();
while(1);
}
void SetConfiguation(void)
{
Interrupt_disableMaster();
CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_24);
CS_initClockSignal(CS_SMCLK, CS_DCOCLK_SELECT, CS_CLOCK_DIVIDER_128);
/*
Timer_A_UpModeConfig upConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK, // SMCLK Clock SOurce
TIMER_A_CLOCKSOURCE_DIVIDER_64, // SCLK/64 = 24MHz/128/64 = 2929 Hz
24, // 50000 tick period
TIMER_A_TAIE_INTERRUPT_ENABLE, // Enable Timer interrupt
TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE , // Enable CCR0 interrupt
//TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE, // Disable CCR0 interrupt
TIMER_A_DO_CLEAR // Clear value
};
*/
Timer_A_PWMConfig pwmConf =
{
//uint_fast16_t clockSource;
TIMER_A_CLOCKSOURCE_SMCLK,
//uint_fast16_t clockSourceDivider;
TIMER_A_CLOCKSOURCE_DIVIDER_64,
//uint_fast16_t timerPeriod;
1600,
//uint_fast16_t compareRegister;
TIMER_A_CAPTURECOMPARE_REGISTER_1,
//uint_fast16_t compareOutputMode;
TIMER_A_OUTPUTMODE_SET_RESET,
//uint_fast16_t dutyCycle;
200
};
Timer_A_generatePWM(TIMER_A0_MODULE, &pwmConf);
P1DIR |= BIT0;
P1OUT &= ~BIT0;
//Timer_A_configureUpMode(TIMER_A0_MODULE, &upConfig);
/*
Timer_A_CompareModeConfig compConfig =
{
//uint_fast16_t compareRegister;
TIMER_A_CAPTURECOMPARE_REGISTER_1,
//uint_fast16_t compareInterruptEnable;
TIMER_A_CAPTURECOMPARE_INTERRUPT_ENABLE,
//uint_fast16_t compareOutputMode;
TIMER_A_OUTPUTMODE_SET_RESET,
//TIMER_A_OUTPUTMODE_TOGGLE_RESET,
//uint_fast16_t compareValue;
6
};
*/
//Timer_A_initCompare(TIMER_A0_MODULE, &compConfig);
Timer_A_enableCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_0);
Timer_A_enableCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_1);
Interrupt_enableInterrupt(INT_TA0_0);
Interrupt_enableInterrupt(INT_TA0_N);
PCM_setCoreVoltageLevel(PCM_VCORE0);
PCM_setPowerState(PCM_AM_LDO_VCORE0);
//Timer_A_startCounter(TIMER_A0_MODULE, TIMER_A_UP_MODE);
Interrupt_enableMaster();
}
void Port1IsrHandler(void)
{
}
void Timer_AIsrHandler(void)
{
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_0);
//Timer_A_clearCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_1);
//Timer_A_clearInterruptFlag(TIMER_A0_MODULE);
P1OUT ^= 1;
}
void Timer_A_N_IsrHandler(void)
{
Timer_A_clearCaptureCompareInterrupt(TIMER_A0_MODULE, TIMER_A_CAPTURECOMPARE_REGISTER_1);
P1OUT ^= 1;
} |
H: How to avoid solder bridges between LGA-16 pads (paste applied manually)?
I made a breakout board for an LGA-16 part (LIS3DH) and two attempts at soldering failed with a solder bridge between two pads. Top view of the PCB:
The land pattern was created according to ST's recommendations in TN0018:
PCB land length = LGA solder pin length + 0.1 mm
PCB land width = LGA solder pin width + 0.1 mm
A first attempt with solder paste applied manually (with a toothpick) failed with a pair of shorted pads (the leftmost two):
I then tried a second time, with a kapton tape stencil:
But the result was pretty much the same:
The part was also lifted from the board by this bridge, resulting in adjacent joints having no contact at all.
I'm now looking for advice regarding the land pattern design and solder paste application. Maxim has a land pattern recommendation (document 90-0396) that extends the pads to the outside of the package (the package dimensions are identical as per drawing 21-0660). My guess is that those extended pads would allow excess solder paste to flow away instead of creating bridges.
I could also try to cut the kapton stencil to allow for less solder paste, or use narrower pads. I also considered taping the chip down to the pcb with a piece of kapton to avoid the lifting problem, but that wouldn't allow the part to align itself during reflow.
Soldering was done in a selfmade vapor phase oven.
AI: This should be doable without a stencil.
Using a flux pen, like TechSpray 2507-N, wipe the pads.
Using your soldering iron, carefully mound solder on the pads, being sure there are no bridges, and not too much solder.
Flux the IC and the mounded solder well.
Reflow. Once the IC and board are to reflow temperature, poke the top with a tweezer or similar to make sure everything is floating properly, it should self center at this point.
If there are bridges, it would be common for the solder to bridge to the outside, so you can remove these with desoldering braid, and reflow again if necessary.
I do similar with dspic33fj12MC202 qfn-32 parts for fixing. |
H: Type of Filter from pole-zero plot
If the zeros were on the imaginary axis, it sure would have been a NOTCH filter.
But, since the complex conjugate zeros are on the left of the jW axis,
the transfer function has second order terms in both numerator and denominator.
I tried the Bode plot of the transfer function and ended up getting a high pass filter by assuming zeros at z1,z2= -1+i , -1 -i and poles at p1= -3 and p2= -5.
But does the asymptotic approximations end up with correct results?
How can i identify the type of filter if the transfer function is not in any of the standard forms ,for example , in case of a notch filter :
edit: i agree with the fact that there are many other filters apart from the 5 basic ones,but is there any way of predicting the behavior (approximating) given any pole-zero plot like the one above.
AI: Certainly, it is not one of the classical response types - but a mixture.
To desribe the response in words:
In your pn-diagram, the two real poles have larger pole frequecies than the zero frequency of the pair of zeros. From this it can be concluded that the frequency response has, in principle, a highpass-notch behaviour. However, because the zeros have a small real part the notch depth is finite.
The corresponding transfer function contains a second-order polynominal in both, numerator and denominator. The pole Q is very low (Q<0.5) and the zero-Q is rather high. |
H: Parallel windings on a solenoid coil
Suppose I have a fixed voltage supply of 10 V and I need to get 20 amp-turns from my solenoid coil but my solenoid coil with 10 turns is 10 ohms, so I am getting 10V/10 ohms = 1A, 1A * 10 turns = 10 amp turns.
Can I take my coil and instead take the wire and cut it in half and wind both halves at the same time. So now I have two 5 turn coils in parallel, each with 5 ohms resistance. So I do the calculation and get
10V/5 ohms = 2A for each coil, 2A * 5 turns = 10 amp-turns for each coil,
So now I have 20 amp-turns total on my coil.
Therefore making my solenoid 4 times stronger?
Is this right or am I missing some fundamental law of electromagnetism?
Thank you
AI: "stronger" is not very scientific, it could mean many things. If you measure strength in Amp*Turns, your solenoid is twice as strong after the modification. If (as I understood from comments) you're considering the electromagnetic pull force which is proportional to (I * N)2, then your new solenoid is 4 times as strong.
Also, if your solenoid is small enough, its core may go into saturation before you reach maximum current. Increasing the current further in that case will have practically no effect on the pull force. |
H: Altium designiing a component with two models but not the same number of pads
I'm designing a quartz component.
I would like to use it with differents packages like those ones :
First Type at RS-Online
and
Second Type at Farnell
One of them has 2 pads, the other has the same 2 pads and 2 ground pads.
I designed a schematic with 3 pads among them a power pad which is connected
to GND and invisible.
This works pretty well for the 4 pads package but for the 2 pads package,
when I compile, I get an error "Could not find port 'GND' on model 'QUARTZ_32x15' for pin 'GND'".
Obviously, that's right because there's not any ground pin on the 2 pads package.
So, is there a way to acheive this with something like saying that a pin may
be optionnal or something like this? Or should I build one schematic
for each package?
AI: Definitely build two schematic symbols in this case (just copy and modify one to add the two GND pins- I would definitely make both GND pins visible so you can see where they are connected on the schematic). They really are quite different components from a footprint point of view. |
H: A confusion on the current gain of an NPN transistor
In above screenshot V2 is increasing ramp voltage from 0 to 12V, which accordingly increases Ib. Transistor is an NPN type.
Ic(q1) is the collector current.
Vce = V1 is a constant 1V.
So it means Im keeping Vce constant and only increasing Ib.
Many tutorials say in amplification region Ib/Ic is constant and called beta i.e. hfe.
But the blue plot which is Ic/Ib is very different than what I expect.
What is wrong?
edit: Here is after I decreased the base current with FakeMoustache's suggestions:
AI: Over a substantial range of Ib (corresponding to V2=1.5 to 10V or Ib around 0.1 to 1.0 mA) you show that hFE for this transistor model varies only between 180 and 205. That is close enough to constant for many applications, especially in the context of all the other conditions that cause hFE to vary.
So some introductory texts may simplify their treatment of a transistor by pretending it is actually constant, in order to teach other things (aka small-signal analysis). A good text will return to this issue later on and explore the actual behaviour in more depth.
The linked article (from comments above) makes this statement without any such qualification. However it is on a webpage which also contains this utter howler. In my estimation, such a page is actually worth LESS than you paid to read it! |
H: Verilog and break statements is there a possible alternative?
So I am currently facing an issue where break; statements aren't allowed in verilog? Is there an alternative to this? I've tried disable block_to_disable, but that did not solve anything. Is there possibly an easy fix or is Verilog unable to do this? I only ask since Verilog is a derivation of C. Thank you for your time and help.
module prj2(input [2:0] usr, input button, output reg [6:0] stage);
//input button
reg currentState = 0;
reg tracker = 0;
reg stage_0 = 0;
reg stage_1 = 1;
reg stage_2 = 2;
reg stage_3 = 3;
reg stage_4 = 4;
reg winner = 5;
/*stage is read in binary
stage 0 = 1
stage 1 = 2
stage 2 = 4
stage 3 = 8
stage 4 = 16
stage win[5] = 32 NO STAGE WIN
*/
/*r/p/s is read in binary
0: rock = 1
1: scissors = 2
2: paper = 4
*/
always @ (button) //start of the action section
begin
case(currentState)//draw and loss are the same
/*=======================================================================================*/
0://using scissors
if(usr == 1)
begin //beat scissors so use rock
tracker <= stage_1;
currentState <= stage_1; //moved to state 1
stage <= 2; //stage_1
//disable block_to_disable;
end
else begin//don't move
tracker <= stage_0;
currentState <= stage_0; //stay in same state
stage <= 1; //stage_0
//disable block_to_disable;
end
/*=======================================================================================*/
1://using rock
if(usr == 4) begin//beat rock so use paper
tracker <= stage_2;
currentState <= stage_2; //moved to state 2
stage <= 4; //stage_2
//disable block_to_disable;
end
else begin //move back to state 1
tracker <= stage_0;
currentState <= stage_0; //go back to previous state
stage <= 1; //stage_0
//disable block_to_disable;
end
//break;
/*=======================================================================================*/
endcase //end case
end //end begin that comes after always()
endmodule //end the actual module
AI: Verilog is a HDL, not a procedural language. It is not in any way a derivation of C, it just has a vaguely similar syntax, but then so does Java.
Hardware description languages are just that, they are used to describe hardware - what logic circuit, registers, RAMs, etc - if-else statements for example represent multiplexers in digital logic. This is completely different from a procedural language where lines of code are executed on a CPU in turn where you can jump from one bit of code to another (break, goto, if-else).
"Break" statements don't make sense in HDL, because there is nothing to break out from - how would you jump out of a flip-flop? Unless you are meaning 'break' as in asking the FPGA to catch fire or something (which would definitely break it!).
I get the impression you are used to programming in a procedural language and are new to HDL. I would suggest that you go and research/learn the implications of a HDL - there are many tutorials out there e.g. Google "Verilog in one day". You need to understand that the code is not executed, but rather infers logic gates and flip flops (amongst other things). Understanding how HDL is synthesized to an RTL circuit is very important to being able to program with HDL languages.
For a case statement, you don't need a break statement, you would simply do:
case (something)
value: begin
//do something while "something==value"
end
othervalue: begin
//do something while "something==othervalue"
end
default: begin
//do something while "something" is none of the above
end
endcase
Furthermore, your code doesn't make any sense - nor do some of your comments.
always @ (button) //start of the action section
That basically says implement the following block as combinational logic where the only input is a signal named "button". Yet you have lots of other inputs, so it makes no sense.
Now if you had:
always @ (posedge button)
it would infer a flip-flop whose clock is the "button" signal. The hardware inferred by the case statement would be triggered on the rising edge of the button signal. In reality this would be some combinational logic (which would always be being calculated as its a set of lookup tables), the output of which is latched on to one or more flip flops at the rising edge of the button signal
This is yet another example of an X-Y problem - you are telling us what you think the solution is (Y) rather than telling us what you are actually trying to do (X). |
H: Voltage Drop Across Diode in Off State
I was reading this sparkfun article to learn more about how transistors work, but I am confused by one of their diagrams. Here it is:
If there is no current flowing, why is there a 1.3V drop across the LED? I looked at the VI characteristic graph for LEDs and it should be 0v when I=0, which is the case here. I think I am missing something, can someone point out exactly what?
Thanks!
AI: They are probably trying to show you the voltage the LED would drop when some current is going thru it. I agree that is inconsistent with how they are showing the voltages across other components. In reality, the LED will have very close to 0 V across it when the transistor is off. The only current will be the transistor leakage, which quite small.
There is a case where what they show could actually be true. LEDs also work as photocells in reverse, although rather poorly. With no load on it and in reasonable light, the LED will develop a voltage close to its normal forward operating voltage. However, the impedance of that will be so high that even a ordinary voltmeter can load it. Whoever made that diagram may have probed around the circuit with a voltmeter, and at that illumination and that voltmeter, that's what was reported across the LED. Whatever part of the supply voltage that doesn't appear across the LED would then be across the transistors, since no current is flowing.
Another possibility is that when they probed across the transistor with a voltmeter, the meter caused enough current to flow for the LED to develop 1.3 V across it, so the meter read 3.7 V. They then subtracted 5 V from 3.7 V to say the LED had 1.3 V across it. If the LED was measured directly, it would have less voltage across it. |
H: Why should you use two resistors in parallel on an LED?
So I was looking over the Arduino R3 schematics and noticed this little design choice:
What is the reason for doing something like this? I mean it's hard to know what the designers were thinking, but maybe it was done this way to save space. Do you get any other benefits?
AI: Don't look to the arduino designs as examples of stellar electrical engineering.
However, there can be a legitimate case for doing this. This part contains 4 resistors. If it was already there for another reason, especially if several more of them are used on the same board, then using two of the resistors that would otherwise go unused in parallel to make a 500 Ω resistor is a reasonable thing to do.
It can often save more money overall to use fewer different parts, than a smaller number of total parts but more different ones. For cheap parts like resistors, the dominant cost is not the price of the part, but the cost of purchasing, stocking, setting up the pick and place machine, etc. |
H: Can I2C work without pull up resistor?
I'm working with nrf51 board, I'm using I2C to communicate with an accelerometer (see the scheme), the communications are successful but I dont see any pull up resistors in the lines SDA and SCL.
could I2C work without pull-up resistors or is the scheme wrong or does the accelerometer has internal pull up on lines SDA and SCL
AI: Real IIC requires pullup resistors. Many microcontrollers have optional internal pullup resistors on some pins. If there is a micro on the bus, and that's usually the case, then it could be switching its pins between pullup and active low.
The pullups in a micro are usually higher resistance than what you'd use for IIC, but for a short bus all on one board when you know the bit rate is low enough, this can be a legitimate thing to do. I've done it. |
H: Possible to identify burnt component and its value?
The device is a Banana Pi M3, I accidentally short it out when I was playing around with my multimeter on the GPIO pins.... A noticeable spark came from that component in the above picture circled in red. Hopefully, only that component got burnt and nothing else, so I can replace it.
At first I thought it was a resistor or a capacitor, but I was wrong, I think. I'm guessing it's an SMD ferrite bead judging from the manufacturer's schematics. Schematics. I think it's the third page labelled PMIC where it shows an USB connector along with a DC in symbol.
Problem is, the values aren't labelled in the schematics, so I won't know what ferrite bead to order, the only thing I can tell from looking at it is that it's a 0603.
I have this multimeter: "INNOVA 3320 Auto-Ranging Digital Multimeter," from Amazon (Sorry, I can't post more than 2 links), if that helps. I don't mind buying new equipment, this is a learning experience type thing for me. Thanks.
Edit: Just a little detail as to how this happened. When I was playing with my multimeter, I put the negative probe to GPIO pin 2 and the positive probe to GPIO pin 6, I accidentally moved the positive probe around making it touch either pin 5 or pin 8 or both while still touching pin 6. The GPIO layout is the same as Raspberry Pi Model B+, or at least that's what the makers said.
AI: My supposition:
It is a ferrite bead, and it is being used, along with the capacitor next to it, as a small filter on the power supply.
It is a 'non critical' component and only really has any affect when you're using a noisy power supply.
You should be able to replace it with pretty much any 0603 ferrite bead. Lower DC resistance is better as it reduces the voltage drop across it.
You could even replace it with a blob of solder to get it working again. |
H: Why are reed switches made in glass tubes?
Why are reed switches made in glass tubes?
Reed switches sense magnetic fields, and glass is not the only material not affected by a magnetic field. They can use plastic for example. Why are most of them in glass?
This question came into my mind when one of them easily cracked and then broke. It could have been in a plastic tube; then it wouldn't have broken.
Also, plastic would be cheaper than glass, and easier to melt and form.
AI: Glass is clean, dimensionally stable and very strong, doesn't outgas at the operating pressures in the interior of the capsule, won't react with the fill gas in the capsule, and doesn't soften under soldering temperatures.
Here's a beautiful link. |
H: opamp instead LDO
I have very tough requirements on noise (sub mV, no 50Hz allowed) and LDO seem to fail in that. The required current is like 20-40mA, so i am thinking about using opamp with reference voltage.
Is there any showstopper for that? Maybe, somebody did it before?
AI: The main gotcha is that op-amp stability with capacitive load is often dubious at best- if you do this you can add extra compensation or use a special op-amp that is guaranteed stable with nF of capacitive load. Connecting an ordinary op-amp voltage follower to a reference will typically result in oscillation when the bypass capacitors are added to the output, and op-amps have pretty high output resistance at high frequencies (tens of ohms) so you usually need bypass capacitors.
We never have a problem with 50Hz noise here, but 60Hz (or 120Hz) can be a possibility.
Personally, I don't think you should do that, there are LDOs available with a few uV of noise (eg. LP5907). If you don't like the 90dB PSRR at 100Hz, add another regulator in front of it (doesn't have to be a great one) and it should be undetectable, if your layout is good. If uV of noise is too much, then add some passive filtering afterwards or, as GH says, a capacitive multiplier. |
H: MCU push button triggered by electrostatic discharges
In a simple project based on an STM32 microcontroller, I needed a couple of extra push buttons. So I connected each button between a pin on the STM32 and GND, configured the pins as input and activated the internal pull-up resistors.
It seemed to work well at first. Pushing the button pulls the pin to GND and triggers an interrupt. But a problem soon became apparent, which was that the setup was extremely sensitive to nearby electrostatic discharges. If I touched a piece of metal several feet away, it would cause the interrupts to trigger.
The STM32 is on a Discovery demo board which has a push button on it. That button does not have the issue, so I looked up the schematic (included below).
So there are 3 resistors, a cap and connections both to VCC and GND (and maybe the internal pull-up is used as well).
Will I need to add all that for my push buttons to be reliable? If not, which circuit do I need? What is the reason that the internal pull-up resistor is not enough for filtering out noise from nearby electrostatic discharges?
Update 1:
I have verified that the internal pull-up resistors are active. If I disable them, the buttons trigger randomly every few seconds. To activate the pull-ups, I use:
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
And to disable them:
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
Update 2:
I changed my push button circuit to match the schematic (with R20 and C22 removed, R22 replaced with wire) and disabled the internal pull-up. It did not change the sensitivity to electrostatic discharges.
Update 3:
Turns out that I was using the schematic for the wrong Discovery board. I've included the correct one below. This new one does have all the components fitted and the circuit is very likely to resolve the random triggering issues.
AI: It sounds like the internal pull-up resistor isn't working. It's possible the code has accumulated a bug, or maybe the pull-up has got damaged.
Try an external pull-up resistor.
The Discovery board button schematic shows:
R22 is 0Ω, and so isn't doing anything
R21 is a pull-down, instead of a pull-up, so it is necessary
C22 capacitor as "N/A", which on ST's schematics often means the part
isn't fitted.
R20 - if C22 isn't fitted, then it does nothing.
So, one resistor + switch is equivalent.
Edit:
Noise, triggering the other, unused pins which have no defined state might be an explanation for relatively frequent and random triggering.
Looking at your picture of the project at github, I see that there is main power nearby. Noise may come from that path.
In general it is a good practice to ensure all unused pins are in a known state anyway. Pins might otherwise trigger, or even go into a 'mid-state' where one, or even both of the complementary MOSFET transistors conduct in the 'analogue' region, causing excessive heat.
You don't say what the main-loads are, but they may make ensuring pin stability, by excluding noise, even harder.
Set unused pins, which are not already wired to ground or power, to a known state using the internal pull-down or pull-up resistors. Leave them as inputs. Be careful to not do this for pins already tied to signals, ground or power.
You might start with any unused pins which trigger the same interrupt as you are using.
(You might also consider handling different pin-interrupts just to see if it is affecting more of the MCU. For example you might set an LED if any of the unused pins trigger. This isn't a fix, but is only to help an investigation or analysis.)
Try to ensure this deliberate pin-setting is highlighted/documented so that future changes to the system will not cause any pin to get into conflict with these pull-up/down settings.
Also ...
It might also be worth a test where the solenoid-board, and mains power, is completely removed from the vicinity of the Discovery board, on the small chance that noise is coming via that board. For example, there may be a ground loop. |
H: LM317 lower voltage limiting
Let's say I want output voltage from LM317 in range from 8V to 15V. What circuit do I need to built?
I understand perfectly how to set upper voltage range (1 x resistor + 1 x pot), but how do I set the lower point at the same time?
AI: Assuming you want to set the minimum/maximum voltage range of the external potentiometer, you just use two extra resistors. If you mean something else you'll need to clarify what it is you really want.
simulate this circuit – Schematic created using CircuitLab
The LM317 will change \$V_{out}\$ such that \$V_{adj} = 1.25V\$. This configuration has the relationship (ignoring adjust pin current)
\begin{gather}
V_{out} = \frac{V_{adj}}{R_{1}^{-} + R_3} (R_2 + R_1 + R_3)
\end{gather}
where \$R_{1}^-\$ denotes the "lower" portion of the potentiometer. At the maximum stop, \$R_{1}^- = 0\$, so
\begin{gather}
V_{out,max} = \frac{V_{adj}}{R_3} (R_2 + R_1 + R_3)
\end{gather}
At the minimum stop, \$R_{1}^- = R_1\$, so
\begin{gather}
V_{out,min} = \frac{V_{adj}}{R_3+R_1} (R_2 + R_1 + R_3)
\end{gather}
This gives 2 equations with three unknowns, and the easiest way to solve this is to pick an arbitrary value for one of the resistors. For example, say you fix \$R_1\$. Then you get (assuming my algebra is correct)
\begin{gather}
R_3 = \frac{R_1 V_{out,min}}{V_{out,max}-V_{out,min}}\\
R_2 = \left(\frac{V_{out,max}}{V_{adj}}-1\right) R_3 -R_1
\end{gather}
As long as \$R_1\$ isn't too big (say, less than 10k) or you have some leeway in the min/max limits, you can ignore the adjust pin current (as I've done for my analysis). If \$R_1\$ is very big or you need very precise bounds (not sure why you would need this), then you'll need to account for it in calculating the resistor values but the same design should work.
Note that I'm glossing over a few details of how to properly use the LM317 (for example, I'm not including decoupling caps). See the LM317's datasheet for more information. |
H: Why is charge the same on every capacitor in series?
Why is the amount of charge on every capacitor in series equal, regardless that capacitance values of capacitors are not the same? What really happens here so they are the same?
simulate this circuit – Schematic created using CircuitLab
AI: Charge cannot be created or destroyed. Since you only have one possible current path through all the capacitors (and current is just flowing charge) the charge on all 3 capacitors has to be the same. The capacitance of the capacitor indicates how much voltage a particular amount of charge corresponds to Q/C = V. Put more charge into a cap, get a bigger voltage difference. Put the same charge in a smaller cap, get a bigger voltage difference. So what happens in your circuit is that the charge is distributed evenly, but the applied voltage is distributed according to the capacitor sizes, with the smallest cap ending up with the largest fraction of the applied voltage. |
H: Help With a Switch
I am trying to replace a broken switch that controls the rolling up and down of a window on my car. I have the control module out, it looks like this:
The "auto" switch connection on rolling up has been broken. I know this because it rolls down fine, and when I press the switch up and short the switch terminals, the window rolls up.
Anyway, I was trying to replace the switch with an on-off-on DPDT switch, but I realized that the original switch isn't wired that way. Here is my drawing of the original switch connections.
So as you can see, it acts more like two ON-ON switches than one On-OFF-ON. My question: Is there a way to manipulate the wiring on a normal switch to get this behavior while still using the one switch, or is there a switch that has this behavior that I don't know about?
I was thinking about alternate solutions. I might be able to make it work with two On-On switches, but it would be a bit confusing to work with if someone didn't know how to operate the window. Thoughts?
Thanks for any help, I really appreciate it!
AI: This isn't a complete answer because I don't know what switches are available to you but the original is probably wired as sketched below.
simulate this circuit – Schematic created using CircuitLab
Switch and motor circuit. (When will CircuitLab give us a motor symbol?)
Motor direction depends on which contact is actuated.
You could use two SPDT switches to achieve the same thing. |
H: Verifying a Meier Crossfeed Build
I've built a "Bass Enhanced Crossfeed" from a kit, which I believe is based on Meier's Crossfeed design.
I prototyped it first on a breadboard, forgot to ground the output jack because it wasn't explicitly in the diagram. It sounded terrible. After I grounded, it seemed to sound pretty good! So I built the 'hi' version.
Now that I've built it, the low range just seems very subdued compared to my previous test. I suspect I didn't solder it correctly, though I've looked over it with a magnifying glass.
So, how can I verify the build without an oscilloscope and just a multimeter?
I've done some checking, like checking for shorts between left and right ... where are the useful points to check for the right value of resistance? Between R/Lin and R/Lout? Should that be R9/7? Should I check the resistance between each leg of each capacitor?
Probably overkill, but could I put this into a simulator and see what the simulated values would be vs. actual?
Apologies.. I'm a software guy. I'd write unit tests if I could!
AI: The resistance between Rin and Lin will be R5 + R6 + R7 + R9
The resistance between Rout and Lout will be R5 + R6
The resistance between either input and its output will be R7 or R9 (which I'd expect to be the same) |
H: What trace length is considered short in case of buck voltage regulator
I'm working on LM2596 based voltage regulator circuit that will be printed on PCB.
According to LM2596 datasheet some traces should be kept as short as possible. However no numbers are given.
This is my design (with ground plane hidden), from left to right:
LM2596S voltage regulator
SS54 Diode
12.5mm 100uH Inductor
2x Low impedance 300uF capacitor
First attempt:
I'm a little bit worried about C In (capacitor on the right between input voltage and ground) connection with regulator. The trace length is about 35mm.
Next attempt:
AI: Grouping of the LM2596, catch diode, inductor, and Cout aren't too bad. But, Cin is too far from the LM2596 (as you were worried).
With a buck, there are two main signals that need to be minimized:
The current loop from Cin through the LM2596 and catch diode needs to be as short as possible. This is a pulsed current, most likely the highest current, and richest in harmonics on the board.
The switching node: pin 2 of LM2596 and it's connection to the inductor and catch diode, also needs to be minimal. This voltage signal is very rich in harmonics, and is the primary source of common mode noise.
The easiest way to minimize the input current loop is probably to take the LM2596, catch diode, and Cout as a group and rotate them 180 degrees. This will allow Cin to be much closer to the LM2596.
Minimizing the switching node could be done by rotating the inductor by 90 degrees, ending with the inductor input very close to the cathode of the catch diode.
Currents through the inductor and out to the load aren't such a concern. It's mostly DC with some ripple current (contained by Cout), and not that harmonically rich.
Additionally, it will be desirable to have some input filter inductance to reduce EMI for the rest of your system. Probably a common mode choke, which if you choose well will have enough leakage inductance to also use differentially. (You may already have this, but couldn't see any in the board section shown) |
H: Can someone explain part of this wiring diagram to me?
In the 208/220v diagrams for 2 pole 3 wire outlets here(http://www.automationdirect.com/static/specs/wiringdevicesnemawiring.pdf) there have an arrow between the two wires that bring in 120v each and label the arrow 250 (or 208) volts. Are they just saying that there is 250v supplied total by these two legs, or that there is 250v between these legs?
I think it is saying that there is 250v supplied total, as I think there's 0v between the legs, unless the outlet is doing something like switching polarity?
Thus reason I am unsure is because the diagrams for 125v use the same arrow to show that there is a 125v difference between the hot wire and ground, so if they are not using the symbol in two different ways then the 250v diagram says that there is 250v between the two legs that have 125v each, which I don't see how that happens unless there is a built in Op amp or something...
Thanks.
AI: The 208/250V is supplied by two phases of a split-phase (250V) or three-phase (208V) utility connection. Ground is not involved in the pair. |
H: How many turns do I need for the primary coil of a transformer?
I need to know the number of turns that should be connected to 220 volts AC.
I can measure resistance only, I don't have a device that measures inductance.
If I need the primary coil to be 220V / 1A (For example). Can I omit the inductance and turn (wound) the coil so that it has 220 ohm of resistance only? Does that make a major difference in the current?
If I can not do that, How can I know the number of turns without knowing the inductance?
Thank you very much,
AI: You have to consider that the primary (on its own with no secondary current) is just an inductor and you don't want this to be taking 10 amps sat there doing nothing else. So what primary inductance do you need?
Try 1 henry - it has an impedance at 50 Hz of \$2\pi fL\$ = 314 ohms and will take a reactive current of 700 mA (RMS) from a 220 V AC supply. Too much?
Quite possibly so maybe aim for 10 henries and the current drops to 70 mA.
Somewhere in this region will be the optimum but you cannot know this until you have calculated how many turns produce so-many henries. To do this you need to know the \$A_L\$ of the core. It's normally specified in \$\mu H/turn^2\$ and a typical figure for silicon steel laminate might be about 10 \$\mu H/turn^2\$.
Basically 1000 turns gets you 10 henries and 316 turns gets you 1 henry.
On core saturation, with 1000 turns and 70 mA, the ampere turns (magneto motive force or MMF) is 70. With 316 turns and 700 mA, MMF is 221 and this scenario is much more likely to saturate the core but, without knowing the core dimensions nor having a BH graph it is difficult to predict.
Can I omit the inductance and turn (wound) the coil so that it has 220
ohm of resistance only?
Don't be silly - resistance isn't going to help here.
Here's a useful and general "slide" taken from the Ferroxcube soft ferrite handbook: - |
H: Different bus representations on schematics?
Here is an excerpt from a sample "data flow" diagram:
Now both lines in both circles represent buses but in #2, there is no bus arrow that goes to the IC.
What is the difference between them? Does #2 means that this IC never reads from that bus but only outputs to it, whereas #1 means this IC both reads from and writes to this bus?
If that's the case, what about if we wanted to represent: "This IC only reads from that bus but never outputs to it." How would we represent that?
AI: Number 2 is an output bus and number 1 is an input bus - look at the device in between these buses - it's a data buffer - data goes in one end and comes out the other.
If that's the case, what about if we wanted to represent: "This IC
only reads from that bus but never outputs to it." How would we
represent that?
There will just be a bus with an arrow pointing into the chip. |
H: input current vs output current
My old/new laptop adapter specs as given below. I understand the output current for new is 4.5A which is OK when compared to old which provides 3.25A load since it can provide more load.
However, just cant seem to find any idea about input Ampere i.e 1.2A max vs 1.5A(1.5A) I am left with below questions.
Does max in 1.2Amax mean anything.
does the bracket (1,5A) mean anything.
is the new adpater usable inplace of the old
NEW -
90W 20V
AC INPUT 100-240VAC 1.2A max
DC OUPUT 20V / 4.5A
OLD -
65W 20V
AC INPUT 100-240VAC 1.5A(1,5A)
DC OUPUT 20V / 3.25A(3,25A)
I think one of the questions regarding brackets probably might just be dot vs comma notation
3.25A(3,25A)
AI: It probably means the new device is power factor corrected - it says it will not take more than 1.2 A and this compares favourably with the previous device that says it can take up to 1.5 A.
The previous device might not have PF correction circuits although this is a little speculative to say so. |
H: Operating a MOSFET as a switch: A strange dip occurs on the drain voltage
[POST IS EDITED]
I'm trying to debug a circuit shown in Fig. 1.
The gate of the FET is driven with a square wave 0...3 volts. The voltage source V1 = 3.3V. The circuit is built to control the voltage presented to the non-inverting input of an operational amplifier. R2 and R3 are trimmers, so the two input voltages can be trimmed to different values if needed.
Driving the FET with a square wave I notice a rather odd behaviour. The voltage between R1 and R2 are shown in Fig. 2 as a function of time (green). The voltage of Vgs is drawn blue.
As can be seen, the voltage v+ first dips to a negative value and then rises slowly to the steady state value. When the voltage v+ should drop to the lower value (vgs = 3 V) it first overshoots after going down to the steady state. The simulation and oscilloscope measurements agree together.
What could be causing this, and how can i get the voltage between R1 and R2 (green waveform) to be as closes as a square wave as possible. Fet in use is Si2318CDS. Datasheet provided in the comment. I have tried higher Vgs amplitudes han 3V.
AI: There is capacitance from the gate to the drain. Normally (as in a power switch) this is more of a concern for the gate drive (especially when the drain voltage is changing a lot and fighting the gate drive), but the capacitance also couples changes in the gate voltage to the drain.
In this case you have 270mV on the drain when it is off, and ~0mV when it is on and the gate drive is more than 10x higher (3V).
There are a variety of techniques to reduce this- a smaller MOSFET will help because it has less capacitance, but you will pay in terms of Rds(on). Another approach is to balance off the injected charge by another transistor driven with something like the opposite waveform. You can find multiple patents describing these techniques.
Good commercial analog switches can have charge injection in the 1pJ range, which sounds low, but it's actually still a problem in some cases.
Edit: From your waveforms you can see two time constants. From the MOSFET datasheet, page 3, "Capacitance" shows the output and reverse transfer capacitances vs. Vds. They increase sharply for low (or, by extrapolation) slightly negative Vds. For large negative Vds the body diode will start to conduct significantly so these waveforms will not scale- if you increase the drive voltage to 10V you will see a change in the shape.
You might want to look at this answer from Andy and (upvote if it is helpful, of course). |
H: The speed of a synchronous motor is determined by frequency, but how about current?
The speed of a permanent magnet synchronous motor is determined by \$ n = \frac {120f}{p}\$, where f is frequency, n is speed in rpm and p is number of poles.
p is fixed in a motor so changing the frequency changes the speed.
If I have a 4 pole motor and I set the frequency to 50Hz I get 1500rpm.
Does this mean the amplitude of the current does not matter at all?
I know that torque is determined by current and flux per pole but my question is merely about the speed of the motor.
AI: Clearly you have to apply power to the motor and you have to apply enough supply voltage to overcome motor losses. Once you do that the motor works synchronously off-load but when mechanical load is applied to the shaft there has to be enough current in the source to be able to supply mechanical power and still overcome the losses in the motor.
As a footnote, synchronous speed means exactly that but as a mechanical load increases, the rotating shaft "slips" a small angle to accommodate that change in load and draw more current. |
H: Sharing a pushbutton with multiple boards
I would like to have several identical boards (arduinos) each with its own power supply, and daisy chained with some wiring, each board being able to receive a signal to an input pin when a pushbutton is pressed.
My problem is that I would like to have a single pushbutton that raise the signal on all the boards at once. I understand the ground need to be common between all the boards voltage, but what about the +5V that the button will provide as a signal, can all the boards +5V be connected together as well? And the button would just provide that to all the input pins?
I have no clue how to connect that properly. Thanks!
AI: I'm assuming that all boards will be supplied with, for example 9 V, and that each board will have it's own 5V regulator. Then no, you should not connect the 5V supplies because they will not all be exactly 5.00000V There will be one regulator supplying the highest voltage (even of that is 5.01V) and it will take all the load while the other regulators just sit there and do nothing ! (they will think, oh 5.01V is too high, I'll wait untill the voltage goes below 5.005 before I do anything).
But you don't need to connect the 5 V rails together. Since your Arduino's are running on 5 V, anything above 2.5 V is considered a "1". So I would just connect all the inputs of all boards together and connect that to ground with a 10 kohm resistor. Then connect the switch between all those inputs and one of the 5 V supplies on one of the boards. It does not matter which one. To be really safe that no excess current can flow you could place a 1 kohm resistor in series with the switch but this is optional.
Additional note: this assumes all the boards are always powered ON. If one of them is OFF and you press the switch the 5V will provide current through the ESD protection diodes at the input of the microcontroller, raising it's supply. Usually no damage will be done in this situation but if you want a more elegant solution then place a 100 kohm resistor in series with the input of each arduino. That will solve this issue. |
H: What is vector potential in magnetic field?
The vector potential in magnetic field (represented by A), what does that physically mean? I have serious problem in understanding it intuitively.
$$\nabla^2\text{A} = -\mu_0 \text{j}$$
I read that the above equation can be derived using continuity equation. Can it be derived? if possible how? Thank you.
AI: The short answer is the vector potential is such that the curl of it gives the B field. (Taking a curl is often easier than integrating.) There is also a fascinating quantum mechanical effect, such that the vector potential leads to a phase change of particles. I went looking on line and it's hard to beat the Feynman lectures. Enjoy! |
H: Possible to use a voltage level shift IC for Arduino and external IC?
One of my projects require a 3.3V supply.
Its an audio codec, TIs AIC3254, to be interfaced with Arduino Uno.
The codec requires almost 300mA of current, so was thinking of using a level shifter connected to the 5V output of the Arduino board, which can supply 400mA, instead of using an external supply with LDO.
Can the Arduino 5V output be used efficiently with level shifter? Or external supply is the best option?
Thanks.
PS - Codec schem
Ignore the USB part
AI: No, a typical level shifter can not be used as a voltage regulator to supply 300 mA of power. They are intended to be used for signals and will likely only source a few mA at best.
You do not need an external power supply, you can use a LDO Linear Voltage Regulator with the Arduino 5V source as the input. |
H: What kind of oscilloscopes are qualified for measuring USB 3 Super Speed Signals?
I understand that they probably will be very expensive. But I have little idea of what kind would qualify. How much bandwidth? At what sampling rate? Any other parameters?
AI: USB 3.0 runs the extra lanes at 5Gbps, which equates to a clock of 2.5GHz. So you will probably need at least 3GHz bandwidth, at an absolute minimum. Quite pricey! To see anything clearly, you'll want even more bandwidth as the signals have multiple harmonics - you would need at least the 3rd at 7.5GHz and preferably the 5th harmonic at 12.5GHz to see anything even remotely square.
But the thing that people forget is, a scope is only as good as the probes that it connects to. So not only do you need a scope with enough bandwidth, but also a probe which has the bandwidth too. The signals are also differential, so a differential probe is likely to be required.
At high frequencies like USB 3.0 runs at, electrical signals in wires are basically EM waves trapped in a waveguide (the cable). These signals are incredibly sensitive to impedance mismatches, so sticking any old probe with a long cable on it is just going to distort the signals.
You would need a probe which has very low capacitance and connected to the signals with as short of a run of extra cable as possible. Keeping the cable short essentially calls for an active differential probe. Expect such a probe to be in the region of $7k+ just on its own! |
H: Nested I2C multiplexers
I want to provide 12 actuators from a microcontroller (Particle Core) over I2C. The problem is that the drivers for the actuators have all the same I2C addresses. So I'am considering to use I2C multiplexers. However I only have found a 1 to 8 channel I2C multiplexer like the TCA9548A from Texas Instruments. The idea now is that I have 1 multiplexer connected directly to the microcontroller. This multiplexer is connected to 3 further multiplexers and each of them is connected to 4 actuator drivers.
My question now is, if it is possible to nest such I2C multiplexers?
Thanks in advance!
AI: In terms of your question directly, yes it should be possible to stack the multiplexers, as long as each layer of mux has a different address from the previous layer. For example, if you stack two multiplexers deep in the following sort of arrangement:
L1 L2
/|---
/|---|B|
| | \|---
---|A|
| | /|---
\|---|C|
\|---
Then the multiplexers are L1 would have one address to control these select lines, and then the multiplexers at L2 need an address different to that of L1. A could have an address of 0x10 and both B and C could share the same address of 0x12 for example.
For this to work, you would first send a packet to mux A to select which of the second level muxes you want to talk to. Then you would send a packet to either B or C to select which device to talk to. Then you could send packets to your device. This could take up to 40 or more I2C bit periods before you could talk to one of the devices. The deeper you stack them, the higher the overhead.
While not directly answering the question of whether mutliplexers can be stacked, there are alternatives. There is a related question here which is about I2C address conflicts. @user3608541 points out in his answer that there exist ICs which can perform address translation. Specifically he gives an example of the LTC4316.
To expand on that answer, these ICs perform address translation on-the-fly. Essentially they connect in line between the I2C master and slave devices and monitor communication between the two. When a start bit is sent, the following byte is always the address of the device. The address translation IC monitors for the start bit, and once detected will make modifications to the address as it goes through. In the case of the LTC4316, the modifications are simple addition - the master sends one address, and the slave receives the packet but with the address having had some constant factor added on to it. The rest of the packet goes through unmodified.
The net result of this is if you have many copies of the same fixed-address device, you can place each one behind an address translation IC, and configure the ICs to add on different factors. For example, the first one adds on 1, the second adds on 2 and so on. This would mean that to contact the first slave, the master would have to talk to its address minus 1. To talk to the second slave the master would have to minus 2. This gives each one a unique address.
Now whether these ICs are cheaper than multiplexers, I don't know (a quick DigiKey search shows them at $3 each for low quantity), but they have a distinct advantage in that you don't have the extra overhead of time spent selecting the correct output of the multiplexer. |
H: What electronic component can interrupt a powered circuit?
I have an IoT project in which I want to leverage existing bicycle LED lights, which have their own battery power. So, rather than using the current from the microprocessor to power the lights, I just need a way to wire my logic board to the bike light and control the on/off of the light.
I don't have an electronics background, so this might be a very elementary question. Is there an inexpensive electronics component that I can somehow wire or solder onto the bike light that can be controlled by another low-voltage circuit?
The ideal component would be able to switch rapidly on and off, preferably without sound / mechanical parts. I'm envisioning wanting to strobe the lights quite rapidly, again, controlled by the logic board.
If there are more than one kind of component, which might be the best for a small, DIY wearables project? IE: low-cost, easy to hook up, easy to source.
AI: Relay:
simulate this circuit – Schematic created using CircuitLab
Advantages: simple, very well isolated, very little loss of power in load
Disadvantages: relatively slow (perhaps 10s of Hz), needs a fair amount of control current
(typically more than logic circuits can supply)
Transistor (BJT shown):
simulate this circuit
Advantages: fast (easily up to Mhz), very small control current (typically < 1/50th of load current) required.
Disadvantages: No isolation, voltage loss across transistor switch, may be harder to wire up. Can't control AC circuits.
Relatively low controlled output voltage - depends on transistor, can get >100, but typically less than 30V |
H: What does an MCU need to be capable of USB 3.0 communication?
USB 3.0 has been around for quite some time, since it was released in 2008. But you don't see any simple microcontrollers with an internal peripheral that can do USB 3.0.
The Atmega32u4, a simple 8-bit AVR, has an embedded USB2.0 phy inside and only runs at 16MHz, as such it is obviously too slow to do USB3.0. Although there are Cortex-M controllers running at over 200MHz that don't have a USB3.0 peripheral! At this point, I feel like the clock for the MCU no longer matters. The lowest end processor I can find that does USB 3.0 is TIs Keystone MPU with an ARM-A15
Is it just taking a considerable amount of time to create the IP for lower end MCUs or does it require a clock generation (or some other) unit that isn't worth the cost to develop it for cheaper MCUs?
AI: USB 3.0 PHY (physical, electrical) layer achieves the 5Gbit/s transmission rate utilizing high speed differential signaling (CML), same as PCI Express. Implementation of this physical layer on chip requires a transceiver, and a SERDES (serializer, deserializer) at the minimum, in addition to the MAC (media access control) layer requirements. These blocks would probably require additional clock generation and signal conditioning circuitry (equalizers on the lines to reduce bit error rates). Putting all this circuitry in your chip has two primary costs, silicon area and power.
Even if we assume if the power consumption is irrelevant, as you can turn the whole thing off if you're not using it, shipping a MCU with a USB 3.0 PHY would probably increase the silicon area enough to increase the costs drastically. |
H: Calculated result for inductance seems wrong?
I'm building an FM radio transmitter kit which includes an LC tank, where C is a tuner capacitor of ~30pF and the resonant frequency is ~100Mhz. The value of the PCB trace inductor, however, is not specified and I want to know what it is.
If I plug:
\$100000000=\dfrac{1}{2π\sqrt{L3\times10^{-11})}}\$
into an equation solver the result is apparently 52771500 Henries. That seems... a little off? Considering most of the FM transmitter examples I've looked at on the net are like, 0.5uH?
How do I work this out?
AI: I think this is a mathematical error as I specified in a comment. To clarify further, rearrange for L as follows.
$$
L = \frac{(1e8*2\pi)^{-2}}{3e-11} = \frac{1}{12\pi^2} \cdot \frac{1e-16}{1e-11} = 8.443e-8 H = 84.43 nH
$$
The equation holds and seems to yield a reasonable value. |
H: advice for opto isolated gate drivers
i want to construct a half bridge driver for motor control application. The voltage range from 48-72v.
Having worked with non isolated schemes before (for lower voltages), I decided now for isolation. I have thought of two ways:
1- use opto isolator on the PWM pin of the IR2184
2- use ADuM3223 half bridge driver.
An isolated dc dc converter will be used to supply the microcontroller ( inorder to protect the micro from noise and load dump .. etc
and a non-isolated converter for gate driver.
if you have another aproach i would be delighted to hear it .
AI: Use opto isolator on the PWM pin of the IR2184
Note that this answer was made prior to the OP showing a picture of the magnetic coupler proposed (note this is not an opto coupler despite the question explicitly stating "opto-isolated" in the title).
PWM operating frequency is going to kick you in the teeth unless you are running sub 10 kHz or you can find a really good opto-isolator that has fast rise and falls times.
A hand waving typical rise and fall time for an opto might be about 5 us and this will be into a quite low load resistance of about 100 ohm. Into 1 kohm it could rise to 20 us or more. Now, if it takes 20 us to deliver a PWM "edge" then you don't want to be switching too often or the rise/fall time inefficiences will be warming things up. So maybe 20 us represents 5% of the period of your PWM.
If you work that out you'd choose a PWM frequency of 2.5 kHz because 2.5 kHz has a period of 400 us and 5% of that is 20 us. But it's a little worse because there are two edges to consider in each PWM cycle so, you'd choose 1.25 kHz as your PWM frequency.
Regards the ADuM3223 - it is a good device and has a rise/fall time less than 100 ns! |
H: How to connect a relay to 220 Volts outlet?
I used relays before but just for simple 5V DC signals control using a Raspberry Pi. Now I'm quite cautious and would like to ask for some help from professionals because I'm not planning to set my apartment on fire.
What do I currently know about this?
I currently use the relay to switch on/off my computers. Doing this is very simple. Since computers turn on by shorting two terminals, I just took a branch from the power buttons of my computers and hooked them to a relay (like the one in the picture) to the terminals are not connected by default. I have a little script that switches the relay for 0.5 seconds, which is enough to turn computer on.
The problem:
Now I would like to use this to control some 220 Volts power outlet. For that, I bought a socket, like the one in the picture, and mounted it on a plastic project box:
From that socket comes 3 terminals, two terminals (call them black and red) and earth in the middle (call it green).
I would like to install an IEC socket on the box, too (like the one in the following picture):
The question:
How should I connect the outlet socket to the IEC through the relay? Please advise.
If you require any additional information, please ask.
AI: If you have a properly rated relay, you don't need to do anything fancy. Just use the right gauge wire for your power requirements.
Route the hot line through the relay, don't route the neutral line. Then of course connect the earth and neutral from each connector together. If you don't know what hot, neutral and earth are, now would be a good time to get yourself up to speed on residential wiring.
However, you will want to be a little bit more deliberate and careful than you would with 5V lines, which might include heat shrinking over any soldered connections, and carefully routing the wires inside your enclosure so that they don't move around or come loose and short out. The stiffness of the thicker gauge wire may require a little more forethought and planning while cutting and placing, but you'll figure it out quickly enough.
Lastly, everything needs to be enclosed, you can't just leave it out in the open like you can with 5V. |
H: Can't use custom library in Eagle
I have created a library in Eagle 7.5.0, then I copied it in the folder where Eagle keeps its libraries but and I can't use it. When I try to add new component the library is not among the available ones. When I am in Eagle I can open it and modify it but I can't use it in a schematic. What am I doing wrong?
The custom library is Components
AI: This isn't a direct answer, but you really shouldn't put your own libraries into the directory where the Eagle libraries are. You don't know what will go there in future releases that might overwrite your files.
Create a directory for your own libraries. Then add it to the library search path.
I go further and deleted the Eagle libraries directory from the libraries search path, since the Eagle libraries are of little use and it's easier to make your own parts than vetting their, even when theirs are acceptable.
As for why you library isn't showing up, I don't know. I do what I described above and all my libraries show up all the time. |
H: Is a high current wall charger dangerous for my phone?
I've bought a USB wall charger to power my Raspberry Pi. I chose the 3A one so that I can connect some more power hungly devices like hard drives to the Pi's USB ports.
I can connect 2 cables to the charger I bought. I have two questions about it.
the charger that came with my Android is 1,2 A I think. Is it potentially harmfull to my phone if I charge it with my new charger since it is 3 A?
will I have a maximum of 3 A in total on the ports (so 2 * 1.5 for example), of will I have 3 A on each?
AI: Q1: No it is not harmful. Your phone will only draw the current it needs from the charger. As long as the charger voltage is right and it is rated to supply at least the current required by the device you will be fine.
Q2: Without a data sheet we don't know.
Edit:
The power delivery specifications indicate that 1.5 A was normal for battery charging with higher power available on later (2012) specifications. If it's a cheap PSU it might just have 5 V connected to each USB port without any current limiting at all, never mind individual port current limiting. |
H: Artix 7 Block RAM instantiation in Vivado 2015.2
Ok I'm trying to create a Block RAM instantiation in true dual port type. I have used the IP catalog and block memory generator in Vivado, which has given me a giant file that I now need to strip down to the parts that I need. This is my first time using internal block ram or ram at all. My question is what do I need out of the first code to make it work in Vivado. The second peace of code is what I have been working with which gave me many errors which I posted in another thread multi-driver net found.
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
LIBRARY blk_mem_gen_v8_2;
USE blk_mem_gen_v8_2.blk_mem_gen_v8_2;
ENTITY blk_mem_gen_0 IS
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(17 DOWNTO 0)
);
END blk_mem_gen_0;
ARCHITECTURE blk_mem_gen_0_arch OF blk_mem_gen_0 IS
ATTRIBUTE DowngradeIPIdentifiedWarnings : string;
ATTRIBUTE DowngradeIPIdentifiedWarnings OF blk_mem_gen_0_arch:
COMPONENT blk_mem_gen_v8_2 IS
GENERIC (
C_FAMILY : STRING;
C_XDEVICEFAMILY : STRING;
C_ELABORATION_DIR : STRING;
C_INTERFACE_TYPE : INTEGER;
C_AXI_TYPE : INTEGER;
C_AXI_SLAVE_TYPE : INTEGER;
C_USE_BRAM_BLOCK : INTEGER;
C_ENABLE_32BIT_ADDRESS : INTEGER;
C_CTRL_ECC_ALGO : STRING;
C_HAS_AXI_ID : INTEGER;
C_AXI_ID_WIDTH : INTEGER;
C_MEM_TYPE : INTEGER;
C_BYTE_SIZE : INTEGER;
C_ALGORITHM : INTEGER;
C_PRIM_TYPE : INTEGER;
C_LOAD_INIT_FILE : INTEGER;
C_INIT_FILE_NAME : STRING;
C_INIT_FILE : STRING;
C_USE_DEFAULT_DATA : INTEGER;
C_DEFAULT_DATA : STRING;
C_HAS_RSTA : INTEGER;
C_RST_PRIORITY_A : STRING;
C_RSTRAM_A : INTEGER;
C_INITA_VAL : STRING;
C_HAS_ENA : INTEGER;
C_HAS_REGCEA : INTEGER;
C_USE_BYTE_WEA : INTEGER;
C_WEA_WIDTH : INTEGER;
C_WRITE_MODE_A : STRING;
C_WRITE_WIDTH_A : INTEGER;
C_READ_WIDTH_A : INTEGER;
C_WRITE_DEPTH_A : INTEGER;
C_READ_DEPTH_A : INTEGER;
C_ADDRA_WIDTH : INTEGER;
C_HAS_RSTB : INTEGER;
C_RST_PRIORITY_B : STRING;
C_RSTRAM_B : INTEGER;
C_INITB_VAL : STRING;
C_HAS_ENB : INTEGER;
C_HAS_REGCEB : INTEGER;
C_USE_BYTE_WEB : INTEGER;
C_WEB_WIDTH : INTEGER;
C_WRITE_MODE_B : STRING;
C_WRITE_WIDTH_B : INTEGER;
C_READ_WIDTH_B : INTEGER;
C_WRITE_DEPTH_B : INTEGER;
C_READ_DEPTH_B : INTEGER;
C_ADDRB_WIDTH : INTEGER;
C_HAS_MEM_OUTPUT_REGS_A : INTEGER;
C_HAS_MEM_OUTPUT_REGS_B : INTEGER;
C_HAS_MUX_OUTPUT_REGS_A : INTEGER;
C_HAS_MUX_OUTPUT_REGS_B : INTEGER;
C_MUX_PIPELINE_STAGES : INTEGER;
C_HAS_SOFTECC_INPUT_REGS_A : INTEGER;
C_HAS_SOFTECC_OUTPUT_REGS_B : INTEGER;
C_USE_SOFTECC : INTEGER;
C_USE_ECC : INTEGER;
C_EN_ECC_PIPE : INTEGER;
C_HAS_INJECTERR : INTEGER;
C_SIM_COLLISION_CHECK : STRING;
C_COMMON_CLK : INTEGER;
C_DISABLE_WARN_BHV_COLL : INTEGER;
C_EN_SLEEP_PIN : INTEGER;
C_USE_URAM : INTEGER;
C_EN_RDADDRA_CHG : INTEGER;
C_EN_RDADDRB_CHG : INTEGER;
C_EN_DEEPSLEEP_PIN : INTEGER;
C_EN_SHUTDOWN_PIN : INTEGER;
C_DISABLE_WARN_BHV_RANGE : INTEGER;
C_COUNT_36K_BRAM : STRING;
C_COUNT_18K_BRAM : STRING;
C_EST_POWER_SUMMARY : STRING
);
PORT (
clka : IN STD_LOGIC;
rsta : IN STD_LOGIC;
ena : IN STD_LOGIC;
regcea : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
clkb : IN STD_LOGIC;
rstb : IN STD_LOGIC;
enb : IN STD_LOGIC;
regceb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
injectsbiterr : IN STD_LOGIC;
injectdbiterr : IN STD_LOGIC;
eccpipece : IN STD_LOGIC;
sbiterr : OUT STD_LOGIC;
dbiterr : OUT STD_LOGIC;
rdaddrecc : OUT STD_LOGIC_VECTOR(9 DOWNTO 0);
sleep : IN STD_LOGIC;
deepsleep : IN STD_LOGIC;
shutdown : IN STD_LOGIC;
s_aclk : IN STD_LOGIC;
s_aresetn : IN STD_LOGIC;
s_axi_awid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awaddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_arid : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_araddr : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rid : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_rdata : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
s_axi_injectsbiterr : IN STD_LOGIC;
s_axi_injectdbiterr : IN STD_LOGIC;
s_axi_sbiterr : OUT STD_LOGIC;
s_axi_dbiterr : OUT STD_LOGIC;
s_axi_rdaddrecc : OUT STD_LOGIC_VECTOR(9 DOWNTO 0)
);
END COMPONENT blk_mem_gen_v8_2;
ATTRIBUTE X_CORE_INFO : STRING;
ATTRIBUTE X_CORE_INFO OF blk_mem_gen_0_arch: ARCHITECTURE IS "blk_
ATTRIBUTE CHECK_LICENSE_TYPE : STRING;
ATTRIBUTE CHECK_LICENSE_TYPE OF blk_mem_gen_0_arch : ARCHITECTURE IS
ATTRIBUTE CORE_GENERATION_INFO : STRING;
ATTRIBUTE CORE_GENERATION_INFO OF blk_mem_gen_0_arch: ARCHITECTURE IS
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_INFO OF clka: SIGNAL IS ce:bram:1.0 BRAM_PORTA ;
ATTRIBUTE X_INTERFACE_INFO OF rsta: SIGNAL IS ace:bram:1.0 BRAM_PORTA ;
ATTRIBUTE X_INTERFACE_INFO OF ena: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF wea: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF addra: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF dina: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF douta: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF clkb: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF rstb: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF enb: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF web: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF addrb: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF dinb: SIGNAL IS
ATTRIBUTE X_INTERFACE_INFO OF doutb: SIGNAL IS
BEGIN
U0 : blk_mem_gen_v8_2
GENERIC MAP (
C_FAMILY => "artix7",
C_XDEVICEFAMILY => "artix7",
C_ELABORATION_DIR => "./",
C_INTERFACE_TYPE => 0,
C_AXI_TYPE => 1,
C_AXI_SLAVE_TYPE => 0,
C_USE_BRAM_BLOCK => 0,
C_ENABLE_32BIT_ADDRESS => 0,
C_CTRL_ECC_ALGO => "NONE",
C_HAS_AXI_ID => 0,
C_AXI_ID_WIDTH => 4,
C_MEM_TYPE => 2,
C_BYTE_SIZE => 9,
C_ALGORITHM => 1,
C_PRIM_TYPE => 1,
C_LOAD_INIT_FILE => 0,
C_INIT_FILE_NAME => "no_coe_file_loaded",
C_INIT_FILE => "blk_mem_gen_0.mem",
C_USE_DEFAULT_DATA => 0,
C_DEFAULT_DATA => "0",
C_HAS_RSTA => 1,
C_RST_PRIORITY_A => "CE",
C_RSTRAM_A => 0,
C_INITA_VAL => "0",
C_HAS_ENA => 1,
C_HAS_REGCEA => 0,
C_USE_BYTE_WEA => 0,
C_WEA_WIDTH => 1,
C_WRITE_MODE_A => "WRITE_FIRST",
C_WRITE_WIDTH_A => 18,
C_READ_WIDTH_A => 18,
C_WRITE_DEPTH_A => 1024,
C_READ_DEPTH_A => 1024,
C_ADDRA_WIDTH => 10,
C_HAS_RSTB => 1,
C_RST_PRIORITY_B => "CE",
C_RSTRAM_B => 0,
C_INITB_VAL => "0",
C_HAS_ENB => 1,
C_HAS_REGCEB => 0,
C_USE_BYTE_WEB => 0,
C_WEB_WIDTH => 1,
C_WRITE_MODE_B => "WRITE_FIRST",
C_WRITE_WIDTH_B => 18,
C_READ_WIDTH_B => 18,
C_WRITE_DEPTH_B => 1024,
C_READ_DEPTH_B => 1024,
C_ADDRB_WIDTH => 10,
C_HAS_MEM_OUTPUT_REGS_A => 0,
C_HAS_MEM_OUTPUT_REGS_B => 0,
C_HAS_MUX_OUTPUT_REGS_A => 0,
C_HAS_MUX_OUTPUT_REGS_B => 0,
C_MUX_PIPELINE_STAGES => 0,
C_HAS_SOFTECC_INPUT_REGS_A => 0,
C_HAS_SOFTECC_OUTPUT_REGS_B => 0,
C_USE_SOFTECC => 0,
C_USE_ECC => 0,
C_EN_ECC_PIPE => 0,
C_HAS_INJECTERR => 0,
C_SIM_COLLISION_CHECK => "ALL",
C_COMMON_CLK => 0,
C_DISABLE_WARN_BHV_COLL => 0,
C_EN_SLEEP_PIN => 0,
C_USE_URAM => 0,
C_EN_RDADDRA_CHG => 0,
C_EN_RDADDRB_CHG => 0,
C_EN_DEEPSLEEP_PIN => 0,
C_EN_SHUTDOWN_PIN => 0,
C_DISABLE_WARN_BHV_RANGE => 0,
C_COUNT_36K_BRAM => "0",
C_COUNT_18K_BRAM => "1",
C_EST_POWER_SUMMARY => "Estimated Power for IP : 3.1193 mW"
)
enter code here
PORT MAP (
clka => clka,
rsta => rsta,
ena => ena,
regcea => '0',
wea => wea,
addra => addra,
dina => dina,
douta => douta,
clkb => clkb,
rstb => rstb,
enb => enb,
regceb => '0',
web => web,
addrb => addrb,
dinb => dinb,
doutb => doutb,
injectsbiterr => '0',
injectdbiterr => '0',
eccpipece => '0',
sleep => '0',
deepsleep => '0',
shutdown => '0',
s_aclk => '0',
s_aresetn => '0',
s_axi_awid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_awaddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_awlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_awsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_awburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_awvalid => '0',
s_axi_wdata => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 18)),
s_axi_wstrb => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 1)),
s_axi_wlast => '0',
s_axi_wvalid => '0',
s_axi_bready => '0',
s_axi_arid => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 4)),
s_axi_araddr => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 32)),
s_axi_arlen => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 8)),
s_axi_arsize => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 3)),
s_axi_arburst => STD_LOGIC_VECTOR(TO_UNSIGNED(0, 2)),
s_axi_arvalid => '0',
s_axi_rready => '0',
s_axi_injectsbiterr => '0',
s_axi_injectdbiterr => '0'
);
END blk_mem_gen_0_arch;
enter code here
The next peace of code I was given to work with. This peace of code gives me multi drivers net found errors. It was also written for a Spartan 3 chip. I need one for an artix 7 chip. Thanks
RAMB16_S18_S18_inst : RAMB16_S18_S18
generic map (
INIT_A => X"00000", -- Value of output RAM registers on Port A at up
INIT_B => X"00000", -- Value of output RAM registers on Port B at startup
SRVAL_A => X"00000", -- Port A ouput value upon SSR assertion
SRVAL_B => X"00000", -- Port B ouput value upon SSR assertion
WRITE_MODE_A => "WRITE_FIRST", -- WRITE_FIRST, READ_FIRST or NO_CHANGE
WRITE_MODE_B => "WRITE_FIRST", -- WRITE_FIRST, READ_FIRST or NO_CHANGE
SIM_COLLISION_CHECK => "ALL", -- "NONE", "WARNING", "GENERATE_X_ONLY", "ALL
-- The follosing INIT_xx declarations specify the intiial contents of the RAM
-- Address 0 to 255
INIT_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_07 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_08 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_09 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 256 to 511
INIT_10 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_11 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_12 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_13 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_14 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_15 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_19 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_1F => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 512 to 767
INIT_20 => X"00000000000000004703CEC28D8100282E2E8037903190319031903100000000",
INIT_21 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_22 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_23 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_24 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_25 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_26 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_27 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_28 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_29 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_2F => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 768 to 1023
INIT_30 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_31 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_32 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_33 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_34 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_35 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_36 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_37 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_38 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_39 => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3A => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3B => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3C => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3D => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3E => X"0000000000000000000000000000000000000000000000000000000000000000",
INIT_3F => X"0000000000000000000000000000000000000000000000000000000000000000",
-- The next set of INITP_xx are for the parity bits
-- Address 0 to 255
INITP_00 => X"0000000000000000000000000000000000000000000000000000000000000000",
INITP_01 => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 256 to 511
INITP_02 => X"0000000000000000000000000000000000000000000000000000000000000000",
INITP_03 => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 512 to 767
INITP_04 => X"0000000000000000000000000000000000000000000000000000000000000000",
INITP_05 => X"0000000000000000000000000000000000000000000000000000000000000000",
-- Address 768 to 1023
INITP_06 => X"0000000000000000000000000000000000000000000000000000000000000000",
INITP_07 => X"0000000000000000000000000000000000000000000000000000000000000000")
port map (
DOA => DOA, -- Port A 16-bit Data Output
DOB => dataout, -- Port B 16-bit Data Output
DOPA => DOPA, -- Port A 2-bit Parity Output
DOPB => DOPB, -- Port B 2-bit Parity Output
ADDRA => ADDRA, -- Port A 10-bit Address Input
ADDRB => addr, -- Port B 10-bit Address Input
CLKA => CLKA, -- Port A Clock
CLKB => ram_clk, -- Port B Clock
DIA => DIA, -- Port A 16-bit Data Input
DIB => datain, -- Port B 16-bit Data Input
DIPA => DIPA, -- Port A 2-bit parity Input
DIPB => DIPB, -- Port-B 2-bit parity Input
ENA => ENA, -- Port A RAM Enable Input
ENB => ram_enable, -- PortB RAM Enable Input
SSRA => '0', -- Port A Synchronous Set/Reset Input
SSRB => ram_reset, -- Port B Synchronous Set/Reset Input
WEA => WEA, -- Port A Write Enable Input
WEB => we -- Port B Write Enable Input
);
AI: Using a generic VHDL code snippet is much smaller....
Example: PoC.mem.ocrom.tdp
entity ocram_tdp is
generic (
A_BITS : positive;
D_BITS : positive
);
port (
clk1 : in std_logic;
clk2 : in std_logic;
ce1 : in std_logic;
ce2 : in std_logic;
we1 : in std_logic;
we2 : in std_logic;
a1 : in unsigned(A_BITS-1 downto 0);
a2 : in unsigned(A_BITS-1 downto 0);
d1 : in std_logic_vector(D_BITS-1 downto 0);
d2 : in std_logic_vector(D_BITS-1 downto 0);
q1 : out std_logic_vector(D_BITS-1 downto 0);
q2 : out std_logic_vector(D_BITS-1 downto 0)
);
end entity;
architecture rtl of ocram_tdp is
constant DEPTH : positive := 2**A_BITS;
signal ram : ram_t;
signal a1_reg : unsigned(A_BITS-1 downto 0);
signal a2_reg : unsigned(A_BITS-1 downto 0);
begin
process (clk1, clk2)
begin -- process
if rising_edge(clk1) then
if ce1 = '1' then
if we1 = '1' then
ram(to_integer(a1)) <= d1;
end if;
a1_reg <= a1;
end if;
end if;
if rising_edge(clk2) then
if ce2 = '1' then
if we2 = '1' then
ram(to_integer(a2)) <= d2;
end if;
a2_reg <= a2;
end if;
end if;
end process;
q1 <= ram(to_integer(a1_reg)); -- returns new data
q2 <= ram(to_integer(a2_reg)); -- returns new data
end architecture;
See the linked file for more features:
read RAM content from disk at synthesis time
switch to Altera primitives if synthesized with Quartus-II |
H: Measuring Input Impedance of Transistor with LTSpice
How do you measure the input impedance of a transistor with LTSpice?
Consider the following circuit:
The above just biases a transistor so that the collector is 1/2 the supply. I used a current source with 1A AC. I then plotted the voltage at the base divided by the current at the base because we all know R = V/I.
So from this plot it looks like it's about 2.9K. Is this correct?
Although the impedance depends on the bias. Obviously with the bias high enough the impedance of the transistor is 0 - it's just a diode. Right?
AI: So from this plot it looks like it's about 2.9K. Is this correct?
Yes
Obviously with the bias high enough the impedance of the transistor is 0 - it's just a diode. Right?
Probably not. The diode model probably includes parasitic resistance in the base and emitter contacts, so the input resistance will never go all the way to zero. Also, your R3 (multiplied by the transistor beta) will set a lower limit on how low a resistance you measure looking in to the base of the transistor in your circuit. |
H: Is this code implying a latch and unsafe (verilog)?
I am getting started with verilog and I wrote this code here to test if a number if prime. I know it could be a lot more efficient but it is just for practice. The way test for primeness is when the reset signal gets sent I initialize the register div to 2. I then increment it by 1 each clock cycle while it is not divisible by the number I am testing. Once it becomes divisible (in this case it is either a factor where the number is not prime or the number in which case it is prime) I want to keep the register at the same value. This is the issue. Am I implying a latch here. I know that I am assigning a value to div in each branch of the if statement but I am not sure if I should be assigning it to itself.
module prime(
input [31:0] n,
input clk,
input reset,
output done,
output is_prime);
reg [32:0] div;
assign is_prime = div == n;
assign done = n % div == 0;
always @(posedge clk) begin
if(reset) begin
div <= 2;
end
else if(n % div == 0) begin
div <= div; //does this cause a latch
end
else begin
div <= div + 1;
end
end
endmodule
AI: There is no latch inferred at all. It is simply a flip-flop (well several) with either a clock enable, or a multiplexer of its own output and some other input.
A latch would be inferred if it was asynchronous logic - i.e. you had no clock. In that situation you may indeed have a latch as the asynchronous logic would need to hold its value (in this case, if it was async, I think there would have been).
If you are using synthesis tools like Altera Quartus or Xilinx ISE, they generally include RTL netlist viewers which give you an approximate idea of what you are inferring. Below is what your code produces. Note the mux (gets called div~[32..0] by the synthesis tool) on which one of the inputs is the current value of the register.
As an aside, and while I am well aware your example is just practicing, it is worth noting that division and modulo require massive amounts of logic to implement and as such are either very slow or need lots of pipelining. The are not operations well suited to FPGAs. There are ways of doing primality tests that don't require the modulo operation which may be better suited to the FPGA.
In case you are curious, and just for the fun of it I compiled the code targeting a Stratix V device (which are one of Altera's to end FPGAs), and the tools report that the design could only run at a whopping 21MHz - without the modulo, it could probably run at upwards of 300MHz :). |
H: ECE - Study Guide: Physical Memory addresses how many bytes?
Attempting to do this study guide, but i'm not finding too much help online. Any help is welcome, and a explanation would be nice, as my text book does not describe how to answer a problem given the information.
The figure: ][2]
Questions:
How much physical memory can the microprocessor address?
How many words does the memory IC contain?
What is the address range for the memory? That is, if one wanted to access this memory with a program, what range of addresses would "talk" to this memory chip?
AI: A23 to A0 would be a 24 bit wide address bus. 2^24 = 16,777,216 words.
The memory device address bus is A17 to A0, so 18 bits wide. Up to 64 memory devices could be used (6 bit wide Chip Select, A23 to A18.) Each memory device contains 2^18 = 262,144 words internally (based on the 18 bit memory address.) |
H: Rectification of Micro DC voltage levels?
I am building a payload for a high-altitude Balloon launch in the club I started which will be measuring DC voltages (electric field) at different altitudes using a wire dipole or two metal plate formation.
I obviously need a low noise amplifier to even register any data in the logger, and we are not worried about polarity, only magnitude.
To do this, I am thinking an instrumentation amplifier fed from the metal plates to the data-logging device, but I am facing a problem, how can I assure the DC amplifier is only measuring positive values? Even some good diodes have a few hundred millivolt drop, which would not be suitable for the experiment. A transformer would not work because this is only DC we are working with (even if it was AC, the high input impedance requirement would not be fulfilled).
Any ideas on rectification or ways to amplify the small DC signals which we can't be 100 percent sure the polarity is constant.
AI: That won't work. It may detect ion flows and AC fields above a certain frequency, but it can't detect DC fields. After all, the plates constitute a coupling capacitor in series with the fields you want to detect. It's a high-pass filter.
The usual instrument for this is called a "field mill," where the detector plate is placed close behind a grounded metal propeller or rotating "sector disk." The rotating disk chops any DC e-fields into low-freq AC, which is easily amplified/rectified/A-toD'd etc. Perhaps even use low-pass filtering and a synchronous detector to reject any unwanted AC.
DIY e-field sensor field mill from Scientific American:
Jul '99 The Amateur Scientist
More electrometer and Field Mill links
Besides "field mill," also search for "Electrometer"
Antenna without the field mill: if your detector plate is 10 picofarad, and the amplifier's input is MOSFET with 100 giga-ohm Z-inp, then you've formed a high-pass filter which rejects all DC below ~1Hz (since RC is 1e11ohm * 1e-11farad) It's possible to use a much higher-Z amplifier, plus a periodic shorting relay that "resets" the detector's input before taking data. But then usually you'll run into unknown humidity leakage across plastic insulators, and a (drifting) high-pass period of ?tens? of seconds. Better to just add a field mill, and measure true DC fields.
(edit) PS. Here's something I've not tried: just build a non-fieldmill e-field antenna with well-known RC time constant of perhaps a few seconds, use high-res A/D input, then massage the numbers to cancel out the RC and restore the DC value. Of course this includes a stage of integration, so any slight errors in zero-adjust would produce a constantly increasing drift. The amplifier's DC-zero would need to be extremely stable across the environmental temperature changes involved. |
H: buffering large DC signals
Is there a way to buffer a large DC signal accurately?
I would like to measure a voltage that can go from 0 to 50VDC, with 16 bit accuracy (so down to the mV level at the highest voltage, and µV levels at the lowest). Since this is a 10ppm measurement, I need to be very careful about not affecting the voltage that I am trying to measure.
The typical way to do this (I believe) is to use a unity gain buffer at the voltage, with something like a FET op amp.
The problem is that there aren't that many op amps that can have 50VDC inputs. Of those that can, there are fewer that can have 50VDC outputs. And finally, of those, there really aren't that many that would be very accurate at low voltage measurements. Typical offset voltages in the mV are common I believe. Finally, I'm not aware of any that can measure down to the lower rail.
Anyone have any idea how to buffer something like this? Noise is less of a concern due to the DC nature of the voltage that is being measured, but accuracy is important.
AI: if you have all day (relatively speaking) to make your 'DC' measurement you could servo the supplies of an accurate low voltage (say zero-drift/chopper) amplifier to be close to the measured voltage using a cruder amplifier. Using something like a hybrid high voltage op-amp hundreds of volts would be possible.
Edit: The concept would be to build a voltage follower buffer that (say) is supplied from a 5V supply, but that 5V supply is floating (DC-DC converter, say), and ground for it is connected to the output of a crude high voltage op-amp (say an expensive Apex 400V amplifier with -10/+350V). You'd need protection on the input such as clamp diodes and a series resistor because it will see high voltage occasionally as well as on the output since it will subject whatever it is connected to to high voltage (maybe just a series resistor). Put a divider across the floating 5V supply and servo that to 0V with respect to system ground using the crude amplifier. Input protection for the low voltage amplifier, whatever follows it, and noise contributed by the crude amplifier that is too high frequency to be eliminated by the low voltage buffer are possible problems, as is slew rate. Fortunately there are easier solutions for 50V signals!
However your 50V+ requirement is not all that daunting for a 2015 design, and you can simply slap down an LTC2057HV and give it something like a 0V/+55V supply. Any output load should be to the negative rail. Offset drift is only 15nV/°C and 4uV maximum offset, so 16 bit accuracy down to about 0.25V full scale, and (with single point zero null) for +/-20°C, more like 20mV full scale typically. Chances are your connectors (thermal EMFs), reference drift, PGA and other components will add a lot more error. |
H: Help to calculate the collector current
Above circuit is taken from a book. It uses an NPN and a PNP transistor combination. In saturation, the author's answer to the Q2's collector current is 4.4mA and claims only 0.6mA of it comes from R3.
When I try to calculate this I get different answer. Apparently something wrong with my way here:
When Q2 is saturated I follow the following logic:
1-)The current comes down to Q2's qround through R3 and R2 resistors is: 15V/4.3k
2-)The current comes through emitter-base of Q3 is: (15V-0.6V)/3.3k
note: here 0.6 is the voltage in emitter-base junction in saturation
3-)The total collector current is the some of above two currents which is way above the author's answer
How can I analyse this circuit to find Ic of Q2? Whats wrong with my assumption?
AI: When Q3 is activated you can assume that the base emitter voltage is 0.6 volts. This directly means there is 0.6 volts across R3 and this means the current through R3 is 0.6 mA.
For R2, the voltage across it is 15V - (0.6V + Vsat_of_Q2). I estimate that to be about 14.3 volts hence, the current into R2 is 14.3/3300 = 4.33 mA of which R3 supplies 0.6mA. |
H: LED: should I smooth the current with a capacitor
To control the brightness of a LED often pwm is directly used as input to the LED. Does this on/off turning by the pwm has any negative effect on the live expectation of the LED?
Would it be better for the MTTF (mean time to failure) to smoothen the current by adding a capacitor?
AI: One potential problem with using a capacitor to 'smooth' a PWM voltage for the LED, is the LED has a minimum forward voltage before it turns on sufficient to be visible.
Its brightness is not controlled by voltage, it is controlled by current, and the amount of time it is switched on (i.e. the PWM duty cycle).
The capacitor might reduce the 'smoothed' PWM voltage below the minimum forward voltage, so the LED would no longer be visible, even though it would be visible using exactly the same PWM signal directly (without the capacitor).
So it would reduce the brightness range over which the LED can be controlled.
AFAIK, the bigger killer of LEDs is heat leading to a significant temperature rise, and not switching.
Typically we want to drive an LED with a constant current (or something near, e.g. a resistor), so that it is protected from too much heat leading to temperature rise and permanent damage. Edit: Depending on how the capacitor is connected, a capacitor may actually reduce the effectiveness of the constant current circuitry. |
H: Powering LEDs with a transistor
I'm a beginner. I'm designing a battery powered LED flashlight with a dimmer. The flashlight will have 3 LEDs and the dimmer will be controlled by a PWM signal generated by a 555. The circuit is powered by 2 AA batteries (3V).
This is the LED part of the circuit:
simulate this circuit – Schematic created using CircuitLab
So, my calculation is this: I'm applying a 3V signal through a 12k resistor, so the current being applied in the transistor base is 0,25mA. Since the 2N3904 (Q1) has a max hFE of 300, the current being sunk by the transistor is 75 mA. This current will be divided between the three LEDs, 25mA for each one, which is the rated current for this LED.
So, my questions are:
Are my calculations correct? Is my circuit correct?
This transistor has a hFE value between 100 and 300. I'm using 300 to be on the safe side. Is this correct?
Am I at risk of destroying the transistor or the LEDs? If one LED burns, the current will be then divided between the other two (38 mA each)?
Is this the most efficient way of powering these LEDs?
AI: You are going to kill the LEDs - LEDs are controlled with current and you are placing 3V across a bunch in parallel. Look at this: -
With 2V across this "typical" LED you get 20mA through it but at 3V it's off-the-scale. You need a series current limiting resistor for each LED.
Current will not divide equally between each LED because of tiny differences in the forward voltage characteristic. Look at the graph above; if one LED required 2.1 volts to draw 20mA and another need 2.0 volts to take 20mA, most of the current will be taken by the 2nd LED.
See also this closely related Q&A
EDIT - Regarding the transistor hFE, you might be thinking that a certain base current will always cause a certain collector current to flow and this is commonly the case when the transistor is in its active region: -
The active region is the area in the graph above where the collector current has a fairly flat slope and it can be seen that collector current is proportional to base current. However, you need to operate the transistor as a switch because you can't easily control current accurately into an LED. As mentioned above, it is the use of a resistor that controls the current into a simple LED circuit.
So, when operated as a switch, the BJT is "saturated" and the part of the characteristic it uses is close to 0V on the x-axis - now the slopes of collector current and CE voltage are very high and this is called the linear region - basically if you double CE voltage you double collector current - it's a resistor. You could look at that graph and with a base current of (say) 5 mA the collector current is 500 mA with 5V applied - this ratio is largely the case when 2.5 volts are applied i.e. collector current halves.
This implies it has a resistance of ~5V/500mA = ~10 ohms i.e. it is a switch but with 10 ohm contact resistance! |
H: Burning bootloader on atmega1284 tqfp
Is the process of burning a bootloader (JChristensen's mighty-1284 to be precise), on an Atmega1284 microcontroller same for both DIP (Atmega1284p) and tqfp (Atmega1284-au)?
While searching online I found very little information about the tqfp version of the chip.
Also, I would like to use internal or external 8 Mhz oscillator (crystal) as my board should run at 3.7V from lithium ion battery charged with MCP73831 lipo charging chip. Should I just change the fuse settings in the Arduino IDE boards.txt file (and should I use the fuse bits from Atmega1284 datasheet) or there is something else that also should be done?
Here are my schematics:
AI: Yes it should be functionally identical (apart from the pin numbers, which look correct for the TQFP in your schematic anyway.)
You can use this tool to work out what the fuse values should be. In particular the clock selection should be "Internal RC Oscillator" and the "Divide clock by 8 internally" should be disabled (The Int. RC Osc is 8Mhz.)
Not sure about boards.txt as I don't use the Arduino IDE.
Also I recommend http://arduino.stackexchange.com |
H: DC circuit problem
I have this problem during the exam and for some reason, I haven't asked my teacher yet. I hope that someone can clarify it for me.
Here is the question:
On the left, Voltage between AB is given and we need to find voltage between CD. After I have U_CD, I use it and try to find back U_AB on the right but I cannot get the same number. I don't know what's wrong with the point that U_AB in the right side should be equal to the one on the left.
Maybe I lack of basic knowledge and it's time to study it again. Thank you.
AI: The two circuits are not the same. In your first circuit there's a voltage source across AB and no voltage source across CD. But the second circuit is different - there's now a voltage source across CD, and no voltage source across AB. |
H: Trigger capacative button
My washing machine is equipped with a capacitive start button. A "button" is marked with paint on the plastic front and on the backside of the panel there is a spring extruding from the control PCB, pressing against the inside of the plastic panel. I would like to trigger this using an Arduino. While searching for answers I've been trying to use a metal foil, grounded through a relay to trigger the button, but inconsistent results. Could I connect directly to the spring, in any configuration, to trigger this button in a simple way?
AI: I believe it is worth trying to connect directly to the spring: you may get more consistent triggering (I would expect it, but no guarantee).
I'd use a small ceramic capacitor instead of a direct connection though, to protect the capacitive sensor from DC and 50 Hz AC currents which may appear in your circuit. It should be anywhere in 1-100 nF range, one terminal connected to the spring, the other one to your relay. I actually expect such capacitor to be present on the PCB in series with the spring, but extra protection can't hurt. |
H: Reverse voltage protection using a Power MOSFET at low voltages
I don't know as much about MOSFETs as I'd like to. However, I'm planning on using a Power MOSFET to limit reverse polarity issues on a 3V coin cell, i.e. just above 2.7V. How do I pick a power MOSFET for this application? I'm not asking what the best MOSFET is but more what a good heuristic is for determining what a good component is for this particular use. What would I look at? How do you pick the right component?
(from http://www.ti.com/lit/an/slva139/slva139.pdf).
AI: You'll want a FET with low Rdson at the 2.7-3V Vgs so that you'll have minimal power losses when the battery is correctly inserted. The appnote you link to actually has some useful examples in table 1, e.g. it gives ILRML6401 as having 85 mΩ at 2.7V. That is worse than what the mfg datasheet of that FET promises (in the graphs below from the datasheet), but there's probably parts variation or the usual shenanigans where the mfg. measures with a brief pulse instead of continuous current. Note also that Rdson also depends on the drain current not just Vgs and the appnote didn't mention it. So you may need to estimate losses at say typical and max consumption of your circuit using different values for Rdson but only bother with that if there's substantial Rdson difference between these two use cases in the FET Rdson graphs.
You also need to consider the max (drain) current for the FET (make sure you don't exceed it) but for most coin cells it will be hard to exceed the current limit of SOT-23 package FETs anyway. Also, the current draw ultimately depends on your circuit. Power dissipation won't be much of an issue if you pick a Rdson under 0.1ohms; even at 1A drain current (which is tall order for most coin cells) that will mean 0.1W dissipation in the MOSFET. |
H: Why would the transistor not switch?
I was reading an example from a text book. And for this circuit above the author claims when R3 is less than 100 ohm Q3 will not switch. I couldn't figure out the "reason" why. But I verified with LTSpice the author is right. He just doesn't explain the reason.
If lets say R3 is close to zero when Q2 on, why wouldn't Q3 also switch on?
AI: For Q3 to switch on, the voltage drop between its base and emitter must be about 0.6 V, which means that the same voltage must be dropped over R3, which means that the current flowing through R3 must be at least I3 = 0.6V / R3.
When there is less current flowing through R3, the voltage drop over R3 is smaller than Q3's minimal voltage drop, and Q3 will stay off.
For R3 = 100 Ω, the required current I3 would be 6 mA.
However, in this circuit, the current through both R3 and Q3 is also limited by R2: a current of 6 mA would result in a voltage drop of 19.8 V over R2, which is not possible with a 15 V supply.
The largest possible voltage drop over R2 happens when Q2 is saturated, and is about 14 V, which results in a maximum possible current of about 14V/3.3kΩ = 4.2 mA. |
H: Use an Arduino to control a 12v rgb strip
I am wishing to use an Arduino UNO to control a 12v RGB LED strip. Can I use a transistor instead of a relay? The LED strip has 4 pins: + , R, G and B.
AI: Yes. A N-Channel transistor of the right collector current capacity on the R, G & B pins can be used. |
H: Plane pull-back and board keep-out
I create one 4-layer board using Altium's PCB Wizard . By default, it set the plane pullback to 0.5mm, the keep-out area is 1.3mm from the board edge. That is, the top/bottom layer keep-out region is less then the power/ground plane, as below, the red layer are the power plane, and the blue one is the top layer pour.
Is it a good design considering EMC?
AI: You don't want the signal lines to come too close to the edge of the ground/power planes and you definitely don't want them to cross over or they will emit EMI.
The default values sound reasonable to me unless you have some kind of special requirements.
The 0.5mm pullback on the planes keeps the copper from showing up on the edges where the boards are routed (as in cut with a router bit) or perhaps pushed up against a metal part (though in the latter case I would add a bit more clearance for luck in case the PCB manufacturer doesn't get the cutting registration perfect). |
H: Real time operating systems
I have been asked this question: “Do you think the system will need deterministic time or real time responses?” The problem I have is distinguishing the difference between the two. I know that a real time response will respond to an input within a specific time period but I not sure what a deterministic response will do? Thanks.
AI: A real time system has a constraint set as: the system should respond to an event within 10ms.
Or: the system should run PID loop control at a fixed rate of 10kHz. Implicitly a period time of 100us is used.
Both are well set maximum time limits. However they are not exactly deterministic; one PID loop update may take 10us, while the next may take 15us. It also does not say about the passed time between updates; e.g. the "phase".
This "jitter" can be a problem in some systems. Deterministic describes that the "noise" is very low; i.e. it is very predictable how long an algorithm will run, it will not vary a lot (or it can be determined and compensated for) given varying inputs or states of the program.
Deterministic can be important while producing timed signals for example video.
In that case you want to know exactly how long (intermediate) operations take to complete, even when the algorithm needs to take branches that take less or more time to execute.
Some high performance systems are challenging as they are "accelerated" CPU's that incorporate instruction pipelines and caches that may stall code execution in some conditions. Predicting/determining these conditions may be nearly impossible, which is why deterministic is very hard on complex platforms. |
H: Pin Type for Circuit
I'm trying to make a robotic drone from the body of an old quad copter, and I was wondering what these pins are
AI: Those are JST XH/PH connectors. XH if the pin spacing is 0.1", PH if the spacing is 2mm. |
H: Build an 8-digit display using Seven-segment Display and 74HC138
I am trying to create an 8 digit, 7 segment display using an Arduino, 2 4-digit displays and an 74HC138 demux. The 4 displays each have 12 pins: 4 common cathodes, 7 segments and one dot. I thought I would use 8 of the Arduino's digital pins and wire them to the segment and dot pins on the displays, and then use the of the Arduino's digital outputs to control the 74HC138 demux and use that to select the subdisplay. The IC outputs a LOW on the output pin, and so I need to wire a transistor so that it connects the common cathode to ground only when the base current is LOW. Is that correct? How would I wire the components to do that and what transistor do you recommend for this? Should I add any resistors between Arduino's +5V and the LED displays or the IC output and the base terminal of the transistor?
The pinouts for the IC
The 4-digit LED display
AI: Using an external decoder for digit selection is a good idea, since it will save on Arduino pins (but you'll still need 3 address pins). And you are correct that you'll need boost transistors. Connecting a decoder with active-low outputs, like a 74HC138 to transistors to provide active-low display drive is not exactly simple for beginners, since you'll need 2 transistors per channel. You can do it like this
simulate this circuit – Schematic created using CircuitLab
You'll notice that it takes 2 layers of function. Since you're already buying a decoder, you can save some circuitry if you instead use the 74HC238. This is identical to the 138 except that the outputs are active high, and you can do this
simulate this circuit
instead. Using the components shown, you'll have no trouble drawing 50 mA per cathode, and 100 mA is entirely reasonable. |
H: Thevenin's equivalent circuit
When I have to calculate a Thevenin's equivalent circuit which has a current controlled voltage generator, what should I do to calculate the open circuit equivalent voltage to the terminals in question? Is there any difference between a circuit that hasn't any controlled generators? Can you guys give me some examples? Thank you in advance,I know that this could be a stupid question for those who had studied circuits for a long time!
Anyway, here is the circuit i was trying to solve, if you guys want the data just ask
AI: In general, find the open circuit voltage (Voc) using whatever methods works: node, mesh, superposition or source transformation (the latter not usually applicable with dependent sources).
Then to find the Thevenin resistance, either calculate Voc/Isc, or short the independent voltage sources and open the independent current sources, but leave the dependent sources in circuit and calculate the resistance that way. A trick that can help in that case is to excite the circuit either with a 1A current source at the circuit terminals and use node analysis, or a 1V voltage source at the circuit terminals and use mesh analysis.
There's a good description of this process and some worked examples here: http://www.allaboutcircuits.com/technical-articles/thevenin-theorem-dependent-source-circuits/
And here:
http://people.clarkson.edu/~jsvoboda/Syllabi/ES250/Thev/ThevVCVS_HOsoln.pdf
By the way, where you use "controlled generator", I've used "dependent source". They're interchangeable.
If you're stuck at a particular point in this process, try a more specific question. |
H: Power of signal
In book, they say that power of signal $$y(t)=U\left [ \frac{1}{\pi}\cos(\omega_2-\omega_0)t+\frac{1}{2}\cos(\omega_2t)+\frac{1}{\pi}\cos(\omega_2+\omega_0)t \right ]$$ is $$P=\frac{U^{2}}{2R}(\frac{1}{\pi^{2}}+\frac{1}{2^{2}}+\frac{1}{\pi^{2}})$$
How did they get it?
I know that P=U*U/R, but how to apply it here?
AI: Power is proportional the average of V^2/R. Take your y(t), square it, and calculate the average. You'll find that the products of cosines of different frequencies gives another cosine (or sine) -- the average of those is zero. What's left is a set of constants (cosine(0)) with a factor of 1/2 in front of them.
Basically cos(a)*cos(b) = 1/2[cos(a+b) + cos(a-b)]. When a != b, the average of this is 0; when a=b, the only important term is the cos(a-b) which is equal to 1. |
H: how would inductor react if I inject current impulse into parallel LC tank?
What would happen if I inject current impulse into parallel LC tank?
How would current flowing through inductor look like over time?
If we look at the delta function in the S-domain (laplace transform), energy is uniformly distributed over s-domain. This means, delta function cannot be just treated as high frequency signal.
This means, some of current impulse will flow through capacitor, and some will flow through inductor.
Since they are LC tanks (let's assume they are ideal LC tanks), then oscillation will occur. This case, which will react to this oscillation first: inductor? or capacitor?
would inductor start dumping current into capacitor first? or would capacitor start dumping current to inductor first?
I want to know what you guys think about this problem
Thanks,
AI: Assuming a unit impulse current is applied at \$t=0\$, Laplace transform analysis gives:
\$I_C=-\omega \:sin(\omega t)\$
\$I_L=\omega \:sin(\omega t)\$
and voltage across combination:
\$V=\frac{1}{C}\:cos(\omega t)\$
where \$\omega =\frac{1}{\sqrt{LC}}\$
L and C currents are sinusoidal and have 180deg phase difference, so there's zero overall current flowing into the combination, but there's a sinusoidal current of \$\omega\:sin(\omega t)\$ circulating through L and C. Also, there's a (co-)sinusoidal voltage across the combination. At \$t=0\$, the capacitor is charged instantaneously to \$V=\frac{1}{C}\$ by the unit impulse current, hence the cosine voltage function. |
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