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H: Precise differences between DRAM and CMOS processes
There are a couple of questions that mention the difference between standard CMOS processes and DRAM manufacture:
Why do microcontrollers have so little RAM?
How do they integrate logic into a DRAM process while manufacturing SDRAM?
What differences are those exactly, or is this entirely a trade secret? I'd like a detailed answer for someone with a general high-level understanding of the lithographic process.
AI: Here is a (slightly dated) paper that discusses the differences: http://www.ece.neu.edu/faculty/ybk/publication/ASSESSING_MERDRAM_ELSEVIER.pdf
Basically, it boils down to a few important differences.
Leakage current. The pass transistors for the DRAM cells must be extremely low leakage, otherwise the leakage current will affect the bit stored in the cell so quickly that data will be lost between refresh cycles. One technique used is substrate bias - the 'bulk' of the wafer is held at a nonzero voltage to change the transistor performance. For logic, you want the substrate sitting at 0V for the best performance (highest speed). The paper indicates that building a DRAM on a 0.5 um logic process would result in a refresh cycle 20 times more often than would be necessary for a DRAM process. The higher refresh rate will cause increased power consumption and can cause delays with memory access.
Threshold voltages. High threshold voltages are required to lower the leakage current. However, high threshold voltage transistors are slower to switch as the input voltage has to rise up higher before the transistor will switch, requiring more time. The threshold voltage can be adjusted by applying a substrate bias or by increasing the dopant concentration. The paper states that DRAM process threshold voltages are about 40% higher than logic process threshold voltages. It is possible to dope different transistors different amounts, but this increases the process complexity.
On-chip interconnections. DRAM designs are very regular and involve lots of parallel wires with relatively little crossing over. Logic designs require much more complexity. As a result, DRAM processes do not support as many metal layers as logic processes. The surface of a DRAM is also very bumpy due to the construction of the DRAM cells, limiting the number of metal layers that can be used. Logic designs are much flatter and planarization techniques are used (very fine polishing) to flatten (planarize) each layer before the next layer is built on top. DRAM processes generally support around 4 metal layers while logic processes support upwards of 7 or 8. Current logic state of the art is 13 - 14 metal layers.
Other issues. DRAM cell leakage must be kept very low to keep the charge in the cell capacitors. The capacitors must also be very area efficient, which is not easy to do with capacitors on silicon. DRAM processes use a rather specialized process to build the capacitors that is not available on regular logic processes.
TL;DR: DRAM processes produce slow logic, logic processes produce leaky DRAM. The main process differences are metal layer count, transistor doping, capacitor construction, and substrate biasing. |
H: STM32F4 Timer accuracy
I'm working with an STM32F4 Discovery board and I've come across a bit of unusual behavior that I'm hoping someone can explain the cause of to me. My goal is to configure a timer to trigger an interrupt at 100 Hz (i.e. 10 ms period). It's important for my project to have this value be as close to 10 ms as possible. My system clock is configured at 168 MHz, and the timer I'm using is clocked on the APB2 bus, which is clocked at 84 MHz, but since timers operate at double their bus's clock speed, my timer's clock is effectively also at 168 MHz.
To get my period of 10 ms, I would have to configure my prescaler and period values in the TIM_TimeBaseInitTypeDef struct to 16-bit integer values. The initial values I chose were 60000 for the prescaler, and 28 for the period. 168 MHz / 60K = 2800 Hz. Then setting my period to 28 should give me an update event at 100 Hz.
I'm fairly positive that my math checks out, however, when I measured out the time when my interrupt was firing, my period was something closer to 10.33 ms, rather than the expected 10 ms. After playing around with other settings, I decided to try and change the prescaler and period values to see if the timing settings changed. To my surprise, they did. For the period values that I did try, I plotted them out in this plot below:
Two main observations that I see:
1) Swapping the period for the prescaler and vice versa results in the same measured period
2) The closer the period and prescaler values are to each other, the closer the measured time is to the desired period.
Does anyone know why this is? It seems to me there's no difference between the pair (60000,28) and (1344,1250) in terms of calculating the period (i.e. they both multiply to 1680000)
Edit: I've added a link to my code here.
Edit2: I feel like the comments are deviating from my intended question. My issue isn't that I can't get a 10 ms period. My question is WHY setting the prescaler and period to values further apart from each other results in a less accurate period?
AI: As Tut was first to suggest, the observed error arrises from the fact that the total number of cycles in these dividers is one more than the value loaded into the corresponding register.
You took this into account in the prescaler register, but not in the period register.
When you apportion the net division equitably between the two stages, each has a moderately large value and so the effect of "off-by-one" is small.
But when you apportion the division unequally such that one value is only 28, the difference between 29 counts (28+1) vs the correct 28 (27+1) is responsible for the 1-part-in-28 error you see. |
H: Frequency bandwidth which transfers 95% of power of the signal
If I know total power of the signal and spectrum of the signal with amplitudes in dbV, how do I compute bandwidth, which transfers 95% of the power?
AI: You integrate the PSD (power spectral density) of the signal over various widths centered on the center of the channel until you get 95% of the total.
This can be done analytically for some signals, but must be determined empirically for others.
It's an interesting experiment to take the FFT of a signal to get it's PSD, truncate that spectrum to various bandwidths, and then perform the inverse FFT to see how the original waveform gets distorted — and for digital signals, what happens to the eye diagram. It can give you some real insight into what happens with real-world communications channels. |
H: How VGA monitor detects video resolution?
How VGA monitor detects video resolution. I'm asking this because with different VSYNC, HSYNC intervals it's possible to have different dot clock.
AI: VGA monitors have a small serial EEPROM embedded into their circuit boards. The chip (known in the business as an "EDID" (electronic device ID)) connects to two pins on the HD15 connector. These two pins operate as an I2C bus that permits the driver software to query the monitor and find out what range of VGA picture resolution that the monitor supports.
The intended scheme is that the driver software on the host computer side will allow selection of a video resolution that is supported by the monitor. Once the monitor gets a video signal it has the capability of inferring the operating resolution by counting dot clocks per HSync and number of HSyncs per VSync. Once the operating resolution is inferred the monitor will switch itself to the best known method for itself to display that video mode.
Older monitors, back in the days of "MultiSync" CRT style monitors, may have only supported a couple of video resolutions. In some cases the video mode detect may have even been a simple R/C filter that could detect changes in the HSYNC frequency.
Newer monitors, including the plethora of LCD screens in use now, all have digital controllers in them that have built in circuits to detect video resolution. Most assuredly done by counting the pixels per line and/or lines per frame. |
H: Why use STM32 HSE?
Why do we use an external oscillator for STM32???
Why not just use the microchip oscillator?
I am using STM32F2xx it clocks at 120Mhz
But, an external oscillator of 12Mhz is latch into the microchip, why use the external clock?
AI: They are more accurate over a wider temperature range, they have far less jitter (cycle by cycle timing precision) and in general are more accurate to within very good tolerances of the required frequency. If you then are multiplying this reference by many times to get the final clock speed in your processor, any error or inaccuracy of the clock source would be multiplied too, possible giving huge offsets in real vs intended frequencies and larger than acceptable clock jitter during time sensitive things such as high speed synchronous communications or asychronous with timeouts.
External crystals (usually Quartz) or resonators (usually ceramic, have less awesome tolerances but are still better than internal RC oscillators) are quite cheap and can have very small footprints like the Murata Ceralock series ceramic resonators that I often use for my Atmel AVRs and even my Atmel Cortex M3 (to get 64 Mhz from 16 is annoying by the way, when you have to also get 48Mhz for USB!).
As a side note, I found that 12Mhz is a much nicer crystal/resonator frequency for USB (just x4) and for most clock speeds (like, 120Mhz is just x10), and I see it often on ARM based boards reference designs these days. |
H: using C libraries inside verilog
I'm implementing a radio in Verilog. the time taken for bit reversal while computing the FFT is more. it is almost equal to a symbol time (OFDM system). Can I use a FFT library in C, which can be integrated to the code, to speed up my simulation?
If so, can these codes be used for an FPGA in real time?
AI: Well, you might be able to do it for accelerating your simulation, but it is not possible to synthesize this and put it on an FPGA. Verilog code is a hardware description language that describes the functionality and interconnections of your design. It is not executed like a program, it is synthesized into the equivalent of a schematic diagram.
You could run your FFT algorithm on a CPU that's written in verilog, but that rather defeats the purpose of using an FPGA if you need a very fast FFT. However, there are FFT cores available, so you should not have to reinvent the wheel. I believe the Xilinx core generator can generate one, or you can use one from a site like opencores.org.
By the way, bit reversal, if I understand what you mean by that, should be a trivial operation on an FPGA if it's implemented correctly. |
H: MCU Performance: running with emulator vs running without emulator
If I connect to my MCU with its SWD emulator/debugger, is there ANY difference in performance/behavior as compared to when I run the MCU without the emulator?
EDIT:
I am using a freescale KL25z Cortex M0+ with Arm GCC compiler on Eclipse. I am running at full speed.
AI: In a word, yes.
As a rule of thumb, a debugger will slow down the target chip. The more expensive real time debugger/ICE tools reduce this but you will still get a measurable slow down.
The slow down is typically because the debugger sticks extra code into your program for breakpoints, RAM monitoring etc.
How much slow down is rather a "how long is a piece of string" question. Your best bet is to measure it.
.
Word to the wise
Always test your code comprehensively without a debugger. It is entirely possible to write embedded code that only works when the debugger is plugged in (the debugger slow down fixes timing issues inadvertently). |
H: Usage of complex filters in communication
In the last stage of a communication transmitter, at the front end a filter is used to eliminate unwanted signals from other frequencies. As far as I read in literature, are these filters "real" filters? Why can't we use a complex filter in communications?
If the answer is no, can you give me an application where complex filters are used ? (In signal processing).
AI: Any electromagnetic signal is real-valued, and hardware filters thus have real inputs and outputs, so their transfer function must be real-valued as well.
In principle it would be possible to build a complex-valued hardware filter, by creating two filters and using one of the outputs as I and the other as Q signal, however this is useful only with a complex input, requiring you to build four filters (I->I, I->Q, Q->I, Q->Q), one adder (for the Q outputs) and one subtractor (for the I outputs), which is difficult to do in hardware.
Thus, you can see complex-valued filters in digital signal processing mostly.
Complex filters are useful if you need an asymmetric frequency response.
In digital communication, many transceivers are built using the direct conversion paradigm for cost reasons, which leaves the (complex-valued) signal centered around 0 Hz.
Filtering that signal does not require an asymmetric transfer function, so the complex signal is passed through a real-valued filter, using two separate filters with the same transfer function.
There are a few use cases for complex-valued filters on complex-valued signals, but these are usually few and far between, so you stumble over them seldom. |
H: What is PWM Dead Band and when should I use it?
I'm having trouble understanding this concept, here is what the documentation in my microcontroller says about it:
dead bands are defined as the number of PWM clock ticks from the
rising or falling edge of the generator’s OutA signal.
Google gives me this diagram, which helps a bit:
However, I can't see a purpose of doing this. What does it achieve?
AI: When you have an H-bridge it's really nice (as in it prevents fireworks) to have the high side turn off before the low side turns on, and vice versa. The dead time allows sufficient time for "break before make". Without dead time your bridge (or half bridge) can experience something called "shoot through" that is essentially a short across the rails (perhaps they're rectified mains at 400VDC through two transistors in series). At best, this causes unnecessary heating in the output stage, at worst, catastrophic failure.
Lots more at this site. |
H: Controlling speaker that has 4 interconnected pins
I am fairly new to and interested in electronic engineering. I want to control a speaker I found in an Xbox 360 headset with my Arduino, but I dont know how. Other small speakers I own all have 2 pins, + and -. But this speaker has 4 pins which are all interconnected. Image of the speaker:
Can someone tell me how this speaker works, or put me on the right track?
AI: It looks like the left hand pair are connected together and ditto the right hand pair: -
I've shown red lines where I believe copper exists joining pairs of connections. You should use a meter to confirm this or, with an amplifier output fed via 100 ohms to protect it from shorting, experiment with which connection produces sound from the speaker. |
H: Direct cache vs. associative cache
Trying to solve this problem where direct cache would outperform associative:
Propose you have a cache with a line size of L 32-bit words, S number of sets, W ways, and addresses are made up of A bits. Assume that the cache is word addressed, i.e., the low two bits of the address are always 0.
Come up with a sequence of addresses for a MIPS processor for which a direct-mapped cache of size 16 words, line size 4 words, outperforms a fully-associative cache with the same line size, using LRU replacement.
What I've gathered:
Direct Mapped Cache means that a block of memory is mapped directly to line of cache
MIPS uses Fetch, Decode, Execute, Encode, Memory (this might be irrelevant here)
LRU replacement - Oldest Used is replaced
Word are least significant bits which represent the address from main memory
Cache structure:
Tag | Line | Word
Word represents least significant bits
Tag represents the unique identifier for that
Size 16 words would be 2^4 bytes
number of lines would be cache capacity / line size = ? / 2^4
I'm not sure how to draft this cache. If we have 16 words, 4 per line it would that would mean 4 total rows. I don't expect a full answer but an indication on how to draft the direct mapped cache and come up with a sequence would be greatly appreciated.
UPDATE:
I attached a picture with a cache that has 8 memory addresses mapped to 4 lines. . With this, a sequence of
1234567824136857
direct mapped: MMMMMMMMHHMMHHMM (4 Hits)
f. associative: MMMMMMMMMMMMMMMM (0 Hits)
However, I can't figure out how many lines there should be (16 words, line size 4 words). How many memory addresses will be mapped to how many lines in the cache? My image has 8 to 4. Do I need 16 addresses mapped to 4 lines in the cache?
AI: Don't get bogged down in irrelevant details about line sizes, CPU architectures, etc. The key question is, what conditions would cause a fully-associative cache to replace a line when a direct-mapped cache would not?
Take a trivial example: A pair of caches that contain just two lines each, and three addresses, A, B and C, that do not fall into the same lines in memory. But let's assume that B and C map to the same line in the direct-mapped cache.
Now, take the addressing sequence A, B, C, A, B, C, A, ...
The fully-associative cache will take a miss on every access, since it always replaces the oldest entry with the new entry.
However, the direct-mapped cache will load A just once, and then only suffer misses on B and C, since neither of those will replace A. |
H: Opamp Noise due to Source Resistance
I want to know total noise I am feeding into ADC and I have learnt about Opamp Noise and resistor noise thanks to this forum.
Now I want to know the contribution of resistor in my overall noise due to 'current noise' of Opamp and for that I need to find equivalent source resistance which I can just multiply with Current noise to get voltage noise (am I right) and also the equivalent feedback resistance through which this noise current is flowing to get voltage noise due to it.
I read somewhere that equivalent resistance in a wheatstone bridge is nothing but the value of a single resistor but only if all resistor are of same value and my case doesn't seem to fit the criteria, the wheatstone bridge I am using is SM5652 pressure sensor.
what will the equivalent source and feedback resistances in this case?
AI: A link to your opamps.
First I'm guessing the R of the pressure sensor is less than the 2k ohm you have in series.
If so you can mostly ignore the R of the sensor.
The opamp has very small current noise.. (see page 4.)
i-noise < 1 fA/rtHz, so even with 1 Meg of resistance that's still ~1nV/rtHz of voltage noise. (Just ignore the current noise.)
The voltage noise of that part (~80 nV/rtHz) seems high to me, but maybe that is typical for autozero (chopper stabilized?) opamps. Or perhaps someone else can recommend a better part.
Edit: about RC filters. Since you are filtering the input to ~1kHz (2k ohm and 0.1uF) you might as well do that on the output too. (bump up R13 and 14) |
H: DS3231 Module Circuit Teardown
I recently purchased a DS3231 RTC module to use in one of my prototypes. Now that it is complete I would like to integrate the RTC directly into my PCB instead of using a plug in module. To that effect I have been trying to figure out the circuit using continuity testing on the module and the recommended circuit in the DS3231 datasheet. I have figured out all of it, except 2 things.
There are 2 capacitors in parallel connected between VCC and GND. There are no marking on them so how do I figure out their value?
There is a diode - resistor (210 ohm) pair between VCC and ground. Can't figure out the use of these since they are not in the manufacture suggested circuit diagram as well.
Any help is appreciated !
Edit: The diode in question can be seen in this closeup picture at the bottom side of the RTC here
AI: Found it. As per the posts here and here, the diode/resistor are connected between VCC and VBAT (that was my bad, I though they were connected to GND). This apparently is used to trickle charge the module with LIR2032 rechargeable battery. So in my case, I can ignore it.
Thanks all for the help ! |
H: How do I analyze this circuit with diodes?
If diodes in this circuit are ideal diodes:
I'm making assumptions to solve this circuit for I and Vo but I have some questions:
1. What is the voltage at the cathode of the upper diode if the other two diodes are off (i.e. open circuit) ?
2. If all diodes are on (i.e. short circuit), then will the circuit look like a resistor with voltages 16 and 12 at its ends?
AI: As shown in the original post, the lower diodes can never be turned OFF because they'll never be reverse biased.
"Ideal" diodes can be likened to switches with zero resistance between the contacts when ON, and infinite resistance between the contacts when OFF.
Redrawing the circuit from that point of view, with perfect switches and with the original post's context allowing us to turn OFF the two bottom diodes, we have: |
H: We have 2 variants of device which differ only by battery. Shall we pass FCC separate FCC certification for every of them?
We developed a BT4LE device which is being shipped in two variants. They are the same except for battery variant.
Is it possible for us to pass one FCC certification so that it is valid for both device variants? Are there any items to be careful about?
AI: This falls under the topic of "permissive changes". The FCC has a document called PERMISSIVE CHANGE POLICY which outlines what can or cannot be changed without requiring a new FCC ID.
Under section 2 c). it says, "Part substitution – electrically identical parts may be substituted."
I would assume that the two batteries are the same voltage, but perhaps different capacities (mAh) or chemistries? For example, allowing for either rechargeable or non-rechargeable batteries in the same package (such as two AA's) shouldn't be a problem. However if the two battery variants are substantially different in size, it could be argued that would affect the RF performance of the device (since they have a metal casing) and require re-testing.
Your RF testing house may be able to give you some guidance on whether different size batteries would affect the results. |
H: Grid voltage swell and sag, what happens to harmonics?
I know that when a load draws too much power the voltage of the grid at the fundamental frequency begins to sag. Though my understanding is that loads can't use the power generated by harmonics, so does that mean the grid voltage will only sag at the fundamental frequency and the amplitude of the harmonics won't?
AI: No, it' doesn't. It depends on the characteristics of the load. If resitive, for example, then it presents the same impedance to all harmonics. Since the impedance of the electric transmission system generally goes up with frequency, a resistive load will actually reduce the harmonics more than the fundamental. |
H: Atmega32u4 not detected
I have made a Arduino Leonardo clone and have been trying to burn a bootloader into it.
I am still unable to connect to the Atmega32u4. It says "Unable to enter programming mode.
"Unable to enter programming mode.Please verify device selection, interface settings, target power and connections to the target device."
I have all the pins connected fine and I rechecked them. I had a chip before and it was detected. It was an Atmega32u4 with internal RC oscillator. The new one has an external one. So I think its this crystal thats messing things up. I placed a probe on the crystal and it shows a dc level of 1V. Shld it not show 5V pure sine wave. As far as I know a crystal and 2 balancing capacitors are sufficient for such circuits. I feel the balancing capacitors (18pF) are making it misbehave.
Also, do I need a working crystal to detect the controller via the AVR ISP.
The Vcc and GND pins are as shown in image
The reset pin has a 10K pull up and 100nF cap. These are not so close to the reset pin. But, I dont think it can cause any disruption.
I strongly suspect that the crystal is the culprit here.
The programming header is as shown in 2nd image
![Programming header2
I would apreciate any tips please. Now, the crystal I use is 535-10907-1-ND(digikey part). The Cl = 10pF. I calculate the C1 = C2 = 15pF. But I placed 18pF. But, can it cause such a drastic malfunction. Also, how is it possible to test a crystal. Is it a question of fuses.
AI: 18pF capacitors will cause the crystal to oscillate at slightly lower frequency, but shouldn't stop it from working. To check that it is oscillating you need a high impedance probe (eg. oscilloscope probe on x10 position) connected to pin 16 of the ATmega. You should see a sine wave with peak-to-peak amplitude of at least 2V.
If you just see a DC level of around 1~2V then the crystal is not oscillating, either because it is faulty or not connected. Are you sure that you have it orientated correctly? |
H: Where does radiated power come from?
I've had electromagnetism classes back in uni, but I'm having a hard time linking them with that matter:
Take a car antenna -which I assume is simply a wire, coiled or not-, and apply a voltage across it. The way I see it the current will only be limited by the resistance of the wire, which also means all the power is lost via Joule dissipation. Yet, electromagnetic waves are emitted, which represents radiated power (it has to be nonzero as we can capture it on the receiver end). So how can we account for that power in the power budget?
The underlying problem that made me realise this is: how can I calculate a rough estimate of the radiated power, or at least a maximum value, of the radiated power if I know how much electric power I put in? This is to make sure it won't disturb cellphones even though I'm pretty sure it won't - stepper square pulses, 28V 50W switched @ ~10kHz [rise time 500us], cables in single turn loop of ~15cm in diameter.
AI: How can I calculate a rough estimate of the radiated power, or at
least a maximum value, of the radiated power if I know how much
electric power I put in (assume an RLC circuit)?
If you use a resonant RLC circuit (basically a magnetic loop antenna) and you believe you know the value of R, you might still not get an accurate answer. This is because R is really hard to compute. It is it hard to compute because the electric and magnetic fields in the close vicinity of the loop antenna may be producing eddy currents and dielectric heating in things that are reasonably close by. How would you account for such things? It's still going to look like a real power loss and you just can't tell one power from another.
simulate this circuit – Schematic created using CircuitLab
In the close vicinity of the loop (or in fact any antenna used for EM transmission), the localized electric and magnetic fields are not sufficiently aligned to form an EM wave and those losses (I mentioned above) are just straight forward local power losses and nothing to do with the emission of an EM wave. |
H: EAGLE detecting error at Copper Trace intersecting Dimension Outline
The ARDUINO_MEGA part from the Sparkfun Eagle Library is used in my board design. However when performing a DRU check, it seems that there is an error where the top copper traces (red) intersects with the outline (Layer 20, DIMENSION, white) of the ARDUINO_MEGA part, as shown in the screenshot below.
Why is there an error?
AI: The problem is that SparkFun created the ARDUINO_MEGA device in the Eagle library with its own boarder using the Dimension layer. Eagle expects one single outline of your PCB using the Dimension layer. By including the ARDUINO_MEGA device in your design, you now have two independent board outlines in the same project.
In the DRC settings, one of the options defines the closest allowable distance between any copper and the board outline:
In this example, there must be a 15mil space between any copper on the board (traces, pours, vias, through holes) and the edge of the board. The "edge of the board" is defined by any lines in the Dimension layer. Obviously, if you intersect a line in the Dimension layer with a copper trace, you are violating this rule. Eagle isn't smart enough to realize that the outline of the ARDUINO_MEGA doesn't define the outline of your entire design. It just sees copper getting too close to a Dimension layer element and applies the DRC.
Here are two possible work-arounds:
Approve the error in the DRC and don't worry about it.
This is fine if you're making the PCB yourself or if you have a lot of control over the manufacturing process. However, if you're sending Gerber files to a board house or using a service like OSH Park, they may not like you having more than one complete outline in the Dimension layer.
Change which layer the outline of the ARDUINO_MEGA is in. I believe this is a better fix, as it "solves" the problem instead of sweeping it under the rug. First, open the SparkFun-Boards.lbr library in Eagle and click on the Package button.
Select the "ARDUINO_MEGA" package and open it. Click on the Change tool on the toolbar and select the Layer option. Choose another layer you want the outline of the ARDUINO_MEGA to be in. If you want its outline printed on your PCB with ink, use the tPlace layer. Otherwise, use the tDocu layer. Select each of the line segments that make up the board outline, save it, and exit the library. Once you're back on your board design, click on Library->Update All to make the changes take affect. Run the DRC again and the problem should go away. |
H: Redoing the factory calibration of LCD panels?
Is it possible to rewrite factory calibration of LCD panels? I am not talking about buying a Spyder 4 or X-Rite calibration device and generating a software lookup table at the OS, or graphics card levels but the actual internal calibration of the panel so I could say make the intensity response follow some curve other then a standard gamma curve. Do any LCD panel manufactures do custom calibrations on small orders (300 < X < 1000)? I know high end graphics monitors like those from Ezio, and NEC allow for custom intensity response curves but I am looking to use more of a tablet size high res LCD panel.
AI: On most LCD screens there is no calibration at all. As the background LED is manufactured by a one manufacturer, the LCD manufacturer (just the LED panel without back-light) is generated by another. Since the LCD manufacturer doesn't know which LEDs are going to be used, pre-calibration is impossible.
If you need exact colors it would be a good idea to purchase a panel with a built in driver that has some sort of color correction mechanism or you will have to write one yourself on the MCU/CPU side.
Even if you do find an LCD panel that has a built in driver that support calibration (3x4 matrix, 2D functions or even a 3D LUT engine) you should generate the calibration data with a colorimator (like x-rite or spyder). Doing this by the naked eye is quite hard (impossible??)
And one last thing, if it is a tablet you are after, both Android & iOS has color calibration support and they can be calibrated using a colorimator. |
H: Driving 48 LEDs with 1 Single Current Source
I need to drive 48 UV LEDs for UV paint curing system. (LED: 3.5V, 20mA)
I found a simple current source, modified it, set the current to 20mA. The voltage on 3 leds is 10.50V (3 x 3.5V, exactly what I need).
When I add another 3 LEDs in parallel to existing 3 (having 6 LEDs total), the current stays same but the voltage across each line drops slightly. When I finally have 18 LEDs (6 parallel lines), the current was still ~20mA but the voltage across each parallel line dropped to 9.5V. Somehow it must be okey for the LEDs because they did not lose their brightness.
My questions;
When I finally add all 48 LEDs current source will keep the current at 20mA and the voltage will drop more. Will that drop on the voltage be OK for the LEDs?
Adding new LEDs does not change the current drawn from the power source, so is safe to drive 48 LEDs with one single current source or it will burn down things (LEDs, transistor or power supply) in long run?
simulate this circuit – Schematic created using CircuitLab
AI: You may think the LEDs are the same brightness as you add more strings in parallel, but the 20mA is actually splitting itself between all of the parallel strings. So each time you add another string of parallel LEDs, the 20mA is getting split even more and the brightness of all of the LEDs is going down a little.
The relationship between current and apparent brightness of an LED is complicated. It's not actually linear, which is probably why you don't think the LEDs are getting any less dim. But I promise they are.
There's another complication as well. LEDs have a negative temperature coefficient. As they heat up, their forward voltage drops. Due to manufacturing variability, one string of LEDs will inevitably drop its forward voltage a little more than the others, which will cause it to grab a larger chunk of the 20mA, which will cause it to heat up more, which further decreases its forward voltage, and so on. The end result is that one string will tend to "steal" most of the available current and appear brighter. The easiest way to prevent that is to put a small resistor in series with each string. Regular resistors have a positive temperature coefficient (their resistance increases with temperature), so that works to balance out the current in each parallel strings.
If you truly want 20mA going through every LED correctly, you will need to decrease the value of R2 to an appropriate size. For example, two strings of LEDs will require 40mA of current. So R2 will need to be half the value. Four strings will require R2 to be one quarter the value. And so on.
By the way, the resistor value of R2 should be 35 Ohm, not 25 Ohm. I got this by taking the voltage that the base of Q1 will start to conduct (0.7V) and calculated the resistance that will result in 20mA at that voltage: $$\frac{0.7V}{20mA}=35 Ohm$$
Your equation for R2 based on the number of LED strings (to maintain 20mA for each string) is:
$$R2=\frac{0.7}{n*20mA}$$
where n is the number of LED strings. |
H: AVR SRAM limitation
I'm just an enthusiast looking for some advice.
I'd like to use a microcontroller to read frames from a camera and write those frames to a small LCD screen. The camera and screen are on the same SPI bus. I've been prototyping with an Arduino but I'd like to move to an AVR eventually.
Problem is, an image frame is 9600 bytes and the Arduino SRAM is 2.5KB. I can't buffer a whole frame. I tried reading from camera and writing to the screen a few lines at a time, but because they are on the same SPI bus, I need to de-assert the camera, assert the screen, and then re-assert the camera. If you de-assert the camera mid-frame you lose sync.
I need to figure out a way to get 9600 bytes from camera to screen without de-asserting the camera. Seems like I have 2 options: Increase SRAM to buffer a frame or separate SPI busses.
Increase SRAM:
Change AVRs - The only ATmega with enough SRAM is ATmega1284 and it's got 44 pins.
External SRAM? Never worked with it.
Separate SPI busses:
Move screen from hardware SPI to regular pins and write software SPI. (I doubt this would be fast enough.
Looks like there are several ATtinys and ATmegas with 2 or more SPI busses. Some as small as 20 pins. This would still delay the reading of single frames, but hopefully not too much.
Something... else?
FPGA? Never worked with them...
Some other type of microcontroller?
Thanks!
AI: Something else (sort of):
Several of the ATmega devices can reconfigure their USART(s) to act as a SPI master. Simply connect one of the devices to one of these reconfigured peripherals. Look for "USART in SPI Mode" or "MSPIM" in the datasheet. |
H: Low voltage audio amplifier clips on 8 ohm loads
Exposition time:
One could call me a freshman in electronics and I just designed my first little audio amplifier for headphones. (Pocket design, I want to be able to drive 4 headphone pairs from a single source)
Here's the schematic, so you guys know what I'm talking about:
(Without power supply (9V bat) and single channel)
Ofc, 4 headphones draw a lot of current, which is why I need a proper output stage. Up to 200mA to be precise.
The current design I made uses 2N5551 and 2N5401 transistors but their DC current gain is horrible (<10) which causes the OPA to overdrive. I don't want to much load on the OPA as well (max 20mA). A higher input voltage is out of question.
Therefor I need better output transistors (Q3 & Q4) which provide a higher current gain but also are capable of switching fast enough for audio signals. They should be cheap and small. I don't know that much components and the market out there is just a jungle of different parts.
The question:
Is it possible to compensate for the clipping with different output transistors? The circuit behaves great on 32 ohm but a lower load impedance wrecks it.
I'm also open for darlington array solutions.
*EDIT: I can't use SMD parts. I need through hole packages.
**EDIT: Juuuust figured! This OPA is not even able to supply 20mA, because R9 & R17 are to large. In that case, a darlington setup with the current transistors could work, I just have to lower those resistors. Will keep you guys updated. ;)
Solution:
There's more than one solution to this problem:
Use a different OP amp which can drive the transistors rail to rail (see accepted answer). This only works if the 2N5551 and 2N5401 output transistors are configured in a darlington setup. However, the OPA used in this circuit almost drives rail to rail, already. (+-4V on the output)
Other output transistors with a better gain. 8550 (PNP) and 8050 (NPN) behave greatly for this application, they still need a darlington setup, though. (Special thanks to Spehro Pefhany)
Increase the supply voltage. This works like a treat, IF you're actually able to do so. Sadly, I am not in my setup.
Replace the output stage with a "diamond buffer circuit". It performs well in the simulation, did not test it on the bread board, yet. But it's nature of a voltage follower driving the push/pull transistors decreases the total swing of the op-amp, which results in better slew rates and therefor also frequency response of the circuit. Thanks to ioplex for adding this in.
My Solution:
I kept the OPA and used a darlington setup on the output. On my previous tests I forgot to modify the voltage divider to adjust the offset voltage between both transistors. I fixed that and now the circuit works. No clipping even on the worst input signals, that's what I wanted. Tests with my bench supply show that it actually operates down to +-3V which is great if you consider the voltage drop on the battery as it decharges over time. This is just the first design, I will change some things in the future. It is pretty clear that this is not the best setup and that I'm not using the best components for it. Design goals, however, were low component costs and supply voltage. And these are met with a decent performance of the circuit. It does sound gorgeous, feel free to try it yourself! :)
Thanks to everyone for the help I learned a lot through this project.
Here is the new schematic (2N5550 is a 2N5551):
PS: What's no in this schematic is the compensation cap on the COMP - COMP/BAL pins of this particular op-amp. It's 47pF but LT-Spice has no proper symbol for the NE5534P.
AI: The problem in your design isn't the output transistors and neither will this be solved by using darlingtons - in fact the problem will become worse with darlingtons. Look at the spec of the NE5534 and read the section about maximum output voltage swing.
On page 5 it tells you that the max swing might be as low as 24V on a +/-15 volts supply i.e. a 30V supply only guarantees an unclipped output swing of 24 volts p-p - that means the internal transistors in the device "lose" 3 V top and bottom. This doesn't magically improve on a lower supply and you should expect, on a 9V supply, to generate a maximum output swing of 3 volts peak to peak.
OK, if you used the typical spec of the NE5534 this might rise to 5 volts p-p.
This is then compounded by the push pull stage - it's an emitter follower push pull stage and it's output will "lose" between 0.6volts and 1 volts per transistor depending on your load.
This leaves you with a crappy 1volt to 3.8 volts p-p being fed to your headphones before clipping takes place. If you use darlingtons, they "lose" double what a regular transistor loses so this will be even worse.
Recommendation - use a rail-to-rail output op-amp. There are plenty around these days and they'll probably only drop about 100mV per rail. |
H: Slopes of band-pass op-amp
I have the following double band-pass op-amp. The cut-off frequencies are 34 and 50kHz.
How can I calculate the slope of the gains around the cut-off frequencies? I want to know at which frequency I have -3dB.
AI: It looks like the upper (low pass) 3dB point for 1 of the cascaded filters is 50kHz based on the values R = 47k and C = 68p. In fact it works out at 49.798 kHz. For the same reasoning, the lower (high pass) 3dB point will be 33.863kHz. However, there is a problem. Take a look at this frequency response for a normalized LPF: -
Clearly, the 3dB point is at F = 1 (or 50kHz in your example) but at the lower cut-off frequency (shown as a grey vertical line at about F = 0.6 (or 30kHz in your example) there is still some attenuation of about 1.5dB and at 34kHz the attenuation will be about 2dB.
This means that what you thought were your 3dB points for just one of your cascaded circuits are in fact the 5dB points. Both parts of one filter interact with each other and muddy the waters so you have to go back to basics and re-evaluate what you want.
I would suggest going for two 2nd order filters; one a low pass and one a high pass. Take a look at the roll-off for a normalized 2nd order LPF: -
If you pick the value of Q correctly you can ensure that the lower (HP) 3dB point is largely unaffected by the upper 3dB point. Now you can design a two stage cascaded filter that comprises a 2nd order LPF and an independant 2nd order HPF. The formulas for each independant stage are "carved in stone" and ditto the 3dB points. There will be hardly any interaction of upper 3dB point and lower 3dB BY DESIGN!
Here is a link to a 2nd order (sallen key) low pass filter design tool.
Also check the same site out for a high pass sallen key filter too. |
H: How light strike works?
I am new here and I don't know if I have chosen right stackexchange but anyway.
I am making a little toy, just for educational purpose. I would like to understand how light strike works. It is a gun which lights some light, sensor somehow detects it and count the points.
I am wondering because it works even in day light.
It is similar to Laser Tag, which I understand, because you must be in dark place and you "shoot" laser beams. But how come that Light Strike doesn't shoot direct light. Is it some radio wave?
Even if you can't answer the question, don't you have any advice how to shoot something what can be received by some sensor?
AI: It is similar to Laser Tag, which I understand, because you must be in
dark place and you "shoot" laser beams. But how come that Light Strike
doesn't shoot direct light. Is it some radio wave?
James Clerk Maxwell in the 1800s basically proved that light and radio waves are exactly the same thing. Just thought I'd get that out of the way first.
More than likely it uses a low power infra red (invisible) laser and the laser will be modulated with a signal that makes it instantly recognizable from changes in ambient lighting conditions.
Using a laser ensures a tight beam is "fired" at the target.
The sensor(s) will be an IR detector (likely) with an amplifier and decoder (for the modulation) and upon decoding the signal it will advance points on some scoreboard or other. |
H: Is it possible to limit IR led so sensor detects it only if you aim at it?
I will have IR led and IR sensor as in TV. As you know, even if you don't point at the TV you are able to change channels.
My question is, is it possible to limit it somehow (maybe by putting the LED into some hollow cylinder)?
AI: I repair guns for a system called "Battle Sports". That employs an infra-red emitter combined with a couple of white LEDs in the gun:
That module is placed at one end of a plastic tube, about 6 inches long. At the other end of the tube is a lens. The lens is specifically shaped, and placed, so that the light from the module is focused into a roughly parallel beam. That translates to the white light forming a spot a couple of inches across (used to aim with), and the IR light covering roughly the same area.
The IR is modulated at 56KHz, with a pulsed on/off signal to identify that it's a proper gun that's in use.
The gun also has an IR receiver module on it, as well as a pair of receivers that the user wears on a headband. These are a simple amplifier / filter arrangement that just returns the pulses without the 56KHz modulation. They are domed, with a full 360° / 180° range on them, so they can be shot from any angle. |
H: IC for 4 Kbytes of RAM
Is there a Memory IC for 4Kbytes of RAM? I'm trying to make a schematic capture in Proteus and I need a Memory IC for 4Kbytes of RAM, I've searched throughout the library and I can't find one, tried searching for a 32Kbit one too..
It's for an assignment from my lecturer, and he specifically instructed to add 4 Kbytes of external RAM to a AT89C51 Microcontroller.
AI: Tricky. Most of them would be about 25 years old by now, and capacities mostly went straight from 2 kbytes (e.g HM6116) to 8 kbytes (HM6164)
I'd go for 8 kbytes... Similar parts are just still available e.g. Cypress CY6264 If 8k is not permitted, wire the highest address bit to '0' and keep quiet about it... |
H: LM317, basic voltage regulator, why does it get hot when not connected?
I have built this little voltage regulator circuit: circuit diagram
I am a hobbyist, so these may well be screamingly obvious questions. I ask because I haven't found the answer to my first question.
Why does the LM317 get hot even when current is not being drawn, ie when the ends are not connected? (To my intuition it would only get as hot as current that it is 'choking' to reduce the voltage, but if there is no current there is nothing bring down. Where does this evergy come from?)
Why are the two capacitors used in this circuit, it works fine without them? (I know this is a simple question so the technical term for it or alink would totally suffice)
Much appreciated!
AI: Not exactly 'hot', but if you fed (say) 30V into that circuit and set the output to 1.25V, the regulator would be dissipating about 150mW with the output disconnected. That's because the 240\$\Omega\$ resistor draws about 5.2mA from the output, and the regulator must dissipate (Vin - Vout) * 5.2mA even with the output disconnected.
A TO-220 has a thermal resistance of about 80°C/W so it would get noticeably warm.
It's not optional, BTW, to draw that much current. The LM317 needs some current internally to work, and if you don't draw a minimum current of around 5mA the output could go out of regulation (rise above the desired voltage).
P.S. If you use a 24.0 Ohm resistor (don't laugh, I've seen it happen, the markings or the color code is 2 4 0) the regulator would get hot. |
H: About a solar cell phone charger
I recently made a solar charger. The output energy of solar cell is 2 Watts. The voltage is around 20 volts.
I used 7805 IC voltage regulator so i could get around 5V.
I used a female USB and connected it to solar panel adding leds to prevent the back flow of current .
Now my questions are :
Why do we use capacitors ?
--I believe we use capacitors for storing charge and what is the purpose of using it?
Why do we use resistors ?
--Resistor consumes energy than why we are using it?
Is it a good to use 7095 IC Voltage regulator?-- is there better option ?
What about mAh ? Can it destroy the mobile cell? How much mAh do solar cell give?
Is it good to make solar cell mobile phone charger using that solar panel??
I learned to make such things from youtube and i am asking these queries that striked on my mind while watching it.
AI: Capacitors can be used to store energy, but their capability to store energy opens up doors for other functions. Capacitors can be used to stabilize circuits, be used for timing, for feedback phase shift, etc.
Resistors do consume some energy, because of released heat. Besides that, resistors mainly limit the amount of current (the number of electrons flowing). If too much current is allowed to flow, then this can harm electronic components or generate heat.
Any voltage regulator will work, as long as that regulator can handle the amount of current flowing through it. Before you buy a regulator, look at the reviews, they tell you if the regulator is good quality or not.
This solar panel should work. Mobile devices pull only as much current as they need. This means you should not have to worry about frying your phone. Just make sure that the voltage that your circuit is giving you phone is the correct amount. Most phones take 5V to charge. Your voltage regulator needs to be a 5V regulator. I believe your regulator is 5V.
By mah, I believe you are talking about Mili-Amp Hours. This is simply a method of measuring how much a battery can store. If you have a 5000mAh battery, this means that this battery can give 5000 Mili-Amps for an Hour before the battery dies. Mili-Amps is a measurement for current.
I recommend that you look into Ohms law, which is V=IR (V is voltage, I is current, and R is resistance). That will explain to you how Voltage, Current, and Resistance are all related. You can think of voltage as electrical pressure. Current is the amount of electrons that are flowing. Resistance is trying to stop the current. The voltage pushes the current, and resistance tries to stop the current.
Hope this helps. |
H: Can an LC tank circuit alone produce oscillations?
The circuit below is the Hartley oscillator circuit. I simulated it in Multisim to understand exactly how oscillations occur.
While doing so I just separated the tank circuit (from transistor base and collector) then applied 12V DC voltage across it (across tank as shown below). Now also the tank circuit is producing oscillations (even without the transistor).
What I expected from the tank circuit is different (I thought oscillations would not occur), but it produced sinusoidal oscillations.
Explain me how it is possible? (I know about resonance but I'm unable to match it with what I see because I thought resonance occurs only when AC is applied -- correct me if I am wrong)
Can I reproduce that tank circuit practically? If not, why?
Please, explain to me how to look intuitively at it.
(This is not my homework, if my way of asking this question appears like that, it is only because of my English).
Here is my circuit:
AI: I thought oscillations will not occur
Think of an LC tuned circuit as a pendulum. At rest it produces no oscillations but if you push it a bit it will swing back and forth at its resonant frequency no matter how small or big in amplitude the swing is. Pushing the pendulum is the same as applying a voltage or current step to the LC.
Please explain me how to look intuitively at it.
Hopefully I've done that. If not, regard an LC circuit like a metal-rule placed on the edge of a table. If you hit it it oscillates but dies down because of air resistance and friction losses. |
H: Resistors in series or one after?
I want to use a Voltage divider and i need to divide 5v to ~3.3 so I ordered 10K resistors on eBay, but the voltage divider needs a 20K and a 10K, can i use 2 10K's parralel as a 20K
AI: Creating a 3.3 V voltage potential output from a 5 V voltage source using 10K resistors could be done using the following diagram of a simple voltage divider, using the following equation.
\$ V_{out} = V_{1} \cdot \frac{R_2 + R_3}{R_1 + R_2 + R_3} = 5 V \cdot \frac{20 k \Omega}{30 k \Omega} = 3.33 V \$
simulate this circuit – Schematic created using CircuitLab |
H: What frequency range is acceptable for a speaker in an audio amplifier
I am building an audio amplifier using a lm386 amplifier with a 12 volt supply driven from a headphone jack. I am looking for a speaker that will work well in this setup. Currently I am using a small speaker and their is a lot of distortion in the sound. I am looking at a speaker that is rated for 1 watt and has a frequency range of 180Hz ~ 10kHz. I was not sure if this would be good enough for a good sound quality when playing music. Please tell me if this would work with my setup. Here is the link to the speaker I am looking at http://www.digikey.com/product-detail/en/GF0771/GF0771-ND/304442
AI: Be careful with the power ratings of speakers. In the hifi community the power rating is not understood as a value where the speaker performs best. It's understood as a value which, if exceeded breaks the speaker or produces very bad sound results. When picking speakers, you usually multiply the power ratings by 3-4, just to be sure.
Before searching for speakers check your amplifiers total output power!
Regarding frequency:
10khz is not enough for a decent music quality. Low quality audio hardware ranges from 50HZ - 16khz.
Decent quality would be 18Hz to 20kHz.
Now, a single speaker usually does not perform well over such a wide range. That is why normal speakers are build of a tweeter (for high frequencies) and a woofer (for low frequencies). The woofer plays everything from 50-2khz, for example, the tweeter plays everything else. The signal is split with a high pass, for example.
There is a solution for that problem as well:
Look for a broad band speaker. They are usually ranged from 50Hz - 16kHz. They are not meant to play to loud, though.
One more thing: Keep in mind, that even if a speaker is rated as 180Hz ~ 10kHz it won't perform the same on all these frequencies. Some frequencies will be louder, others are choked. Check the frequency response diagram for the speaker if available.
Another solution:
Try finding PC speakers, somewhere. Maybe even old ones, people dump them everywhere, for no obvious reason. You might know someone who can give you a pair. |
H: 110v 220v do it work?
i bought hookah heater from amazon. this product link is http://www.amazon.com/Proctor-Silex-34101-Proctor-Silex-Burner/dp/B000690WNU/ref=sr_1_2?ie=UTF8&qid=1413662717&sr=8-2&keywords=hookah+heater
this product work on 110 v. But in my country all products works 220 volt. if i practice to work this product, what it will do ?
thanks..
AI: It will deliver 4000W of power instead 1000W.
But it won't do this for long. The heating element will melt and arc in a matter of minutes, the voltage will short circuit to protective earth and hopefully your circuit breaker or fuse will blow. |
H: How could this GPIO-controlled LED status blinker be improved?
I'm building a simple circuit to drive an LED status indicator in a project built around a RPi. The circuit takes its power from the same source as the RPi and is connected to one of the RPi GPIO pins. The aim is that the LED should start blinking when the system is powered on and continue to blink until the RPi system has finished booting, at which a process is launched to set the GPIO high, causing the LED to stop blinking and stay latched on.
I started with this circuit
(source: wild-bohemian.com)
Which I modified like so:
I've implemented a few circuits as designed by other people but this is the first I've attempted to design myself (ok, only a tiny part is mine, but hey). It does seem to work but I'm not confident that it is robust and I would appreciate any advice on how to do it better, or more simply.
One thing I've noticed when setting up on a breadboard is that if I just hold the wire that goes to the GPIO pin between my fingers - without attaching it - the LED latches on. I don't understand why. I'm not planning to put the circuit somewhere people can stick their fingers in but I would like to understand why it does this and if it is a symptom of a design flaw.
AI: Aside from the fact, that you could save parts but not money by using something like a ne555, it is an interesting circuit. But as you want some hints:
your third transitor will be in saturation, when activated. Depending on the type it may fail to lower the base voltage enough to prevent the right 2n3904 from conducting. If you want to be sure you should use an low VCEsat BJT. NXP and ONSEMI each have a special selection of those types. Then you may increase the resistors of your added voltage divider, but only to save some fractions of miliamperes.
So why does your circuit react to touching in this way? I bet your powersupply is causing this phenomenon. Either your RPi or the laptop connected to via usb or network is powered by a wallwart or brick PSU. Those devices tend to have a Y-capacitor between hot and cold on primary side. the middle pin is connected to ground on secondary side. This leads to the fact, that the ground of your RPi in fact has a voltage of half of your mains voltage relatively to earth. So if your mains voltage is 110V AC, your RPi's ground is at 55V AC. When you touch it, there will flow a small AC current through your body and the capacitance it forms with your environment. this current is now rectified by the base-emitter-diode in your transistor. It apparently is big enough to open up that transistor and stop the astable circuit from being astable. |
H: Can an electron carry only one charge?
Sorry if this has been asked before. Could also be a really basic question (new to electrical study).
I am a bit confused about the relationship between electrons and charges. So what I understand is this: (1) One coulomb of charge has 6.24 x 10^18 electrons and (2) an electron always carries one charge. Does that mean that ALWAYS for any given amount of electrons, there will be the same amount of charges? I am confused about this because the definition of coulombs interchange between electrons and charge. Some say it is 6.24x10^18 charge - some say it is electrons.
I am conceptually picturing in my head an electron "soldier". It carries a "charge". A soldier can only carry one charge. 6.24 x 10^18 "soldiers" equals one coulomb which simultaneously means the same number of charges (in essence, an electron is a charge carrier). Each soldier also carries food (stored potential energy) which is measured volts, which gets used up as the soldier goes on his/her journey.
So the question is - am I going in the right direction in terms of conceptually understanding charges, electrons and less importantly, voltage?
AI: Yes, every electron is negatively charged with \$-1.602 \cdot 10^{−19}\$ C, meaning that for an electric charge of -1 C it is required to have \$ 6.24 \cdot 10^{18}\$ electrons. Sometimes the term "unit charge" or "elementary charge" (often denoted as \$e\$) is used to refer to the electric charge of an electron \$-1.602 \cdot 10^{−19}\$ C
Your concept of soldiers carrying charges and food (but remember to feed your soldiers before they go on a journey) seems to be correct. However, an analogy which probably is more widely used is water. Flow of water droplets adds up a bit like the flow of electrons in an electric circuit, and laws like Ohms law, Kirchoffs current law and Kirchoffs voltage law are all easily translated.
A short description with animations of the water analogy may be found here |
H: Question on Logic circuit and Karnaugh Map
I got this question from a university site and thought of attempting it to test my knowledge in Logic circuits, Boolean alg and Karnaugh graph. Problem is, I have been scratching my what logic circuit is coming out; I am not able to translate this into a known Boolean Algebra.
The Question:
A vehicle seat belt circuit is such that the car should only start if the driver’s seat belt is
fastened and either the front passenger seat is unoccupied or the front passenger seat is
occupied and the passenger seat belt is fastened.
Obtain a truth table, boolean equation and Karnaugh graph.
I need help on the truth table.
Suppose:
A: Driver seat belt
B:Passenger seat occupied
C:Passenger Seat Belt
Considering A, B and C, I get this truth table, but see my comments below:
A B C B??C A AND(B??C)
--- --- --- ---- --------
0 0 0 1 0
0 0 1 1 0
0 1 0 0 0
0 1 1 1 0
1 0 0 1 1
1 0 1 1 1
1 1 0 0 0
1 1 1 1 1
When I consider B and C (Passenger seat occupancy and Passenger seat belt:
When there is no passenger, Passenger seat belt does not matter as long as driver seat belt on. these are represented by B??C. The problem is, I am not able to figure out what Boolean condition this is: AND, XOR, NOT, etc. This is what is making it difficult for me to produce the resulting Boolean Algebra for subsequent questions. Help.
AI: B !B C B??C
--- --- --- ----
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
Do you see it now? |
H: Make three respective LEDs blink with an LM3914 in dot mode
I'm trying to figure out how to make in the below schematic, LEDs D2, D3, and D4 blink respectively while the LM3914 is in dot mode when their on state occurs. Basically this would act like a warning indicating that you should recharge soon, and D1 would just be solid on when it's respective on state occurs (dot mode). I would like to do this with no 555 timer or micro controller either, using as few components as possible. Edit: I'm using a 10 segment LED bargraph.
AI: You can use the flashing bar display circuit shown in the LM3914 datasheet (figure 20). To have multiple flashing LEDs in dot mode you just have to add a diode between the timing capacitor and each output that you want to flash. |
H: How much current does a typical multimeter draw to measure resistance?
Assuming it's running on a 9V battery like most multimeters are, and the setting is on MegaOhms.
How much current will be drawn from the internal battery?
AI: Technically, voltage cannot be drawn because its a potential energy between 2 points like gravitational pull. Thus, when the multimeter probes is placed on the resistor, it would draw the full voltage of the battery, the thing that is drawn would be current which causes the galvanometer on the multimeter to deflect.
*edit
You could probably use another multimeter to measure the current draw by connecting it in series with the element you are measuring. |
H: Microcontroller circuit
I am using a Stellaris EK-LM4F120XL for a project.
The project includes an LCD module, servo motor, ultrasonic ranger and a numpad.
The LCD, servo and ranger are rated at 5V operating voltage, and the Stellaris at approx. 3.3V.
To have the project powered as a stand alone unit, I have a battery pack for 2x9V batteries. I will hook these in parallel to offer a longer running time. Then they will flow into a voltage-regulator, LM317, to provide 5V to the peripherals..
Then I will use this 5V source thru a non-inverting hex-buffer, CD4050BE, to then power the microcontroller.. I understand that no matter what voltage is input - the difference between Vcc and GND is output. Although, does that mean for a buffer you need to have a voltage-in, and a desired voltage-out - but also need to supply a Vcc voltage to maintain the desired output?
Therefore, if I have my 5V source from my regulator, do I really need to create circuitry using a resistor-divider or transistor voltage-drop, to get my 3.3V - then input this into the hex-buffer..? What a waste of current, no?
Why not utilise another voltage-regulator with voltage-divider resistors like I used to get my 5V..?
What about a single-channel linear-regulator - LP2950-N, of 3.3V variation..?
Or LM2936-3.3...?
Why use buffers at all then.. instead of regulators..?
I have diodes/resistors/PNP BJTs/opAmps on hand..
I am using transistors, BC548, to operate my 'loads' that are in parallel with diodes already.. And will ground everything to the same point - negative terminal of the powerpack..
To clear it up - I need 5V for all peripherals, and approx. 3.3V for the uController..
Cheers :-)
(I have circuit diagrams but cant add pics..?)
AI: The CD4050 is a digital logic buffer that can be used to shift signal levels from high to low voltage. It is not a voltage regulator - however you don't need one anyway because the EK-LM4F120XL already has an on-board 3.3V regulator. But perhaps what you are really worried about is the signal levels between your 3.3V MCU and 5V peripherals.
The LM4F120 has 5V tolerant I/O, so you needn't worry about blowing up its inputs. However its outputs can only go up 3.3V, which may not be high enough for devices that expect to see 5V. A standard CMOS logic gate powered by 5V could require a logic high level of least 3.5V for reliable operation (at 3.3V it might still work, but with greater propagation delay and lower noise immunity). Unfortunately that means that the CD4050 is not suitable for level shifting from 3.3V to 5V.
Most servos work fine with a 3.3V input signal, however the LCD display and ranger (and keypad?) might have problems. Check their data sheets to find out what logic levels they require. To level shift outputs from 3.3V to 5V You can use a buffer with TTL compatible inputs, eg. 74HCT4050 (note the 'T' which indicates TTL). If you are using a bidirectional bus such I2C then you may need special level translators that are designed to work in both directions at once. |
H: What effect does duty cycle have on solar maximum power point tracking (MPPT) (and other questions)?
I am building a solar MPPT tracker. First of all: what I understood from MPPT is that MPPT units transfer the maximum power available from a solar panel at that time to the load. This can be done by changing the duty cycle of the boost converter. My questions are, assuming my load is constant:
By changing the duty cycle what is happening (please explain from basics)
I heard that MPPT is effective only if the output load is variable - is that true?
How is the duty cycle changed? (please explain the algorithm)
What is the 'partial shading condition' and how is MPPT implemented in this effectively?
AI: The point of MPPT (maximum power point tracking) is to continuously adjust the load presented to the solar array for maximum possible power transfer. The output voltage from the solar array is affected by the current - if the current is too high, the voltage will drop and if the current is too low, then the voltage will saturate. This is represented by the I-V characteristic of the solar array, and it varies with temperature and illumination.
Basically, the way this works is the input resistance of the controller is adjusted such that the product of the voltage and current (power) drawn from the panels is the largest. The controller is generally configured in a similar manner to a buck DC to DC converter, and the duty cycle of the switching transistor is adjusted to change the current draw from the array. The voltage and current from the array are monitored by the controller, and the duty cycle (current draw) is adjusted to keep the efficiency high. According to https://en.wikipedia.org/wiki/Maximum_power_point_tracking , there seem to be several different methods of doing this. The simplest method is called 'perturb and observe', and the idea is to adjust the operating point slightly and then check to see if the new operating point is better or worse than the old one.
One possible problem with MPPT is that the output power will vary continuously, therefore it is necessary to have some sort of load-smoothing capability in order to fully utilize the power from the array. Generally this is done with a large battery bank. The batteries will be charged from the array with varying charge current as the power from the array fluctuates, ensuring that the maximum amount of power from the array can be captured.
Partial shading is where some parts of the solar array are in shade and as a result perform differently. MPPT controllers connected to the entire array cannot compensate for this, and the efficiency will suffer. MPPT controllers connected to individual panels can track the best power point on each panel individually and can compensate for partial shading to some degree. |
H: How many pulses are required to charge the capacitor to 20V?
A series of current pulses of 10mA amplitude and 2ms duration are applied to an initially-uncharged, 5 uF capacitor. How many pulses are required to charge the capacitor to 20V?
I thought of this formula:
\$V(t) = 1/C \int\limits_0^{t}idt + v_0\$
\$V(t) = \cfrac{1}{5 * 10^{-6}} \int\limits_0^{2 * 10^{-3}} 10 * 10^{-3}dt + 20\$
\$V(t) = 24 V \$
But then what? Note: The answer is 5 pulses.
AI: The relationship between charge, Q, voltage, V, and capacitance, C, is
\$ C = \frac{Q}{V} \$
To charge your \$ 5 \mu F\$ capacitor to 20 V you will need a charge of
\$ Q = C \cdot V = 5 \mu F \cdot 20 V = 0.0001 C \$
Current is defined as \$ Amps = \frac{Coulombs}{Seconds} \$, meaning that each of the pulses delivers a charge of
\$ Coulombs = Amps \cdot Seconds = 10 mA \cdot 2 ms = 0.00002 \frac{C}{pulse} \$
Thus we will need the following number of pulses
\$ n = \frac{0.0001 C}{0.00002 \frac{C}{pulse}} = 5 pulses \$ |
H: How do I know if a transformer will output A.C. Or DC?
I recently bought a small transformer to transform 230V AC mains to 7.2V DC to power a small IC and relay. I wired it all up, but as far as I can tell, the output is AC rather than the DC I expected.
Here is the data sheet for the transformer : http://www.mantech.co.za/datasheets/products/P58.pdf
I have the P01172
I can't see anything on that datasheet that specifies one way or the other. If I don't see anything specified, should I assume that it does not convert?
AI: I think you have been led astray by terminology. As others have noted, a transformer converts one AC voltage to another AC voltage level, while providing some electrical isolation. In your case, it converts 230V Ac to 7.3V AC.
What you may have been thinking of is a small power supply that sits in a plastic container and plugs straight into a wall. Some people call these "wall warts" and some call them... "transformers". Yes, they CONTAIN a transformer, but they also have rectifiers and (in the better ones) voltage regulators to give you a nice steady DC voltage.
If you want DC, add a good power diode to one of the output pins, then place a capacitor across the result. If you use a big capacitor, they have a polarity marking.
WARNING: You are now playing with circuitry powered by mains electricity! While 7.3V sounds tame, you have a 230V input, and that is DANGEROUS.
With that in mind:
Buy A Multimeter A decent one will have AC and DC voltage ranges. In fact, having one means you would have been able to answer your own question (AC or DC voltage present).
UNPLUG your stuff from mains if you can - it's a basic safety precaution. Put everything in an enclosure, to keep out curious children / pets / etc.
Electronic goods can be fun, but the mains isn't really the best place to start. You're trying to power something else - a chip and a relay. Whatever they do, you should be focusing more on that, than on mains power supplies as an introduction to electronic goods.
Maybe you know all about safety already. However, none of the other answers I saw addressed this point, and it's really not something we should "assume" everyone "just knows". |
H: How can they manufacture a high fara capacitor (1F, 100F)?
In the theory, the capacitance of a capacitor can be calculated by formulas
C = epsilon x A / d. And if we use this formula to calculate the area of a 1F capacitor(with d = 1m), the result of A is a very large number and not really. But in reality, I see they can make super fara capacitor such as 1F or even 100F. How can they do that ? What's special of these kind of capacitor ?
AI: You should try reading Wikipedia sometime. The answer to your question is right there in black-and-white:
Supercapacitors are constructed with two metal foils (current collectors), each coated with an electrode material such as activated carbon. The collectors serve as the power connection between the electrode material and the external terminals of the capacitor. Specifically to the electrode material is its very large surface area. In this example the activated carbon is electrochemically etched, so that the surface of the material is about a factor 100,000 larger than the smooth surface.
So the surface area for a given pair electrode dimensions is considerably larger than the size of the actual plate size. It's basically 3D. For example, take a 1m² sheet of tinfoil, then scrunch it up into a ball. Open it out again into a rough square of half the size it was. You still have a 1m² surface area, but it doesn't take up 1m² or your desk. |
H: Why does this circuit keep killing my 555 timers?
I have a 555 timer set up in a standard monostable oscillator configuration. Nothing fancy, no modifications whatsoever. I'm driving it with about 12V. If I trigger the 555 with the ground directly, everything works as planned. However. if I connect the collector of a transistor to pin 2, the emitter of that transistor to ground, and the base to a positive pulse, the 555 triggers, but then it quickly overheats and dies.
Of note, the circuit triggered by the number 3 pin is an RC circuit where C=940uf and R=10k, and when the timer switches off, pin 3 drains this fairly large capacitor. However, with a 9V battery, there's no overheating, and no dead chip. The overheating only happens with 12V, which I'm getting from a hobby power supply normally used for a train. My meter reads ~11.5V on the supply.
Why is my 555 chip overheating and burning out? Everything looks within specs, and it doesn't happen if I use a 9V battery.
AI: The overheating only happens with 12V, which I'm getting from a hobby
power supply normally used for a train. My meter reads ~11.5V on the
supply.
I have a suspicion that the sort of power supply used for a model tranin may be un-smoothed rectified DC. You meter reads 11.5 VDC but the peak voltage may be above the 18 volts specified as the maximum for the NE555DR.
If you used an electrolytic capacitor on the output of the power supply, you could check this fact out. My suspicion is that the DC voltage would rise to something above 18 volts.
The average value of a full wave rectified sinewave is 0.637 x peak value therefore, the peak value for an average of 11.5 volts is 18.05 volts.
It's worth checking. |
H: Working of resonance phenomenon
How does actually the resonance phenomenon help to receive AM signals in a receiver?
AI: A resonant circuit will amplify frequencies at (and closely around) the resonant frequency. It will also subdue frequencies that are not close to the resonant frequency. This means it can be used as a selective filter in a radio for tuning in to a particular radio station; it tunes-in the radio station with a voltage amplification of the signal and subdues radio stations that are not at that frequency.
It gives you selectivity: -
To understand how an LC tank circuit (most commonly used in radios) works might be best explained by an analogy. Think of a long stiff metal pole held at one end in a block of concrete and imagine hitting the rod - it will sway back and forth and gradually the swaying will decrease until all the energy has been lost. The initial energy put in was when you hit the rod and, this energy was stored in the springiness of the rod. The bigger the mass of the rod the slower the oscillations are and, the stiffer the rod the faster the oscillations are. This is governed, in mechanics by the "spring-mass formula: -
There is a more complicated formula for a cantilever but the basic spring-mass formula is: -
Frequency = \$\dfrac{1}{2\pi}\sqrt{\dfrac{k}{M}}\$
Where k is the spring constant and M is the mass.
So this is the analogy and if you've ever seen a mechanical resonance you'll know that a small vibration at the resonant frequency can result in a very large movement in the mass on the spring as it soaks up the energy and amplifies it. Disaster can result as per the Tacoma bridge in 1940: -
With an LC circuit disasters can be avoided but the formula for resonance and the resultant transfer function are pretty much the same: -
Frequency = \$\dfrac{1}{2\pi}\sqrt{\dfrac{1}{LC}}\$
Resonance whether mechanical or electrical is seen in this diagram: - |
H: How to measure DC Operating Point of a simple transistor circuit
Could someone explain to me how to find the DC Operating point of this circuit? I need to find it by running a simulation and probing the circuit, not solving for it mathematically, and I'm not sure how to do that.
I know it has to do with the intersection of the DC load line and the Ib line on a Vce vs. Ic graph, but I'm not sure how to simulate that. I can plot the base current, but I don't know how to get the DC load line on the graph to find the intersection.
Thanks in advance.
simulate this circuit – Schematic created using CircuitLab
AI: This seems to be an academic type of a question. So there are some undefined prerequisites.
Are the parameters of the NPN exactly known?
If yes, you only have to measure the voltage on Rc or Re. You then know the collector or emitter current and can calculate the base current.
As there is no small signal source in your circuit you have already gained the DC operating point.
There's one exception: If Vce derived from your measurements was very small (i.e below 2V), the BJT is probably in saturation. You then have to measure the base current separately, because current amplification doesn't work the normal way, then.
If the parameters aren't known, you have to measure Ib anyway. This can be done by measuring the Voltage on Rb1 or Rb2 and applying KCL.
However, without any signal source the DC operation point is always equal to the current state of this circuit. |
H: How to wire Mean Well RT-65D power supply?
I'm not very familiar with electronics. Especially I have never wired a 230 V power supply manually.
There is a Mean Well RT-65D power supply.
I have a rubber connector with open wires blue, brown and yellow-green.
And I have a consumer which needs 24 V.
My suggestion is (edited):
brown => Pin 1 (AC/L)
blue => Pin 2 (AC/N)
yellow-green => Pin 3 (FG)
consumer +24V => Pin 6 (DC OUTPUT +V2)
consumer GND => Pin 7 (DC OUTPUT COM)
Is that correct?
AI: You connection looksvcorrect though you should mention which country you are working in as different countries have different AC wires color codes |
H: Why does ST recommend 100 nF decoupling capacitors for a 72 MHz MCU? (And not 10 nF.)
I've been reading about decoupling capacitors, and I can't seem to understand why ST recommends 100 nF decoupling capacitors on a 72 MHz ARM microcontroller.
Usually 100 nF decoupling capacitors are only effective up to about 20-40 MHz due to resonance. I thought 10 nF decoupling caps were more suitable since their resonance is closer to 100 MHz.
(Obviously, it depends on the package and its inductance, but those are just ballpark values from what I've seen.)
According to the STM32F103 datasheet, ST recommends 100 nF capacitors on VDD and 10 nF on VDDA. Why is that? I would think I should use 10 nF on VDD too.
AI: Three things you should note:
1) Most bypass recommendations in datasheets and application notes are fairly random in my opinion. You may easily be a better engineer than the person who wrote the application note :-). A better datasheet would talk about how low an impedance you as a board designer should provide and to what frequency. I wrote about this here.
2) Most of the parasitic inductance comes from your mounting inductance (footprint and via length) and not the capacitor itself. This is why you would like a smaller package rather than a smaller value. This is also why you would want to get the vias close together and use closely coupled power/ground planes.
3) It's possible that the chip has some bypass as part of the package and die, but this should ideally be detailed in the datasheet before you can take advantage of it (back to my first point). If not (and this is likely), you can try to measure this yourself, like I show here.
You may want to use something like pdntool.com to select the best combination of bypass capacitors based on your impedance and frequency requirements. This method has worked reliably for many projects over the last 15+ years.
I excuse for plugging my own blog posts here, but it's just much faster for me to find the references I need that way. Feel free to ask more questions. |
H: Capacitance - Voltage characteristic diagram in a Schottky diode
I 've searched the web for that diagram with no satisfactory result. Does a schottky diode has capacitance or not because of very tiny depletion (almost none) zone ?
AI: Schottky diodes have pretty constant reverse capacitance with reverse voltage changes. There is usually only about a 2:1 change in C with quite large changes in Vr. I've used a BAT41 recently and this is the graph: -
I would also suggest that most commonly used schottky diodes do possess this graph in their respective data sheets so if you have one particular device in mind take a look.
EDIT - I just took a look at a few devices on Farnell and every device's data sheet had a graph of capacitance vs reverse voltage. |
H: Solid color display on VGA not working
I'm trying to get VGA working on my Altera DE0 board using Verilog, but haven't had much luck. It has the same pins as a normal VGA interface except red, green, and blue are all 4 bits each. Here is the logic I've been trying to use to get a solid color to display:
module solid_color (clk, vga_h_sync, vga_v_sync, R, G, B);
input clk;
output vga_h_sync;
output vga_v_sync;
output [3:0] R;
output [3:0] G;
output [3:0] B;
reg [9:0] CounterX;
reg [8:0] CounterY;
wire CounterXmaxed = (CounterX==767);
always @(posedge clk)
if(CounterXmaxed)
CounterX <= 0;
else
CounterX <= CounterX + 1;
always @(posedge clk)
if(CounterXmaxed)
CounterY <= CounterY + 1;
reg vga_HS, vga_VS;
always @(posedge clk)
begin
vga_HS <= (CounterX[9:4]==0); // active for 16 clocks
vga_VS <= (CounterY==0); // active for 768 clocks
end
assign vga_h_sync = ~vga_HS;
assign vga_v_sync = ~vga_VS;
assign R = 15;
assign G = 15;
assign B = 15;
endmodule
When I try running it, I just get a message on the monitor saying that this display mode is not supported.
This is adapted from http://www.fpga4fun.com/PongGame.html. However, this version claims to be designed for 640x480 displays whereas my monitor is 1280x1024. Is this the issue? If so, how would I adapt this to fit the increased monitor size? (the clock I'm using is 50 MHz)
EDIT: I added in a clock divider module as follows to change the initial clock signal to 25 MHz:
module divide_clock_by_two(in_clk, out_clk);
input in_clk;
output out_clk;
reg out_clk;
always @(posedge in_clk)
out_clk <= ~out_clk;
endmodule
However, the monitor now just shows a black screen, no message about an incorrect mode.
AI: Most VGA monitors will "calibrate out the DC offset" if you drive the RGB signals outside of the viewable area.
While it may not be your only or even most serious problem, this looks to be an issue in your implementation (you drive constants), so try adding logic to drive your color signals to black when outside the intended display rectangle. |
H: Turn a transistor on when any one of nine LEDs is on using an LM3914
I'm wanting to turn a transistor on when any LED from LED2 through LED10 are on with an LM3914 in dot mode.
Basically, I want the transistor to be normally off until at least LED2 begins to light (using dot mode). Edit: there is some confusion with the diodes D1,D2,D3, and the capacitor C1. This causes LEDs 2,3,and 4 to blink when their on state is triggered based on this answer here: Make three respective LEDs blink with an LM3914 in dot mode
The answer to my new question needs to let the transistor be a solid on and not turn on and off with these blinking LEDs 2-4 in the schematic below:
Here is a picture of the circuit I'll be using for the LM3914.
AI: This can be easily done with some logic gates (2 IC's):
I am using NAND's and AND's instead of OR's because the outputs of the LM3914 are active low. I found from another answer that the outputs are open-drain, so I added 100K resistors to all the inputs.
All inputs on the left come from the outputs of the correspondingly named LM3914 outputs.
If all LED's are off, the output of all three gates on the left will be enabled (NAND gate IC1A low, AND gates IC2A and IC2B high), and the output of the NAND gate (IC2A) will be low, keeping the transistor off.
If any LED is on, the output of its corresponding NAND or AND gate will be disabled, and the output of the NAND gate IC1C will be high, turning on the transistor.
There is a special case for LED2-4, which will be blinking. I added a diode D1, two resistors R11 and R12, and a capacitor C1 to form what is essentially a retriggerable one-shot. While any of the inputs to IC1A are cycling on and off, it keeps the input to the IC1C low and its output high, keeping the transistor on. IC1B is being used as an inverter, since the gate was spare.
This shows a simulation of the timer circuit using Circuit Lab. The input to the inverter is kept above the minimum logic high-level of 2v while the input is toggling:
I have not shown the power connections or other pin numbers, but they are available from any datasheet for the parts. You could also use other logic families, such as CD4000.
I realize it really looks like I should be using an OR gate instead of an AND. As mentioned earlier, it is all because the outputs of the LM3914 are active low. It turns out an AND gate is equivalent to an OR gate that has both inverted inputs and output:
Follow the truth table through for each gate if you don't believe me. So the inverted outputs of the LM3914 match up perfectly with the inverted inputs of the "OR", and the inverted output of the "OR" matches up perfectly with the inputs of the next OR. |
H: Measuring internal resistance of a battery while it's being charged
I was startled to hear that there are devices out there that can measure the internal resistance of batteries, in circuit, while the batteries are being (trickle-)charged.
For example, Hioki markets industrial IR meters for UPS batteries. The lowest range is 3 mΩ with a precision of 1 µΩ (!), and they claim you can measure the battery while it's online. I'm puzzled here - isn't the charging current going to interfere with your readings?
I can imagine that if you compare battery voltages with some small and large loads applied (e.g., 1A and 10A), you can estimate IR, but you won't get µΩ precision. But at least, at 10A, the trickle-charging current is probably insignificant and doesn't interfere a lot.
However, all manufacturers seem to use an AC testing method at 1 kHz (Hioki uses 150mA @1kHz at the lowest range). I'm not exactly sure what that means. Wikipedia suggests that these are simply ESR meters, but reading on how an ESR meter works, it can't be possible, since it starts with the assumption that the DUT is completely discharged.
So, my question is: what this AC testing method is, exactly, and how does it isolate the charging current out of the equation?
AI: The internal resistance of a battery can be determined with AC techniques. One method is to inject a current into the battery using a transformer and a decoupling capacitor to isolate the battery voltage from the transformer. Then the AC voltage across the battery is measured. The resistance is calculated by dividing this voltage by the driving current. A description of this method is given at http://www.cdtechno.com/pdf/ref/41_7271_0512.pdf. This is done with the battery being charged. |
H: Microcontroller self-shutdown with MAX682
I have read How to implement a soft power switch controllable by microcontroller? and am wondering if something similar would be possible with a MAX682.
What I want, is a device that is turned on by pressing a single button, and that turns itself off. I'm using a PIC16F88, but because my battery has 3.6V and I need to drive a 5V LCD, I'm using the MAX682 to step this up.
The problem is that according to the datasheet, the /SHDN pin of the MAX682 should be connected via a resistor to its input voltage. What I would suggest is using its output voltage as an input for /SHDN, like this (only relevant pins are shown):
simulate this circuit – Schematic created using CircuitLab
When the user wants to start the device up, he presses the button to activate the MAX682 and thus the PIC (R1 is required for the MAX682). The PIC is programmed so, that it directly puts high on P1. R2 and R3 form a voltage divider to make 3.6V (I didn't calculate them yet). R4 has then the same function as R1, and makes sure that the MAX682 keeps running. When the PIC wants to shut itself down, it pulls P1 to ground and the MAX682 shuts down.
Would this work, or would the MAX682 have problems if the /SHDN pin isn't connected to IN? And if it would work, could I also remove R4 and connect the 'output' of the voltage divider to the point between SW1 and R1, to save a resistor?
AI: I don't think there is a problem with \$\mathsf{\small \overline{\text{SHDN}}} \$ not being connected to IN, the voltage level just sets the operating frequency based on the current going into the pin.
If you want to get rid of the resistor R4, you will have to calculate the voltage divider resistors such that you get the desired current going into the \$\mathsf{\small \overline{\text{SHDN}}} \$ lead when the microcontroller is on.
Note: there will be a brief time when the switch is activated and the PIC is on, meaning the current going into \$\mathsf{\small \overline{\text{SHDN}}} \$ will double affecting the oscillator frequency because the resistance is cut in half. I don't see an easy way around that. But make sure the calculation of the resistance is such the two frequencies for R and R/2 are both within the range specified in the datasheet (50KHz - 2MHz).
I would add a fairly hefty capacitor (10 µF or more) to the line going from the MAX682 into the Vdd input of the PIC. This will even out any disturbances when the switch is release and the oscillator frequency changes. Also, don't forget 100 nF decoupling caps on all power inputs. |
H: Locking up a DC motor with constant supply a bad thing?
I am working on a little pen plotter project and for one of my motors (which supports the pen) I have used a small DC motor obtained from an old DVD drive. I have noticed that if I supply a constant 5V to this motor, it "locks up" when the pen comes into contact with the paper and stays there whilst keeping a slight pressure on the pen (perfect for the application), but I am now starting to think, is this a bad thing? If the DC motor has a constant supply to it and is held in the same position, should it be OK? It seems to be and isn't getting hot, so I just wanted to confirm.
AI: If you stall the motor and let it draw as much current as it wants, the motor will be dissipating more energy as heat. What happens next depends on the design of the motor.
Some motors can dissipate all of the heat when stalled. Such motor can stay stalled indefinitely.
Some motors can't dissipate all of the heat generated when it's stalled. The heat builds up, the temperature of the motor raises. That can lead to a permanent failure of the motor (possibly a fire too). For this reason, some of the motors have built-in thermal protection in the form of a bimetal strip or a fusible link. |
H: High-side switch for 5V load
I need to control a 5V 60mA load from an Arduino pin, but as the load has an output (tacho) that I will be reading from the Arduino, it seems I need to connect it as a high-side switch. What would be the best way to do it? I guess I need a P-MOSFET but would I need another NPN or N-MOSFET to control it?
(I have searched but mainly found ways to connect higher voltages, 12V or so... Couldn't find anything related directly to controlling 5V high-side, or couldn't understand it... noob in electronics).
An schematic would be great.
AI: You could use a P-channel MOSFET, as long as you choose a part that has a low gate-source threshold voltage so that it switches on with 5V. Then you don't need another driver to control it, either, as long as you're fine with the control signal being active-low. The schematic below has a 100Ω resistor on the gate just to be safe, but that's not strictly necessary.
You can also use a PNP transistor, which may be easier to find in a junk bin, or cheaper to buy anyway. Shown below is a circuit using the venerable TIP42C power transistor. A small and common 2N3906 could handle the 60mA, but it would have a collector-emitter voltage drop of around 0.2V at that current (which may be fine), but the TIP42C only drops about 0.05V.
simulate this circuit – Schematic created using CircuitLab |
H: How to calculate cache size?
A cache with a line size of L 32-bit words, S number of sets, W ways, and
addresses are made up of A bits. Assume that the cache is word addressed, i.e., the low two bits of the address are always 0.
If this is a direct-mapped cache of size 16 words, line size 4 words, what is the cache size in bytes? This number should include just the data portion of the cache
What is the total number of bytes required to store the tags?
This problem is very abstract for me, so helpful hints on calculating the cache size and tags would be apreciated.
If the words are 32 bits, and there are a total of 16 words, does that mean the cache size is 16 * 32 = 512 bits = 64 bytes (Question 1)? This would also be important to answer 2) the number of bytes required to store the tags.
AI: 1) If the cache is direct-mapped (i.e. 1 way) of 16 words, its size (excluding tags) is 16*4=64 bytes.
Line length does not matter.
2) There is a mismatch between "A address bits" and "tag size in Bytes"
Each tag contains :
A validity bit
The portion of addresses not indexed in the cache.
Usually some history bits for the various cache replacement algorithms (LRU, PLRU), used on multiways caches.
Each cache way size is (in bytes) : 4(bytes per word)*L(line size)*S(sets)
From the A address bits , you must place (A-ln2(L)-ln2(S)-2) address bits in the tags.
There is 1 tag per cache line. So there is W(ways) * S(sets) tags in your cache.
Even if question 2) is about the cache described in question 1), you cannot answer without knowing the number of address bits. |
H: If I connected N numbers of amplifiers each have X gain 'dB" and Y power "dBm", how to calculate total gain and power?
sorry for bad description, I am a beginner.
my question is just for knowledge and I did not test anything.
If I connect for example 3 amplifier , each one has 60 dB gain and 15 dBm power.
can we say simply total gain is 180 dB and total power is 15 dBm ?
or I am wrong ?
AI: The amplifier gain is the ratio of output power to input power. For example, a 20 dB power gain means that the output power will be 100 times the input power.
On the other hand, the power rating is the maximum output power the amplifier can handle. If that is 15 dBm, then the maximum output power is 32 mW (with a given distortion).
If you are connecting amplifiers in series, then the total gain (in dB) is the sum of all the individual gains. And you have to make sure that the signal level at the output of each amplifier does not exceed its power rating. |
H: OP amp output not changing ( schematics )
This is a image of most of part of my circuit (555 timer IC is cut from right side)...
using the pot (RV1) , I change the non inverting input voltages of the op amps. when non inverting exceeds inverting voltages of the op amps (which is different for different op amps) is should output 5V which should take BJT at saturation. Then current will flow from pin 7 to 6 in timer IC. But as you can see from the picture, though non inverting voltage is higher then inverting voltages output op amp voltage is still low.
why this is happening ??
again if I increase non inverting voltage a little from this value, LED start to blink (555 timer start operating) but still op amp output remain low .
**why this is happening ?
what can I do to made op amp work properly ??**
thanks
AI: The LM324 has an input common mode range of the negative rail up to two volts below the positive rail.
So with a five volt supply, you need to make sure your signals are in the 0-3 volt range for proper operation.
In no case should you apply a signal beyond the supply rails to the opamp's input, like 6.1 volts into a 5 volt-powered opamp. |
H: What is the advantage of a switching over a linear power supply?
I want to build my own switching power supply. I already know how to make a 10 Ampere Linear supply, and I'm wondering if I should bother. What do I have to learn to do a switching supply? What makes a switching supply better if they both end up giving me DC?
What I don't get is the "inefficiency" argument. Maybe linear supplies get hot, yes, but so does every laptop switching power supply I have met. Looking at a schematic of a switching power supply shows that it has at least 3 times more components; that means 3 times more work and cost to build a power supply. Why would I feed a circuit using an expensive switching power supply that gets hot and that ends up being more expensive than a linear one?
Don't both just end up giving me plain regulated and filtered DC power? I should be able to use either for every application shouldn't I?
Also, if i wanted to make 10A one, how or which component can manage 10 Amps in a switching supply? (Darlington arrays are used in linears)
AI: The answer to which one you use depends on the application, and the efficiency needs.
For example, you're asked to make a phone charging dock. The dock is powered via a 12 V wallwart, and powers the phone with 5V of power at 500mA. Using a linear regulator, 3.5W is dissipated.That's quite a bit of waste, but you're connected to the mains, and a charging dock is a big enough device, where a properly heat sunk regulator wouldn't cause a lot of heating issues.
On the flip side, suppose you're building a wearable device that operates on a small Li-Po battery, even if you designed a LDO circuit that only wastes about 1W of power, a switching circuit would be more desirable as if designed properly, you could reduce your wastage to <10% that of the linear regulator
Note: Pay attention to the efficiency curves of switching regulators. They normally only have high efficiency for small ranges of current usage, and it helps to understand what current usage your application operates on in different condition to design the most efficient power circuit. Also - laying out swtiching regulators on a PCB can be hit/miss - I've seen a lot of incidents where tiny layout issues can mess with the desired voltage out. |
H: 9v battery to parallel 3v LEDs - burnout
I'm having an issue in a simple (n00b) LED circuite - ended up burning out a couple of LEDs due to some mistake I'm making, but can't figure out what the error is.
I've got a 9v battery, trying to drive two blue LEDs (3.4-3.8v rated, 20mA) in parallel. I calculated necessary resistor as R = (9 - 3.4) / 0.04 = 140 ohms. To be on the safe side, I used a single 180 ohm resistor (brown/gray/brown/gold) in series (battery + to resistor; resistor - to + pole/anode of both LEDs; - pole/cathode of both LEDs back to battery) on a breadboard. Upon briefly connecting the 9V battery the first time, circuit lit; on 2nd connect, it stopped and I smelled distinct LED burnout smell - after which both LEDs would no longer light, even when connected individually to a 3v (2x AA) source.
Would appreciate any advise re: what I'm doing wrong. Thank you!
Thank you for the assistance - so in the circuit I'm considering with 9V battery powering three LEDs (details in my comment above), would the following be the way to go?
AI: What you have suffered from is what I term (I don't know if it's the real name for it) a cascade failure. From your description your circuit is like this:
simulate this circuit – Schematic created using CircuitLab
You have sized your resistor assuming a total of 40mA through a pair of 20mA LEDs. You have also assumed a forward voltage of precisely 3.4V.
If both your LEDs were absolutely exactly 3.4V forward voltage, then you would have a chance of that working, since the current would split evenly between them. However, that will most probably not be the case. Imagine what would happen in that circuit if one LED had just a 0.1V difference in the forward voltage drop? How much current would flow through each one?
Well, most of your 40mA would go through the one with the lower forward voltage. That would get far more than the 20mA limit it's designed for, and the other one would get next to nothing. Yes, they may both light up, but one would be much brighter, at least for a moment, before it burned out.
Now, LEDs normally initially burn out in a dead short. But that short soon overheats and fuses, so becomes an open circuit. So it's like not having that LED there at all. So now all your 40mA is getting pumped through the second LED. That's way too much for it to handle, so it then blows as well.
A cascade: one blowing causes the next to blow. If you had lots of LEDs in parallel like this and could slow down time (maybe with a very high speed camera) you'd see a distinct sequence of them blowing one by one in the order of their forward voltages (at least for the first few - as the currents got too high they'd just all go at once).
So what do you do? Simple - you treat each individual LED as a separate entity - calculate a resistor for each by itself. For this it'd simply be double the resistance, but twice over:
simulate this circuit
So now each branch of the circuit gets its own share of the current, and each branch decides for itself what current it needs - ~20mA each in this case. If one LED should blow the other branch is still, as an individual circuit, getting just the 20mA it needs.
To better illustrate what happens, I have drawn a pretty graph of LED current (note - this isn't a real LED diode graph, just some numbers I made up for illustrative purposes. A real LED graph would have much sharper curves, but it serves to demonstrate my point):
When you have a single resistor limiting to 40mA you're limiting the yellow line (I(tot)). At the point that's at 40mA, ~3.3V, the two LED currents I1 and I2 are very imbalanced - you can see one gets ~18mA, and the other ~24mA. The one with 24mA then blows. Now there's no blue and red lines, only the yellow line. I1 becomes 0, and I2 becomes I(tot). |
H: How does a Line Driver actually works?
So I've searched for days for information about the 74HC244 line driver. As always, the Datasheet provides raw and not very good information about the actual component :) (I mean, it gives us the temperatures, but not how the actual component works...)
Any way, there is very little information about Line Drivers in general. So, how do thy actually works? And how the 74244 can act as a line driver? All I see in the inner structure is enables and input to outpuut wires.
EDIT
I'm using the 74244 to connect between my Altera (FPGA) and a servo motor. I think that in order to reduce the current that the FPGA suplies to the servo, I need to put the 74244 in between them, thus reducing the "effort" from the Altera. Is that necessary? Or the Altera can provide a good current flow to the servo without damaging it's abilities?
AI: A line driver is simply a buffer. What you put in one end comes out the other. However, it is typically able to sink and source much more current than, say, a normal GPIO pin on an MCU.
The increased current is able to overcome the capacitance caused by having many devices on a bus.
You can think of it as the logic gate equivalent of an amplifier. |
H: sampling rate, data rate and bandwidth
I'm new to digital communication. How are the terms data rate and sampling rate related to the term "bandwidth" . Am I missing something here?.Can someone explain me in detail?
thanks in advance,
phani tej
AI: Data rate is the speed at which bytes (or chunks of data) are sent down a channel.
The bandwidth is how fast the bits that make up that data are transmitted.
Sampling rate is the frequency at which an incoming signal is read to measure its shape.
Take for example a typical 9600 baud serial connection.
The bandwidth is 9600 bits per second. Each byte, though, has extra bits with it (start, stop, parity, etc). So for a typical 8N1 format there's 10 bits used for every 8 bits sent.
So the data rate for 9600 baud would be 960 bytes per second.
The sampling rate would be the rate the receiver looks at the signal to see if it's a 1 or a 0 - typically at least 2x the bandwidth (see Nyquist-Shannon sampling theorem), so 19.2kHz. |
H: How to design a 500 khz sine wave generator?
I need to design a 500 khz sine wave generator. Could anyone help?
AI: If that is the only frequency you want you could probably design one from scratch. But Analog Devices offers a wide range of DDS generator chips which you can program in serial and will produce any frequency from 0Hz to 300MHz with a less that 1HZ resolution. (depending on the chip).
If you want to keep it simple you could use the AD9833, its only 10 pins and is easy to program with a PIC chip or similar. |
H: parameter that limits data rate in communication
In communication, the maximum data rate that can be achieved is given by Shannon as
C=B*log2(1+SNR) bits/sec. Supposing that I've a very high SNR and an infinite bandwidth, then
can data be transmitted at infinite rate? If no, then what are the conditions that limit my system to operate at a fixed rate.
thanks in advance
phani tej
AI: Yes, in the limit as B goes to infinity, C goes to infinity. But there is no real- world situation where B->infinity is a reasonable model. |
H: Clock generation on my PCB
I have not a big background in electronics. I am designing a PCB including a MCU (EFM32) and some ICs. I have seen in lots of circuits that they generally add an external Crystal Clock on the board and I wondered why not to use the internal MCU clock to clock the circuit ?
I know this question is a beginner question, but I have hard time to find an answer (keyword problem I suppose).
AI: You seem to be labouring under the misapprehension that the EFM32 has a built in crystal. It doesn't.
It has, as many microcontrollers do, an internal RC oscillator, which is wildly inaccurate.
It also has "A high speed crystal oscillator circuit", (as well as a low speed one) which is the circuitry required to use an external crystal. To use it you must connect a crystal to it to regulate the oscillations. That crystal must be between 4MHz and 32MHz (higher on some versions of the chip), or 32.768kHz for the low speed oscillator. |
H: What is the best way to interface ST7066 lcd controller with Atmel SAM4E
I am trying to interface ST7066 LCD controller with Atmel SAM4E MCU, but is quite confused about the best way(Least no. of pins used) to interface them together. Should I use GPIOs or Should I go for Static memory controller. Do it needs any chip select or SPI.
AI: That controller, like many of its class, has an 8-bit and a 4-bit interface mode. If you elect to use the 4-bit mode, you will use RS, R/W, E, DB4, DB5, DB6 and DB7 (7 pins total) to connect to the microprocessor. If you use the 8-bit mode, it additionally uses DB0 through DB3 for a total of 11 pins. See the datasheet for details.
To further minimize the number of pins, you can wire RS and R/W low, but this means you can't read back from the controller. Many simple projects that only use the built-in character generator can get away with this.
Typically, one uses GPIO pins for this kind of interface. |
H: Calculation of base current resistor resistance for a transistor operating in switch mode?
I have a 9V DC motor and I want to control its speed with an Arduino board with help of a power transistor TIP120. In one of the web-tutorials the writer explains how to calculate the resistor resistance. Here is the link to the page:
http://teachmetomake.wordpress.com/how-to-use-a-transistor-as-a-switch
In Example 1, if you scroll down to read the paragraph starting with:
“Finally let’s take a look at the datasheet for the TIP120. First, we see that Ic(max) = 5 A, and that Vceo(max) is 60, 80, or 100 V, so we are fine so far.
Next we check the base current...” you can read his explanation.
Here the writer of the blog uses a logic to calculate the resistor value for the base.
If I use his logic I obtain a resistor value which is very low comparing to other examples in other websites. Here is my scenario using his logic and by looking at TIP120 data sheet:
1-) The DC motor will be fed by a 9V battery and will be controlled by a pwm pin from the Arduino using a TIP120 transistor.
2-) The DC motor draws 500mA with no load; and 2500mA stall current as Imax_load. I measured these with an ampermeter.
3-) In this case the TIP120 satisfies the condition for Vce and Ice_max.
4-) Since Ic/Ib = 250, Ib_max will be 2500mA/250. So Ib_max = 10mA.
5-) Accoridng to TIP120 data sheet, in saturation zone for 2500mA the base emitter voltage will be Vbe = 1.75V.
6-) Since Arduino pin output is 5V, the voltage drop in resistor should be Vr = 5V – Vbe = 5 – 1.75 which means Vr = 3.25V.
7-) We can then use the base current Ib as 10mA < Ib < 40mA. Below 10mA the current will be too low and above 40mA might damage the Arduino. So I also choose a calue as 20mA. This means a resistor value R = Vr/Ib = 3.25V/20mA so that I obtain the proper resistor as R = 162.5 ohm.
I found many tutorials for Arduino and this transistor they use resistors such as 1k or 2.2k ect. For example here at this webpage they use 1k resistor: http://www.instructables.com/file/F9LKDFGGU7FXUMH There are many other use 1k and 2.2k.
My question is, is his logic and my calculations are right? Can I safely use the resistor I calculate?
AI: Following the instructions on the blog I can assure you that it is safe to use for your application.
It seems that most arduino tutorials either drive much smaller motors, or use standard resistor values.
As in: "Oh well, I don't wanna calculate it, lets just whack 1k in there."
Just to be clear:
The datasheet says b = 250 on total saturation in figure 2.
You go from there and take your collector current, which is Ic = 2.5A
Ib = Ic / 250
Ib = 25mA
Then you look at figure 2, again. Vbe for Ic = 2.5A is about 1.75V
->(Don't be afraid to overshoot a LITTLE bit)
The output voltage of your controller is Vaduino = 5V
so you can calculate the resistors voltage:
Vr = Varduino - Vbe
Vr = 3.25V
Therefor your resistor is:
Rb = Vr / Ib
Rb = 130 ohm
Yes this is extremely small, but you are driving large currents and your signal voltage from the Arduino is very low. The TIP120 operates at the upper range of it's specs, that's why Vbe is that high.
What you can do is add a 2nd transistor to drive the TIP120 to decrease current on your I/O pin of the Arduino. But as far as I know the Arduino is able to drive 25mA. It's on the edge, but it CAN do it.
Here's a schematic:
This lowers the current on your arduino I/O pin. This setup is useful for even larger loads, even though I'd recommend a mosfet in that case.
Another problem with this: it inverts the output, so whenever the I/O pin is HIGH, Q2 is off.
Also:
You said you're driving this from a 9V cell. Keep in mind that 9V batteries are not able to provide 500mA without a significant voltage drop, and they certainly don't provide 2.5A! So you might wanna think about your power source, too. |
H: Just I want to understand gain, power, link budget
I am a beginner, I am confused about calculating the nessecary gain and power and sensitvity to overcome path loss at certain distances.
the first thing what does gain mean ? I am not talkink about identification , but how to use this term ?
let say we have 100 watt "50 dBm" transmitter connected to an amplifier has 70 dB gain and output power of 400 watt "56 dBm" connected to antenna has a gain of 15 dBi .
simply how to calculate the total budget ? is just adding gain to last output power to antenna gain right ?
or we just adding the total gain of amplifier and antenna and ignoring power ?
should I adding receiver antenna gain & sensitivity also ?
AI: the first thing what does gain mean
Gain is the power amplification of a system usually expressed in decibels.
Link budget, as the name implies is the power budget from one end of the link to the other and should take account of: -
Tx amplifier power lost in feeder to antenna
VSWR effects due to mismatched coax/amp/antenna
Antenna losses (especially if not bang on the optimum frequency)
Antenna gain (aka directivity) - usually a minimum of 1.7dB per antenna
Localized losses in antenna structure (usually low by design)
The actual free-space transmission loss of power versus frequency and distance
The extra losses due to fade and the fact the earth isn't free-space
The receive antenna gain
Rx mismatches and feeder losses to receiver
Lastly, you should understand that if transmitting anything you are occupying a finite bandwidth in the spectrum and that bandwidth comes with a cost - noise. Let's begin with this. The minimum power in dBm that a receiver needs to generally operate with a low bit error rate is: -
dBm = -154dBm + \$10\space log_{10}(data\space rate)\$
So if you are transmitting 1Mbps the minimal signal you'll need at your receiver input terminals is -154dBm + 60 dBm = -94 dBm.
This accounts for your receiver being at normal ambient temperatures of 300k.
Assuming you can put figures on cable losses and antenna gains and that mismatches are minimized the basic free space link loss equation is: -
Link Loss (dB) = 32.4 + 20\$log_{10}\$(F) + 20\$log_{10}\$(d) where F is in MHz and d is kilometres
This tells you how many dB are lost at a particular frequency over a certain distance in free-space (not earth). Usually, RF guys then assume it's going to be at least 20dB worse than that (margin for fading) and that in a highly populated area it will be possibly 20dB worse again.
It all sounds a little haphazard but with care and attention to detail these equations produce very realizable systems.
I'm not going to comment on your figures because
let say we have 100 watt "50 dBm" transmitter connected to an
amplifier has 70 dB gain and output power of 400 watt "56 dBm"
connected to antenna has a gain of 15 dBi
.... makes no sense to me. I don't understand what you are trying to say.
See also other answers on this Long range (~15 km) low baud-rate wireless communication in a mountain environment (no LOS) and How to know (or estimate) the range of a transceiver? |
H: which devices on network use CSMA/CD
CSMA/CD 's definition based on wikipedia is :
Carrier Sense Multiple Access With Collision Detection (CSMA/CD) is a media access control method used most notably in local area networking using early Ethernet technology. It uses a carrier sensing scheme in which a transmitting data station detects other signals while transmitting a frame, and stops transmitting that frame, transmits a jam signal, and then waits for a random time interval before trying to resend the frame.
I know about this algorithm. But what I am looking for is which devices on computer networking field use this algorithm to access the medium?
Is switch use CSMA/CD algorithm to deal with collision on wired media ?
AI: The answer to the first part of your question is not much nowadays, if we're talking about wired networks.
10Base-2 and 10Base-5 Ethernet were based on coaxial cable, with a shared medium (everybody talked and listened on the same wire), so used CSMA/CD.
10Base-T originally used 'hubs' which were just signal amplifiers/conditioners, and everybody on the network still used the same collision domain so needed the same rules, although at least the physical medium was separated and a fault on one connection didn't bring the whole network down.
Then the cost of switched Ethernet became low enough that hubs were pretty much universally replaced by switches - with a switch there is not one shared network or collision domain, but instead there's effectively one network per connected machine. Each of these little networks has just two devices on it - the connected computer and the switch port.
The switch then forwards packets from one mini-network to another, based on the destination address and an address table it builds-up in RAM.
So there is no concept of a collision at all, because there are only two devices on the network and they have a separate receive and transmit wires to talk on, so never interrupt each other. |
H: Cockcroft-Walton voltage multiplier can be built with electrolytic capacitor or not
i know that capacitor is usually work with ac supply as in dc acts as a open circuit after charging , so can electrolyte capacitor be used in Cockcroft-Walton voltage multiplier , or it will explode due to sine wave source supply ?
AI: Each capacitor only sees one polarity of voltage across it, so electrolytics are fine as far as that goes. Pay attention to ripple current ratings, however. |
H: 555 timer: how to set values to take an hour
I'm new (and novice) in electronics. I came to seek your knowledge to see if someone can help me with a very basic circuit.
It is a 555 chip, which should light a LED (for about 1/2 second) every hour. I managed to make the circuit diagram with a well known software.
My question is that I do not know what values to put the resistors and / or capacitors to achieve this frequency of light or flash. Actually, this triggers a parallel circuit (so I need the trigger every 1 hour). I guess there must be some calculations to obtain these values, but what I've seen online I find very difficult to understand. I am not a student of electronics, only an amateur trying to learn as well as realize a project. Now the circuit works, but not in the desired frequency flash lighting (every hour a little flash).
PS: Attached image of the schematic. Sorry for possible faults in the text, I used Google translator.
PS: I think this is an astable and oscillator circuit... but I'm not sure.
AI: As awesome as the 555 is, its drift may be a bit too high for periods this long.
I recommend you look at using a MCU instead, such as the ATtiny4. It comes in SOT23-6 packaging and has an internal RC oscillator which is reasonably accurate.
If you move up to a ATtiny25/45/85 (SOIC-8/DIL-8/QFN-20) then you can program it using the Arduino IDE once you have installed arduino-tiny, plus it can support an external 32.768kHz watch crystal which will improve accuracy by several orders of magnitude. |
H: Is it possible to amplify near zero signals?
Is there an amplifier has an ability to amplify any signal down to -500 dBm?
If there is not, can it be possible?
If it is not possible, what is the weakest ever signal that can be amplified?
AI: Opamps these days are darn good. You can amplify the thermal (Johnson) noise of a resistor, with the amplifier only adding a fraction to the total. You can cool the resistor... but also cool the amps. I'm not sure of the limits. What's -500dBm in degree's K? |
H: Does an increase in load current change field winding current?
I would like to know if the current in the field winding of a DC generator using a field winding in its stator increase as the load across the output of the generator itself increases.
AI: Depends on the configuration of the field coils. A series field coil passes the same current as the load. This current increases field strength and causes the generated voltage to increase under load, further increasing current through the field coil.
A shunt field coil is wired in parallel with the output, so its current is proportional to output voltage and decreases as the load increases (since load current causes a voltage loss in the armature resistance).
A compound-wound generator has both series and shunt field coils. The series coil is sized to maintain output voltage under load, so the shunt coil draws (almost) constant current. |
H: Very long transmission-line design tips
I'm designing a very long transmission line between a master node a some slaves far away connected by a bus where only 3 wires are used:
- A DC power supply (24vdc)
- B Digital comm
- C Ground
As there is only a communication wire, half-duplex is mandatory, so all slaves only answer when master asks them.
The distance between nodes may by up to 100 m (110 yd), and up to 20 nodes may be installed. May be 2 Km long!!
By other designing reason, a relay may isolate the communication line from the rest of the slaves, they get inaccessible, this is ok. And the voltage on this line may be 5v or 10v depending on other conditions.
As I'm afraid of typical transmission problems (reflections, impedance-mismatch, etc) I have chosen a speed of 1200 baud.
My question is how may I estimate the impedance questions, how to overcome impedance variation. Is that speed low enough? Can be higher?
Is this a realistic circuit?
This is the basic circuitry:
And in the master and slave nodes, this is the communication diagram:
The X2 component is a microcontroller with the asynchronous terminals connected. It writes '0' when Q1 is on, otherwise a '1' is transmitted.
The U1 comparator adapts the slightly high voltages to TTL levels. May be the plus-minus connection is reversed, doesn't matter at this design stage.
Resistors R3 and R4 (10k) have the function of polarize the diodes D1 and D2.
Please give me some light of how to save time of frustrating real tests. May be R3 and R4 have to be lower...
But please take into account that Vb must be almost '0' when Q1 is activated.
Current carried on line B is very low (as the 250 ohm resistors limit it), a low voltage drop is expected.
Thanks!
AI: RS-485 is good for 100kbps at 1.2km, using two wires for data and two for power. You could probably stretch it to 2km at 1200bps.
Here is a TI application note for a 2-wire power + data solution. It couples the data transceivers through large capacitors, and connects the power source and sinks through normal-mode transformer filters.
1000BASE-LX gigabit Ethernet can run 5km over fiber.
A reflection may take 40us to travel 4km at 10^5 km/s. At 1200bps, you have 400us settling time from the leading edge of a bit to a sampling point a half-bit away.
In the comments, the OP mentions using untwisted, unshielded pairs. This will hurt noise immunity. Consider using parity bits, CRC's, retry protocols, or error correction. |
H: There is no 'latch pin' on MC74HC164A shift register
Unlike a 74HC595, this shift register (http://www.onsemi.com/pub_link/Collateral/MC74HC164A-D.PDF) doesn't have a latch pin. How then do I output the data stored in the registers (to something like an LED array)?
Thanks.
AI: The '595 has two sets of latches; one is an input latch that receives the external data serially, and the other is an output latch that receives the data in parallel from the input latch.
The '164 has no discrete output latch; all data is output in parallel as it is received serially. The timing diagram on page 7 shows this. |
H: Simple PORTA Control via PIC
I am trying to setup a simple blinking LED on a PIC18F25K50. I can get RA0 to toggle using
LATAbits.LA0 = ~LATAbits.LA0;
However, if I try to use
LATAbits.LA0 = ~PORTAbits.RA0;
The LED stays on.
According to the datasheet (among other sources), the PORT register reads the levels on the pins, whereas the LAT register sets the output. Why is the PORT register not reading the correct levels? The circuit is below.
simulate this circuit – Schematic created using CircuitLab
AI: I suspect that you have not set the ANSELA register correctly.
The port defaults its analog-capable pins to analog mode, which means that when you read them through the PORTA register they will read as 0's, irrespective of what the voltage level actually is on the pin.
But, you can still set output values, which is why you can toggle the pin.
So, set your ANSELA bit 0 to 0 to set it to digital mode (and for any other pin you plan to use as an input) and you'll be able to read inputs correctly. |
H: Timing of delay for autocorrelation processing of a signal
When processing a periodic signal to remove noise, by using autocorrelation, a time delay is required. Is there an algorithm that a circuit can "use" to figure out how large this delay needs to be? Does such a circuit - one that can figure out the required delay of a signal for accurate autocorrelation processing - exist? Is there a canonical example? Or does this delay need to be hardwired into the circuit and changed by trial and error?
AI: There's more than one way to do this. The simplest would be to just detect a rising edge zero crossing, kind of like the trigger input on an oscilloscope. Use a low pass filter to keep from triggering on glitches. You could tweak the level if that helps.
If you know that the signal sticks to about the same period, you could build a phase locked loop to build a non-glitchy signal that tunes itself to the same frequency as your signal. It has a variable frequency oscillator whose output is compared with the input signal (e.g. XOR) to detect how far out of phase it is. This is filtered and sent back into the frequency control input. |
H: Voltage not dropping in circuit
This schematic shows the circuit that I'm trying to build. At the moment I'm not using V2, as I'm having a problem with V1. From my understanding the diode should drop the voltage by about 0.7V, and the resistor by 1.1V, reducing the Voltage from 2.6 to about 0.8V. The voltage is only dropping by 0.7 V with the LED's lit, and by 0.2V without the LED's. Can someone please explain why, and what I'm doing wrong?
The reason I'm using a 2nd circuit, is that I want V2 to supply extra voltage to switch on the LED's in V1. There are other LED's in the V2 circuit, and I want them all to switch on at the same time. The LED's need about 2.4V to be fully lit. Thanks in advance.
simulate this circuit – Schematic created using CircuitLab
AI: The LEDs, by your own admission, need 2.4V to operate. But you start with a voltage source that is 2.6V and then add a diode and a resistor in series. D1 alone should drop about 0.7V, so you're already below the operating voltage of the LEDs before you even get to the resistor. Add the voltage drop from the resistor and the voltage available to the LEDs is below their normal operating conditions.
So your primary problem is that V1 (and V2) are too low. You need to pick a current for the LEDs (based on the datasheet and how bright you want them) and then choose a voltage that satisfies that current. If, say, you wanted 20mA through the LEDs and you're keeping the 110Ω resistor, your voltage would be:
$$V1=V_{D1} + V_{R1} + V_{LED} = 0.7V+(110Ω*20mA)+2.4V = 5.3V$$
Alternatively, you could pick a voltage (maybe 5V) and calculate a resistor that gives 20mA to the LEDs:
$$R_{1} = \frac{V1-V_{D1}-V_{LED}}{20mA}=\frac{5V-0.7V-2.4V}{20mA}=95Ω$$
But let's look at what's actually happening in the circuit that you posted. As we've already concluded, there's not enough voltage to light the LEDs in their normal operating region. The only reason any amount of current is flowing at all is because the forward drop of a diode is actually a function of current. The lower the current, the lower the voltage drop. Here's the graph out of a datasheet from a 1N4148:
Let's guess 1mA is going through the circuit. So I drew a line from 1mA on the Y-axis and then down to corresponding forward voltage on the X-axis. It landed just above 0.6V. We'll just use 0.6V and see how that works out.
Let's see how much of a voltage drop we'll get from V1 to the bottom of R1:
$$2.6V - 0.6V - (110Ω * 1mA) = 1.89V$$
Oh hey, look at that! That's almost exactly what you measured! Our guess was nearly correct. In fact, it was a bit high. The exact current is slightly less than 1mA. But now we know that just under 1mA is going through the whole circuit. And with two LEDs in parallel, they're getting less than 500uA each! That's not very bright, if you can see it at all. |
H: How can I use "favorite via" during routing with Altium?
I've set up a few via favorites within Altium, butI can't seem to figure out how to cycle through the various presets.
How can I cycle through favorite via presets during routing ?
AI: The worst is spending so much time trying to figure it out, and then asking, only to figure it out yourself.
Ok, so the rules govern what's allowed and what's not allowed. The default rule has a minimum hole size of 28 mils, and one of my favorite via sizes was 17 mils.
There is an option to select how the vias are chosen (Preferred rule, Max or User choice) and even if you have user choice selected, the rules still take priority.
So I changed my rule to accomodate the minimum and I'm able to change during routing with SHIFT+V. |
H: Breadboard with high frequency digital signals
I'm trying to interface an ADC chip with my FPGA. The ADC is on a breakout board that fits nicely into my breadboard (.1" pin spacing). The clock input from my FPGA into the breakout board is 12.5 MHz. I also have another clock signal going into a pin that's 3 pins away that is at ~1.5 MHz. I have two questions:
Will the 12.5 MHz signal work in a standard breadboard?
Will the two clock signals interfere?
All wiring is done from the FPGA Dev board to the breadboard with ~3" jumper wires.
Is there anything else that could go wrong?
AI: 12.5 Mhz (80 ns cycle) should be doable.
Wire up your clock lines first. Pick placement that keeps them short and cut the jumpers to length so that you don't have big loopy antennas. Verify that you are getting nice square clocks before wiring the rest. |
H: AVR SPI2X has no effect
I've got an ATMega88A configured to run on internal 8MHz clock:
lfuse = 0xE2
hfuse = 0xDF
efuse = 0x01
F_CPU defined as 8000000
This in confirmed in the 'real world' by blinking an LED with _delay_ms(1000). It's ~1sec, not 8 sec or 1/8 sec.
I've attempted to set the SPI to run at Fosc/2 by setting only SPI2X to 1. (SPR1, SPR0 initialize and should stay 0.) This should result in a SPI speed of 4MHz.
I've set the timer to a 256x prescale.
I'm attempting to send 5000 bytes over SPI. (There's no device connected, just shifting bits out the port.) The timer is zeroed before the transmission and then the value is displayed as LEDs after the transmission.
To send one bit over a 4MHz SPI should take 1/4000000 = 250ns, one byte 8*250ns = 2us, 5000 byte 2us*5000 = 10ms.
However, from my timer: system clock is 8MHz so period is 1/8000000 = 125ns, timer pre-scaler of 256 mean timer tick of 125ns*256 = 32us LEDs show binary of 176 so loop time is 32us*176 = 5.632ms.
How is actual faster than theory?
The kicker? Commenting SPSR = (1 << SPI2X); has no effect on the value displayed in the timer LEDs.
Sample code:
#include <avr/io.h>
#include <util/delay.h>
#define set_output(portdir,pin) portdir |= (1<<pin)
void init() {
// Set MOSI, SCK, SS as Output
set_output(DDRB, DDB5);
set_output(DDRB, DDB3);
set_output(DDRB, DDB2);
// Enable SPI, Set as Master, Set CPOL & CPHA to 1 (SPI mode 3)
SPCR = (1 << SPE) | (1 << MSTR) | (1 << CPOL) | (1 << CPHA);
SPSR = (1 << SPI2X); // Enable SPI clock doubler
DDRD = 0xff; // Set PORTD as output
TCCR1B |= (1 << CS12); // Setup Timer with 256 prescaling
}
int main(void) {
unsigned int i;
init();
TCNT1 = 0; // Zero the timer
for (i = 0; i < 5000; i++) {
SPDR = 0; // Load data into the SPI data reg
while (!(SPSR) & (1 << SPIF)); // Wait until transmission complete
}
PORTD = (unsigned char) TCNT1; // Display the timer on PORTD
for (;;) {}
return 0;
}
Some problems I've tested:
TCNT1 (16 bits) could be overflowing PORTD (8 bits)? Nope, looping
less iterations reduces the timer value proportionally. (5000 loops = 175 ticks; 1000
loops = 35 ticks)
SPI2X isn't being successfully set? Nope, after the loop if (SPSR & (1<<SPI2X))
returns true.
SPI2X must be set before enabling SPI? Nope, setting it first has no
effect.
No change between optimizations -O3 and -Os, but large increase in
timer value for -O0.
Writing some other value to SPDR has no effect.
Am I going insane?
EDIT: The portion of code in error as answered below was carelessly copied my me without verification from here.
AI: Are you sure the line while (!(SPSR) & (1 << SPIF)); is correct? I suspect supposed functionality: while (!(SPSR & (1 << SPIF))); |
H: Replace Electret Microphone With Arduino Output
I have the following circuit for a simple FM transmitter.
I want to replace the electret microphone with a simple tone generated by an Arduino (or equivalent) that will be broadcast over FM radio.
Qns:
1) Is this possible to do?
2) How would I go about doing this? (E.g. will a PWM signal from a digital I/O port on the Arduino work?)
3) Maybe there is a simpler way to broadcast a simple tone over FM radio?...
AI: YES
I'd use an IO port with a low pass filter and feed it directly into C1 (left hand side)
What you have is fairly simple
It's probably illegal what you want to do so check out the legislation applicable to your country. |
H: What is an antenna amplifier ? How does it add gain?
I don't know what exactly does antenna amplifier mean.
Is it possible to increase the gain of a Tx antenna ? Where do I connect the antenna amplifier to it ?
If, for example, the Tx has a power of 20 dBm , antenna has a gain of 10 dBi & antenna amplifier "repeater" has a gain of 60 dB "like common cellular repeaters" , what does this gain mean ? Does it mean the antenna gain will be 10+60=70 dBi ? Or does it mean the Tx power will be 20+60=80 dBm ? I am confused !
Another example for Rx antenna, if we have a receiver with a sensitivity of -114 dBm and Rx antenna has a gain of 10 dBi & we connect it to a 40 dB amplifier, does it mean the total sensitivity will be -114-10-40= -164 dBm ? (please ignore the SNR)
What is the weakest possible signal at Rx antenna to be amplified ?
Last example , just to understand what the rule of repeater and its gain is.
If we use a Tx that has a power of -30 dBm at 1000 m, antenna has a gain of 10 dBi, & at 1000 m distance there is a repeater that has a gain of 60 dB, how do I calculate the total gain in this situation ?
Should the total gain at repeater be 10 "antenna" +60 "repeater" ?
Or should we just calculate the resulting power at repeater instead of its gain ?
Do we write (-30 "Tx"+ 60 "repeater")"total power" + 10"antenna" ?
Sorry for my long question, I am a beginner , I want to understand .
Thanks.
AI: An antenna has a gain set by its construction. For instance, a simple wire forming a dipole will have a gain of about 2dB whereas a dish might have a gain of 20dB. The lower the antenna gain the less directional will be the transmitted electromagnetic wave. Higher gain antennas such as dishes have to be pointed in the correct direction for them to be effective but, give you a bigger signal when receiving or concentrate the power output more when transmitting.
You can't affect antenna gain by adding an amplifier.
if "for example" the Tx has a power of 20 dBm , antenna has a gain of
10 dBi & antenna amplifier "repeater" has a gain of 60 dB "like common
cellular repeaters" , what does this gain mean ? is it mean the
antenna gain will be 10+60=70 dBi ? or it mean the Tx power will be
20+60=80 dBm ? I am confused !
The antenna gain is fixed by it's construction
Gain is a word that describes how much something amplifies a signal.
Tx power is 20dBm irrespective of antenna gain BUT this power is projected into a tight beam on higher gain antennas therefore it is equivalent to an isotropic antenna (transmits the power equally in all directions) fed from 20dBm increased by 10dB = 30dBm.
another example for Rx antenna , if we have receiver has a sensitivity
of -114 dBm and Rx antenna has a gain of 10 dBi & we connect it with
40 dB amplifier , should it mean the total sensetivity will be
-114-10-40= -164 dBm ?"ignoring SNR please"
It's impossible to ignore SNR - if a receiver has an input sensitivity of -114dBm then pre-amplifying the signal by 40dB will likely increase noise and signal together and this will mean exactly the same SNR and no net benefit.
if we use Tx has a power of -30 dBm at 1000 m, antenna has a gain of
10 dBi & at 1000 m distance there is a repeater has a gain of 60 dB ,
how to calculate the total gain at this situation ?
You need to draw a sketch of something here - where is the final receiver (and I don't mean the repeater). Maybe something like this but with ALL the information on: - |
H: HDD Motor Spinning
I'm trying to run a hdd motor using the following link. http://theamateurprogrammer.blogspot.hk/2014/02/revitalizing-old-hard-drive-motors.html
Instead of using Audrino I'm using PIC16F73.I tried to recreate the code in MPLAB but I couldn't convert micros() function. Therefore I am trying to create the waveform shown as in fig
But I couldn't calculate the correct time period for switching. I have included my switching code.
PORTBbits.RB0 = 1;
PORTBbits.RB1 = 0;
PORTBbits.RB2 = 0;
Delay_x100uS(45);
PORTBbits.RB0 = 1;
PORTBbits.RB1 = 1;
PORTBbits.RB2 = 0;
Delay_x100uS(15);
PORTBbits.RB0 = 0;
PORTBbits.RB1 = 1;
PORTBbits.RB2 = 0;
Delay_x100uS(45);
PORTBbits.RB0 = 0;
PORTBbits.RB1 = 1;
PORTBbits.RB2 = 1;
Delay_x100uS(15);
PORTBbits.RB0 = 0;
PORTBbits.RB1 = 0;
PORTBbits.RB2 = 1;
Delay_x100uS(45);
PORTBbits.RB0 = 1;
PORTBbits.RB1 = 0;
PORTBbits.RB2 = 1;
Delay_x100uS(15);
What should be the correct switching time?
AI: The base waveform can be divided into 6 points, each point with the same delay between them. The length of that delay defines the speed of the motor.
The 6 points, or phases are:
Phase A HIGH
Phase C LOW
Phase B HIGH
Phase A LOW
Phase C HIGH
Phase B LOW
You notice the sequence of phases is repeated, but the signals inverted. Basically it's 3 square waves with a 120° phase shift.
Here's another way of looking at it - as a circle split into 6 segments, each segment defining a changed signal level (the signal changes at the interfaces to each segment):
As you work around the circle so the motor turns.
If I were then to create concentric rings for each of the three phases you can see better how then then turn on and off and interact with each other:
You can see from that how three coils A B and C located A at 3:00, B at 7:30 and C at 10:30 (90°, 210° and 330°) the interaction between them forms 6 distinct locations - when A is on the magnet is pulled to A, when B is on, it's pulled to B, but when both A and B are on it's pulled to half-way between them.
In reality a motor would often have multiples of 3 coils forming multiples of 6 points around the circle, increasing the torque, smoothness of rotation, etc.
So your code would actually be much simpler as far as the switching goes:
PORTBbits.RB0 = 1; // Phase 1
Delay_x100uS(speed);
PORTBbuts.RB2 = 0; // Phase 2
Delay_x100uS(speed);
PORTBbuts.RB1 = 1; // Phase 3
Delay_x100uS(speed);
PORTBbits.RB0 = 0; // Phase 4
Delay_x100uS(speed);
PORTBbuts.RB2 = 1; // Phase 5
Delay_x100uS(speed);
PORTBbuts.RB1 = 0; // Phase 6
Delay_x100uS(speed);
What value should "speed" be? As I said, that defines the speed of rotation of the motor. I would suggest starting with a high value so the motor starts off slow, then gradually decreasing it, thus accelerating the motor to a higher speed. Maybe tie the value to an analogue input and use a potentiometer to set the speed? |
H: Subtracting from lipo cell voltage!
I just got a 3s Lipo battery. Lipo battery has a 4 pin connector to plug it into charger or voltage checker. But I don't want to buy a lipo voltage checker, I want to make it. But I have a problem.
Let's say a=GND b=1st cell c=2nd cell d=3rd cell
so if I read voltage from b it's b, But if I read the voltage from c it is c=b+c , If i read voltage from d it's d=c+d.
I have lm339 IC , and I need b , c-b and d-c.
How to substract voltage?
Thank you for ANSWERS!
AI: It seems you are asking how to determine individual cell voltages in a 3 cell pack when you have access to each end and the points between the cells.
This simplest answer is to use a microcontroller with A/D and do the subtraction digitally. I've done exactly that in a 8 cell stack once. The problem with this method is that resolution goes down for the cells higher up in the stack. However, what matters is whether the worst case is still within spec for your purposes. Our A/D was 12 bits and we only needed to know the cell voltages well enough for charge ballancing and discharge limiting. You should be able to easily do the same with your 3 cell stack.
Note that just measuring the voltage of each cell is only half the solution. For charge ballancing you also need to do something about it when some cells charge to a higher voltage, as will inevitably happen. If this is a one-off, then I'd probably go with the conceptually simplest method, which is to use a opto-isolator and resistor per cell. If this is for volume production where component cost matters, you can get more clever and use directly wired FETs to turn on the bleeder resistors for each cell. |
H: Is there any difference between calling for less power and sending less power?
This is an "everyday" layman question, not a technical question.
I have an AC ceiling fan with three power settings (like some light-bulbs have three brightness settings). I also have a wall switch which is circular rather than on/off.
So I can either "ask" for less power (by changing the fan's setting) or "send" less power (by rotating the circular switch).
Is there an electrical difference between the two?
AI: Yes, there is a difference.
The circular thingy on the wall, called a dimmer, chops up the 60 Hz power sine wave in such a way that the overal apparent voltage available to the motor is less.
The knob on the fan causes different coils inside the fan motor to be switched in and out to trade off more torque versus lower power consumption in the motor.
Use the latter (the switch on the fan) to control its speed if you can. The dimmer does some nasty things to the power line waveform. This will not only make the fan run less efficiently, but also cause some radio interference. The people that designed the fan added different taps to the coils inside the motor for a reason. This allows still running the motor reasonably efficiently at the different speeds. The downside is that you only get a small number of fixed speed settings, whereas the dimmer can control the fan speed smoothly. However, it's a fan. Three speeds should be good enough. |
H: How does SMBus receive byte command protocol know what to send?
Im programming an I2C device to act as a PMBus slave. Looking at the SMBus protocols (which PMBus is built on) the Receive Byte command has a format described as follows:
+---+---------------+---+---+-----------+---+---+
| S | Slave Address | R | A | Data Byte | A | P |
+---+---------------+---+---+-----------+---+---+
My question then is how is a slave supposed to know which commands data it is supposed to be returning? Is it dependent upon a preceding communications transaction, like reading from a device to which the read location has already been set??
AI: Receive Byte is a low-level function, equivalent to a simple I2C read. It's up to the slave to decide what data to send in response. It could depend on the context of the previous communications, or there could be some default data such as a status code or sensor value. If the slave device can accept multiple addresses, then the choice of data could be based on the address. Or the command might not be useful at all. |
H: STM32F example for opamp follower mode
Does anyone have an STM32F example for opamp follower mode (ideally STM32F3 Discovery)? I can get the PGA working but cannot find out how to connect it in simple follower mode.
AI: Got it (I am using OPAMP3):
//OPAMP_NonInvertingInput_IO4 < IO4 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4)
//OPAMP3 config
OPAMP_DeInit( OPAMP_Selection_OPAMP3 );
OPAMP_InitStructure.OPAMP_NonInvertingInput = OPAMP_NonInvertingInput_IO4;
OPAMP_InitStructure.OPAMP_InvertingInput = OPAMP_InvertingInput_Vout;
OPAMP_Init( OPAMP_Selection_OPAMP3, &OPAMP_InitStructure ); |
H: Logic in displaying numbers in 7 segment 4 digit display
what is the logic in displaying desired numbers in 7 segment 4 digit display.
Ie, how to know the leg combinations to see the desired number in the display
AI: Generally the segments are named a through g, starting with the top segment a, clockwise around to the top left segment f, and finally the center segment g. See the wikipedia article: https://en.wikipedia.org/wiki/Seven-segment_display . Unfortunately, I cannot post the image here because it is an SVG.
Consult the datasheet or poke around with a resistor and battery to work out which pins correspond to which segment. Generally displays are either common anode or common cathode, with all of the anodes or cathodes connected to one common pin. There are also some common pinouts, so if you don't know the part number, do a google image search to find a part number of a display that looks the same and then use that to find the datasheet.
With a 4 digit display, there will generally be four separate commons - one for each digit - and all of the corresponding segments will be wired in parallel. So if you put a current in the correct direction between the common for digit 1 and the segment a connection, segment a on digit 1 will light up. It is not possible to illuminate two digits with different patterns at the same time with this configuration. If you want different patterns on each digit, what you need to do is multiplex. Turn one digit on at a time, and cycle through them all at high speed. |
H: Single point vs Ground plane, in audio OP AMP PCB layouts
Recently I had posted a seemingly innocent question on another forum. I was trying to keep a small and relatively simple circuit down to a 2 layer board and was asking about the shielding merits of a copper pour tied to analog ground, as opposed to dedicating unbroken separate plane used for ground. Though my question was only in reference to the shielding value of such a copper pour, a major controversy started on an entirely different point. In my layout I had created a virtual ground using the typical voltage divider feeding a unity gain configured OP amp, and then had run every single analog ground return to a point adjacent to the output of that virtual ground. I had also done a copper pour on the least busy layer and tied it to that same analog ground, again at that same single point. But there soon ensued a series of posts lambasting my use of such a convoluted "spider web" scheme, with many chiming in that I should just create a ground plane and just make all connections to the nearest available point of that plane ( through via when necessary). Well doing so certainly makes for a cleaner and simpler layout visually. But having gone the "single point" route for so many years, and having mostly successful (meaning quite and stable) designs, I'm hesitant to change. Especially as some of the arguments spoke of single point grounds as something archaic, and relegated to vacuum tube circuits. What?
So anyway, just poking around, my research on the subject seemed to show two camps on this subject. One argument is that when an unbroken ground plane is available, it is always superior. The other argument says that if its a high frequency circuit a ground plane is better, but for a low frequency circuit (including audio), the single point ground method is better, mostly to avoid ground loops.
Of course I still have a dilemma, as prototype costs are constraining me to a 2 layer board if possible this time, and this means that my pseudo ground plane will, at best, be a copper pour, broken by some short traces here and there. But before adding that complexity or possible exception to the rule, I'd like to put this specific question out for general discussion: For an audio design involving OP Amps, when is a Single point" ground scheme the bast way to go, and when is just the simpler "nearest path to a ground plane" the better (or at least an adequate) choice.
By way of example, these two layered screen shots show two reasonably similar versions of the same board, which in reality is about 4" x 2.5". In the first you can see lots of long traces on both sides of the board culminating at a single pad labeled AGND. The second is nearly the same circuit, but this time the blue copper poor area is part of the analog ground net, so all those long traces have gone away in favor of the nearest path to the ground plane/ copper pour. Aside from all possible critique about other layout issues one might see, this is just an example. I'd really like to confine this discussion to the original question.
single point ground version
Nearest path to ground plane version
AI: There are pros and cons for either.
A signal full ground plane has the advantage that signal 0V is a high integrity 0V and can be relied upon but, not when there are currents flowing of any significance. Despite a ground plane being very low impedance, volt drops can still occur when significant currents flow. How much volt drop being a problem depends entirely on the smallest signal that you wish to amplify.
A star point system avoids those "significant currents" mentioned in the previous paragraph by making sure that tracks carry signals (0v return tracks) do not share with these significant currents. The down side is that you end up with magnetic loops that can have voltages induced from one another and the "significant current" flowing in a different track can be coupled. |
H: high voltage safety
I remember having seen microwave ovens without the earth connection.
My first question is :
Is it correct that if you touch the MOT transformer chassis, but leave the other terminal floating in air without touching anything, you won't get a shock? Since there is no path for the current to flow back to the other terminal.
My understanding is, before touching the secondary winding, the whole secondary is floating, so the whole secondary winding is like a capacitor in air. Now when you touch one terminal of it, the current in the whole secondary winding has no other source, so only a tiny amount of charge flows through you body to bring the terminal you touch on the secondary to ground voltage, 0V. So, in conclusion, it's safe to touch a floating HV transformer as long as the other terminal is well insulated.
But that doesn't seem right...
Edit:
In reality though, perhaps the secondary winding is not totally insulated from the core, so part of the HV in the second winding can arc to the core then arc to the mains, which flows through the ground and complete the circuit, which gives a shock?
My second question is :
Suppose for safety reasons I grounded one terminal of the MOT transformer. How do I check if the ground wire really works (i.e. it is really connected to the metal plumbing below where I stand?) My friends says to connect the chassis to a water puddle on the floor through a resistor and use the multimeter to measure the voltage between the resistor. Is that the usual way it's done?
Edit:
I want to construct a sputtering chamber, the chassis should be grounded, while inside the chamber there will be a high voltage electrode. Using a flyback transformer or a MOT, the high voltage can be generated, but I'm still not comfortable connecting one terminal to the chassis.
AI: I'm not a HV guy.
I'd never touch part of a HV circuit while it was powered.
(at least on purpose, we all make mistakes.. 5kV across my finger once.)
Disconnect the power and then short all the nodes to ground with a grounding rod.
This says that one of the secondary taps is already connected to the core.
RE: Checking ground connections. Sticking the transformer is a puddle of water sounds like a crazy idea. (Are these people really your friends?) I certainly wouldn't do it with the tranny under power. If measuring the resistance with a DMM is not good enough for you. Then I might get a low voltage DC bench supply, push current to ground and measure the voltage drop.
Above all be safe.
Edit: Just an addition,
I was thinking about some current limit for your circuit. (A big inductor as in link above, or an active thing.) How much current does DC sputtering need? (Do I understand that you are bending the current around with magnets?)
And if you wanted to check for HV before you touch something you could make a little probe with an led and resistor. (100k or so?) |
H: How do I realize this problem with a digital circuit?
I'm trying to design an indicating system for a vehicle if it crosses its speed limit. Of course I'd be using a potentiometer to realize the action of increasing speed. The input is given to the base of a transistor through a zener diode so that I can get a digital output(OFF below the set value and ON if input exceeds the set value).
I need to have another indicator if the vehicle maintains that speed for more than say 2 seconds. I can feed the output of this transistor to a 555 timer set to produce pulses every two seconds and this clock output will be given to a counter.
The problem is that, I am supposed to have a digital equivalent of the first part of this system(As mentioned in the guidelines for the project). Is there any way to realize the switching action of transistor with the help of digital component.
I don't think it's possible to use a digital component as there is no particular level of voltage above/below which we can consider the output as high/low. This problem can be solved by using a transistor and a zener diode as mentioned above.
Since the input is continuous, I don't think any digital circuit can serve this purpose. Please correct me if this is possible.
Is the remaining part of my design(using a timer to produce pulse when the transistor switches on and feeding the clock pulse to a counter) right?
AI: Here's a circuit that'll give you a 2Hz output whenever a speed threshold is exceeded and will continue to output 2Hz as long as the threshold is exceeded.
Here's how it works:
U1 is a 555 wired as an astable multivibrator with a period of about 1/2 second, with its RESET input controlled by U2, a voltage comparator.
A voltage comparator works by having its output go high when its + input is more positive than its - input, and in this case I've chosen the voltage on the - input to be half of the supply voltage by connecting it to the junction of R1 and R2, a voltage divider comprising two resistors with equal values. For the purpose of this exercise, I set the supply voltage (12 volts) to be equal to 120 miles per hour and to vary linearly from zero MPH with U2- equal to zero volts, to 120 MPH with U2- equal to 12 volts.
Thus, with U2- sitting at 6 volts, the speed detection threshold is set at 60 MPH.
The voltage on U2+ comes from V1, which is the output voltage from the pot you mentioned earlier, and varies linearly from zero to 12 volts, corresponding to a vehicle speed of from zero to 120 MPH.
With the voltage on U2+ lower than the voltage on U2-, then, U2's output will be low and will keep U1 RESET, forcing U1-3 low.
As the vehicle speeds up and V1's output goes more and more positive, eventually it'll get more positive than the 6 volt reference on U2-, which will cause U2's output to go high, taking U1 out of RESET and allowing it to oscillate at about 2Hz, giving you the output you want for your counter.
So, When the vehicle's speed is higher than 60 MPH U1 will oscillate, but when it's lower than 60MPH, U1 won't do anything.
Self-help 555 and comparator tutorials are all over the web, so I won't go into them here but, if you're interested, there's a nice, free simulator program here, and I've posted the schematic as a file which you can run to play with the circuit here. |
H: FPGA Test Equipment
I mostly have desktop software development background. Trying to learn hardware design.
Question:
The question is mostly for developers (mostly individual contractors) who develop for any expensive equipments.
So suppose I am developing some firmware in VHDL/verilog for some client. Do you always need the "specified" hardware to test it? (That "specific", so if I have altera board, what about development for xilinx?)
I mean usually for small projects with microcontrollers, you can buy them since they are not that expensive, but when you develop for fpgas, how does the development and testing stages work?
I suppose the delay propagations and other things different from each one board or chip to another, which need to be accounted in your code.
Can someone please share how the procedure, especially when they dont have the equipment for which its going to be developed?
Do you buy it or client provides it, or is it small changes just on the IDE level in software, which you can change from datasheets?
p.s: Not related but I am thinking of buying Altera DE1-SoC board. So if you have any better suggestions than this board, please let me know too. (Non Academic, sub $500, intermediate board, so i can grow and still use it)
AI: Generally FPGA designs start out similar to ASIC designs - it's all in the simulator. You can get far better visibility for debugging in a simulator than you can ever get in hardware. You do need to build testbenches and functional models, though, which takes time. For complex implementations it's a requirement as you will never work out all the bugs by just testing on the hardware. Once the design is thoroughly debugged in the simulator, then you can drop it onto the board. Note that for very large designs on very large FPGAs, the synthesis and place and route can take a very long time. One design I worked on a year ago or so took up about 40% of a Virtex 6 HXT 565 and took about 7 hours to complete place and route. This is not something you want to have to do on a regular basis for small changes.
Generally any delays on the board are either too small (far less than a clock period) and can be ignored or they are unknowns that will need to be tuned and compensated for with some sort of active training routine as they will vary even within one batch of boards.
The FPGAs themselves are extensively tested (hence the very high cost) so that the delay variations are known to be within specified limits, and your design should not be dependent on the delay of an individual to-spec chip. If it is, then you have bigger problems and you need to either remove the dependence or find a way to compensate for it. For example, see the CERN time to digital core - it is highly dependent on routing and has its own calibration routine to characterize the delays that is run on a regular basis to correct for long-term and temperature-dependent variations.
It is possible to test code for one FPGA on a different FPGA. If the code does not interact with the outside world, then you can generally put it on any FPGA you wish. If you write vendor-independent code (avoid core generators for RAMs and ROMs, instead infer everything in pure HDL), then it is even possible to test code intended for production on a Xilinx FPGA on an Altera FPGA. Note that this does not work if you need to use FPGA specific features such as high speed transceivers.
If you are designing to interact with hardware, then you're going to need the hardware and the client should provide it unless it is also your job to build it. It will also be necessary to have some hardware debugging tools such as a mixed signal oscilloscope and logic analyser so you can check hardware interfaces to make sure they're doing what you intend. |
H: How are timers adjusted in a micro-controller?
In a 555 Timer the resistors and capacitors determine the frequency and the duration of the timer pulses. How is this actualized in case of a micro-controller timer?
AI: Microcontrollers generally use crystals or internal oscillators to generate a reference clock. That clock frequency can (on higher-end chips) be multiplied up using a PLL. The resulting clock is used to run the system.
At its simplest, a timer is a counter plus a comparison value (the period). In software, the user sets the period with a register and turns on the clock to the counter. When the counter value reaches the period value, the comparison logic generates a pulse. This can trigger a CPU interrupt or (on some MCUs) go out through a pin.
Since the timer logic is purely digital, the period (in cycles) has to be calculated based on the clock frequency.
Edit: It seems like you're asking more about low-level implementation. A counter can be implemented using edge-triggered flip-flops. Set up a flip-flop such that its output inverts on the falling edge of every clock cycle. (In a D flip-flop, you can connect the output to the input through an inverter.) Take two these, and connect the output of the first to the clock input of the second. Then, supply a clock to the first flop. They'll toggle like this:
RefClk -> Q1 -> Q2
0 0 0
1 0 0
0 1 0 <-- falling clock edge inverts Q1
1 1 0
0 0 1 <-- falling clock edge inverts Q1, falling Q1 edge inverts Q2
1 0 1
0 1 1 <-- falling clock edge inverts Q1
1 1 1
0 0 0 <-- falling clock edge inverts Q1, falling Q1 edge inverts Q2
By connecting more flip-flops together in this way, you get more bits in your counter. Each additional flop toggles at half the rate of the previous flop. |
H: Designing a simple pulse generator
I read in many tutorials that the inner clock in a micro controller are less accurate (%10) than the external crystal clock. When I generate variable frequency pulses by using a micro controller does that mean I am suing the inner clock and the pulses are not accurate enough? Some tutorials play with the registers and obtain any pulse frequency.
My question is, for example if I use AVR such like in Arduino Uno board and play with the registers does that mean I will use the inner clock? Is there a way to obtain more accurate pulses?
AI: By "inner" clock, you mean the internal RC oscillator that comes with the device from the factory. It is inside the chip, and is not very accurate over temperature range, which means it will not actually be the frequency that you assume it is, and indeed it may have a lot of "jitter" which means the clock generated from the internal oscillator will not have very "precise" timing, one clock pulse might be +-10->15% different to the one before it, and the one after it. This is bad for cycle-by-cycle timing.
The use of external crystals allows you to have faster clock speeds than that possible with the internal source available in your given example (Atmel ATMEGA328P which is on the Arduino Uno), and these provide (usually! Quality and material are relevant here) very good accuracy and cycle-by-cycle precision of the clock signal.
The system clock is generated from these different possible sources, so if you use a bad accuracy/quality source and expect high speed and timing, you will have problems. Use a good crystal, and you can very nicely time things, such as a very precise/accurate digital signal at a set frequency (given the limitations of timers mentioned below).
The registers that you mention are the perhaps those which allow you to change the CLKDIV options, which allows you to divide an input clock source frequency and make the system clock slower which uses less power, and may give better timing characteristics. The output of the system clock signal may sometimes be selected for one of the microcontroller pins, to clock external devices with a nice clean digital clock - for example, a Camera IC, or a reference clock input for synchronous devices.
The timers inside the microcontrollers use the main clock source, and often have dividers you can set for them separately. From the resulting timer speed, you can then set "output compare" registers, which allows you to choose (based on the resolution!) a certain point where the timer will reset - you may have this essentially act as a digital pulse generator, of reasonably good control of the frequency up to a certain point. 8 Bit timers will allow you to choose an output in steps of 1-255, and 16 bit timers allow you to set a step size of 1->65536. Using a 16 bit timer and a very good quality clock source input would yield the "best" output.
The Atmega328P on the Arduino Uno has multiple timers, so you could make the output compare channels produce more than one custom/adjustable frequency pulse signal. |
H: Determining physical address for logical address
I have a simple segmentation system with the following segment table:
Starting Address Length (bytes)
660 248
1752 422
222 198
996 604
Determine the physical address for the following logical addresses; indiciate segment faults.
I know the answers, but I don't understand how they were calculated:
a. 0, 198 -- 858
b. 2, 156 -- 378
c. 1, 530 -- seg fault
d. 3, 444 -- 1440
e. 0, 222 -- 882
AI: a) 660 + 198 = 858
b) 222 + 156 = 378
c) 530 > 422
d) 996 + 444 = 1440
e) 660 + 222 = 882 |
H: Buffer Capacitors
What does a buffer do?
In the given circuit,it is said that capacitors C1 and C4 act as buffer .What is their role here?Can't we just replace them with pull-down resisrors?
AI: For reference the TDA2822M datasheet can be found here.
Those capacitors are connected to the power supply pin (pin #2). They are acting as bypass capacitors. Bypass capacitors are designed to remove AC noise from the DC supply voltage. Since capacitors are a short at high frequencies, high frequency noise is shorted to ground while the DC supply voltage is passed.
You would not want to replace them with pull-down resistors. You don't want to pull down the supply voltage, and if you replaced them high frequency noise would be passed to the supply pin of the IC. |
H: Why do they crimp capacitor leads?
Most manufacturers produces crimped and straight lead pairs of their capacitors which has exactly same capacitance and voltage rating. Why do they bother crimping the leads? What advantage does it make? In which cases a crimped lead capacitor should be preferred?
AI: Ceramic capacitors are rather brittle and so they do not like their leads getting tugged on. Adding these crimps forces the capacitor to sit off the board with a few mm of relatively flexible lead in between. This will isolate the capacitor from forces that it would otherwise experience during vibration, board flexing/bending, thermal expansion/contraction, etc. By providing the crimped leads at the factory, the board house does not require a machine to add those in-house. |
H: DC - DC Amplifier for Piezo Buzzer
I have a Raspberry Pi outputting a 3.3v DC square wave that I'd like to be able to amplify to just under 20v, the maximum the piezo can handle. Just to clarify, the piezo does not have an internal oscillator and the Pi is outputting at anything from 50Hz to 3kHz to make audible tones.
From looking elsewhere online, there seem to be many different approaches to amplification but most require an AC wave to work.
I'd like to be able to simply and cheaply amplify the wave generated by the Pi to make recognisable musical tones with the piezo as loud as possible. The wave doesn't have to be perfect, but I'd rather there was as little interference or noise as possible!
I have 3.3v, 5v and 7.2v available on the project and I could add a pair of 9v batteries if 18v is needed.
The piezo has a 7kohm impedance, if I remember according to the data sheets, if that helps.
A circuit diagram would be good but a bit of an explanation to go with it would be preferred!
Edit: The data sheet is at http://www.farnell.com/cad/356850.pdf
Another edit: I'll be testing Spehro's answer as soon as I can, assuming that school has all the extra components needed.
AI: You could use an inexpensive motor driver chip such as the Diodes ZXBM5210 (plus an inverter, such as 1/6 of a 74HC04 or a MOSFET + a resistor).
You put the piezo plus a small series resistor- perhaps 50\$\Omega\$- in place of the motor. Internal circuit looks like this:
So you would switch between Forward and Reverse using your port pin (you need the inverter to feed the complementary signal to (say) Reverse while the Forward input gets fed directly.
Note that this is a push-pull driver, so the peak-to-peak voltage across the piezo will be a bit less than double the supply voltage, so 9-10V is fine for the supply.
The resistor is to limit the peak current to 200mA since the piezo looks like a fairly low ESR capacitor. Put a good bypass capacitor on the higher voltage supply (perhaps 220uF/16V electrolytic or at least a 10uF/25V ceramic).
This chip has built-in dead time of about 3us so you can just drive the inputs in complementary fashion without worry. The PWM input should be tied to Vdd to avoid the chip itself doing PWM.
I also suggest putting a couple K ohms of series resistance in series with the port pins, just in case something gets shorted to the 10V supply it might save the processor from destruction.
Chances are the piezo will not fail with much higher voltage than the rated 20V, and this chip is rated for 18V maximum supply (36Vp-p) if you feel lucky and want to try it. |
H: How to measure amperate going through a 220V cable?
Meta objective: I want to pull up a TV with a winch, when the TV is turned off. I can already move up and down the TV invoked by my controller (Arduino Nano). The physical push-sensor stops the winch automatically. Good so far.
Objective of this questions: I don't want the guest to push an extra button to make the TV go up or down. There is an indicator when the TV is used and that is the Watts that are going through the 220/230V cable to the TV. If amperage is high, I instruct the winch to let the TV down (viewing position). If it is low, I pull the TV up.
See the sketch for a general idea.
Now, I'm not an electronics engineer. My question is:
1) How can I measure the high amperage (or watt) of the 220/230V cable and give that value to my 5V-controller (Arduino Nano). With my little experience I cannot think of an electrical component that could do that. However, there certainly must be a way to detect the big difference between 300 mili watts and 75 Watts. Nice if someone could point to a real component so that I could read up on that component.
2) Can one achive my meta objective without a controller? (This is nice to know. I'm totally happy if questions 1 is answered thoroughly.)
AI: I may earn downvotes for this, but I would NOT recommend dealing with 230V when having no experience!
Anyway, of course it's possible what you want to do. Not the cheapest, but maybe the safest way would be using a current transducer like this http://www.lem.com/docs/products/lts_6-np.pdf
With that, you can pull the insulated phase wire through the hole, and get a voltage proportional to the current (the exact formula is in the datasheet) at the output to be measured by your Arduino.
Another, less risky approach without 230V:
A further indicator when the TV is off is when you push the "ON/OFF" button on your remote control.
It's most likely an RC5 or RC6 code. Connect an IR receiver to your arduino and implement a RC5 decoder to know whether one turns the TV on or off. |
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