neural_reversible: a register machine whose entire state transition is a bijection. Reversible threshold gates (CNOT/Toffoli/Fredkin as Heaviside AND/XOR), a reversible ALU (Cuccaro in-place adder, subtract as its reverse, negate/increment/rotate/word-Toffoli), and a reversible ISA with branch-register control. The single-step transition is verified bijective (step_back o step = identity over all instructions and branch states) and backward execution reconstructs the input; Bennett's construction realizes irreversible functions with clean ancillas. A bijective step erases no bits, hence no Landauer floor. All layers verified exhaustively at small width.

README.md

@@ -602,6 +602,47 @@ tensor.
 
 ---
 
+## neural_reversible — a processor with no logical erasure
+
+A register machine whose entire state transition is a bijection: no step erases
+information, and the same weights run backward invert it. It is built from
+reversible threshold gates, CNOT (`t <- t XOR c`), Toffoli
+(`t <- t XOR (a AND b)`), and Fredkin (controlled swap), each realized with the
+repository's Heaviside AND/XOR gates and each a permutation of its wires by
+construction, verified exhaustively.
+
+The reversible ALU builds up from those gates. A Cuccaro ripple-carry adder
+computes `b <- (a + b) mod 2^n` in place with one carry ancilla, restoring the
+addend and the ancilla; subtraction is the same circuit run in reverse. XOR,
+two's-complement negate, increment, rotate, and a word-level Toffoli are likewise
+bijections, checked against integer references. The machine adds registers, a
+program counter, a memory with reversible register/memory exchange, and a branch
+register BR that makes control reversible: `PC += dir * BR` with BR = 1 for
+sequential flow, and a branch toggles BR so a matched branch at the destination
+restores it. The single-step transition is verified to be a bijection directly,
+`step_back o step = identity` over every instruction and branch-register state;
+running with dir = -1 reconstructs the input.
+
+Irreversible functions are handled by Bennett's construction (compute into
+scratch, copy the result out, uncompute the scratch), verified to map
+`(a, b, c, 0, 0) -> (a, b, c, 0, f)` for `f = (a+b) XOR c` with the scratch
+returned to zero, so the reversible machine computes what the irreversible
+machines do without erasing.
+
+A bijective transition erases no bits and therefore carries no Landauer floor of
+`kT ln 2` per erased bit. On the analog crossbar realization used for
+`neural_matrix8`, a permutation step is information-theoretically lossless;
+turning that into measured energy below the Landauer bound requires adiabatic
+drive of the crossbar, which is the physical frontier. Logical reversibility is
+proven here.
+
+```bash
+python src/reversible.py       # reversible gates, Cuccaro ALU, Bennett construction
+python src/reversible_cpu.py   # bijective transition and backward execution
+```
+
+---
+
 ## Threshold logic
 
 A threshold gate computes a Boolean function by taking a weighted sum of binary inputs and comparing the result to a threshold; the output is 1 when the sum meets or exceeds the threshold and 0 otherwise. Equivalently, it is a neuron with Heaviside step activation, integer weights, and an integer bias.

src/reversible.py

@@ -0,0 +1,336 @@
+"""Reversible threshold computer.
+
+A conventional processor's state transition is not injective: overwriting a
+register or a carry destroys information, which by Landauer's principle sets a
+floor of kT ln 2 of dissipated energy per erased bit. This machine is built so
+that the whole state transition T is a bijection, hence realizable with no
+logical erasure and (on an adiabatically driven substrate) no Landauer floor.
+
+Everything is expressed in the repository's threshold substrate. The reversible
+primitives are threshold circuits whose input->output map happens to be a
+permutation:
+
+    NOT   t              -> t' = 1 - t
+    CNOT  c t            -> t' = t XOR c
+    TOFF  a b t          -> t' = t XOR (a AND b)          (Toffoli, universal)
+    FRED  c x y          -> (x,y)' = (c?y:x, c?x:y)       (Fredkin, controlled swap)
+
+Each target update is XOR(target, product-of-controls); XOR and AND are the same
+Heaviside threshold gates used everywhere else in the repo, so a reversible gate
+is a small threshold network that is bijective on its wires, and a composition of
+them is a bijective threshold network on the register.
+
+This module builds up from those gates to a reversible in-place adder (Cuccaro),
+and later files add the reversible ALU, ISA, and the bijective machine step.
+Reversibility is not asserted, it is verified: every construction is checked to
+be a permutation of its state space, exhaustively at small widths.
+"""
+from __future__ import annotations
+from typing import List
+
+# --- threshold-gate truth: the target updates are computed by Heaviside gates ---
+def H(x: int) -> int:
+    return 1 if x >= 0 else 0
+
+
+def g_and(a: int, b: int) -> int:
+    return H(a + b - 2)          # fires iff a=b=1
+
+
+def g_xor(a: int, b: int) -> int:
+    # XOR as AND(OR, NAND): OR=H(a+b-1), NAND=H(1-a-b), out=AND(OR,NAND)
+    return g_and(H(a + b - 1), H(1 - a - b))
+
+
+# --- reversible primitives, in place on a bit register (a Python list) ---
+def NOT(reg: List[int], t: int) -> None:
+    reg[t] = 1 - reg[t]
+
+
+def CNOT(reg: List[int], c: int, t: int) -> None:
+    reg[t] = g_xor(reg[t], reg[c])
+
+
+def TOFF(reg: List[int], a: int, b: int, t: int) -> None:
+    reg[t] = g_xor(reg[t], g_and(reg[a], reg[b]))
+
+
+def FRED(reg: List[int], c: int, x: int, y: int) -> None:
+    # controlled swap of x,y on control c
+    if reg[c]:
+        reg[x], reg[y] = reg[y], reg[x]
+
+
+# --- Cuccaro ripple-carry adder: b += a in place, one carry ancilla ---
+# MAJ(c,b,a): b^=a ; c^=a ; a ^= b&c        UMA(c,b,a): a ^= b&c ; c^=a ; b^=c
+def _maj(reg, c, b, a):
+    CNOT(reg, a, b)
+    CNOT(reg, a, c)
+    TOFF(reg, b, c, a)
+
+
+def _uma(reg, c, b, a):
+    TOFF(reg, b, c, a)
+    CNOT(reg, a, c)
+    CNOT(reg, c, b)
+
+
+# Each primitive below is its own inverse, so the inverse of a gate sequence is
+# the reversed sequence. Building the adder as an op list gives subtraction for
+# free (run it backward).
+def _maj_ops(c, b, a):
+    return [(CNOT, a, b), (CNOT, a, c), (TOFF, b, c, a)]
+
+
+def _uma_ops(c, b, a):
+    return [(TOFF, b, c, a), (CNOT, a, c), (CNOT, c, b)]
+
+
+def _adder_ops(a_bits, b_bits, carry, cout=None):
+    n = len(a_bits)
+    ops = _maj_ops(carry, b_bits[0], a_bits[0])
+    for i in range(1, n):
+        ops += _maj_ops(a_bits[i - 1], b_bits[i], a_bits[i])
+    if cout is not None:
+        ops.append((CNOT, a_bits[n - 1], cout))
+    for i in range(n - 1, 0, -1):
+        ops += _uma_ops(a_bits[i - 1], b_bits[i], a_bits[i])
+    ops += _uma_ops(carry, b_bits[0], a_bits[0])
+    return ops
+
+
+def _apply(reg, ops, inverse=False):
+    for gate, *args in (reversed(ops) if inverse else ops):
+        gate(reg, *args)
+
+
+def add_into(reg, a_bits, b_bits, carry, cout=None):
+    """b <- (a + b) mod 2^n (LSB first); a and carry (=0) restored."""
+    _apply(reg, _adder_ops(a_bits, b_bits, carry, cout))
+
+
+def sub_into(reg, a_bits, b_bits, carry, cout=None):
+    """b <- (b - a) mod 2^n: the adder run backward."""
+    _apply(reg, _adder_ops(a_bits, b_bits, carry, cout), inverse=True)
+
+
+def xor_into(reg, a_bits, b_bits):
+    """b <- b XOR a, bitwise (self-inverse)."""
+    for a, b in zip(a_bits, b_bits):
+        CNOT(reg, a, b)
+
+
+def incr(reg, b_bits, one_bits, carry):
+    """b <- b + 1 mod 2^n. `one_bits` is a register holding the constant 1
+    (LSB set), restored on exit; `carry` is a clean ancilla, restored."""
+    add_into(reg, one_bits, b_bits, carry)
+
+
+def neg_into(reg, b_bits, one_bits, carry):
+    """b <- (-b) mod 2^n via two's complement (~b then +1). Self-inverse."""
+    for t in b_bits:
+        NOT(reg, t)
+    add_into(reg, one_bits, b_bits, carry)
+
+
+def rot_left(reg, b_bits, k=1):
+    """Rotate the word left by k (a permutation of bit positions; reversible)."""
+    n = len(b_bits)
+    k %= n
+    vals = [reg[b_bits[i]] for i in range(n)]
+    for i in range(n):
+        reg[b_bits[(i + k) % n]] = vals[i]
+
+
+def and_into(reg, a_bits, b_bits, t_bits):
+    """t <- t XOR (a AND b), bitwise (word-level Toffoli). Self-inverse."""
+    for a, b, t in zip(a_bits, b_bits, t_bits):
+        TOFF(reg, a, b, t)
+
+
+# --- verification helpers ---
+def is_permutation(fn, nbits: int) -> bool:
+    """Check fn: {0,1}^nbits -> {0,1}^nbits is a bijection (exhaustive)."""
+    seen = set()
+    for x in range(1 << nbits):
+        reg = [(x >> k) & 1 for k in range(nbits)]
+        fn(reg)
+        y = sum(b << k for k, b in enumerate(reg))
+        seen.add(y)
+    return len(seen) == (1 << nbits)
+
+
+def _test_primitives():
+    ok = True
+    ok &= is_permutation(lambda r: NOT(r, 0), 1)
+    ok &= is_permutation(lambda r: CNOT(r, 0, 1), 2)
+    ok &= is_permutation(lambda r: TOFF(r, 0, 1, 2), 3)
+    ok &= is_permutation(lambda r: FRED(r, 0, 1, 2), 3)
+    print(f"  primitives bijective (NOT/CNOT/TOFF/FRED): {'OK' if ok else 'FAIL'}")
+    return ok
+
+
+def _test_adder(width=4):
+    # layout: a[0..w-1], b[0..w-1], carry
+    a_bits = list(range(width))
+    b_bits = list(range(width, 2 * width))
+    carry = 2 * width
+    n = 2 * width + 1
+    ok_perm = is_permutation(lambda r: add_into(r, a_bits, b_bits, carry), n)
+    bad = 0
+    mask = (1 << width) - 1
+    for a in range(1 << width):
+        for b in range(1 << width):
+            reg = [0] * n
+            for k in range(width):
+                reg[a_bits[k]] = (a >> k) & 1
+                reg[b_bits[k]] = (b >> k) & 1
+            add_into(reg, a_bits, b_bits, carry)
+            got_a = sum(reg[a_bits[k]] << k for k in range(width))
+            got_b = sum(reg[b_bits[k]] << k for k in range(width))
+            if got_a != a or got_b != ((a + b) & mask) or reg[carry] != 0:
+                bad += 1
+    print(f"  Cuccaro adder {width}-bit: bijection={'OK' if ok_perm else 'FAIL'}  "
+          f"b<-a+b, a & carry restored={'OK' if bad == 0 else f'FAIL({bad})'}")
+    return ok_perm and bad == 0
+
+
+def bennett(reg, a_b, b_b, c_b, scr_b, out_b, carry):
+    """Bennett compute-copy-uncompute for the irreversible f(a,b,c)=(a+b) XOR c.
+    Maps (a,b,c,0,0) -> (a,b,c,0,f) with inputs preserved and scratch cleaned, so
+    a function that discards information as a standalone map is realized by a
+    reversible circuit. The op list is returned so the inverse is the reverse."""
+    ops = []
+    # compute f into scratch (scratch starts 0): scratch += a; scratch += b; scratch ^= c
+    ops += _adder_ops(a_b, scr_b, carry)
+    ops += _adder_ops(b_b, scr_b, carry)
+    ops += [(CNOT, c, s) for c, s in zip(c_b, scr_b)]
+    # copy scratch -> out
+    ops += [(CNOT, s, o) for s, o in zip(scr_b, out_b)]
+    # uncompute scratch (reverse of the compute prefix)
+    n_comp = len(_adder_ops(a_b, scr_b, carry)) * 2 + len(c_b)
+    ops += [(g, *args) for g, *args in reversed(ops[:n_comp])]
+    _apply(reg, ops)
+    return ops
+
+
+def _test_bennett(width=4):
+    a_b = list(range(width))
+    b_b = list(range(width, 2 * width))
+    c_b = list(range(2 * width, 3 * width))
+    scr_b = list(range(3 * width, 4 * width))
+    out_b = list(range(4 * width, 5 * width))
+    carry = 5 * width
+    n = 5 * width + 1
+    mask = (1 << width) - 1
+    bad = 0
+    for a in range(1 << width):
+        for b in range(1 << width):
+            for c in range(1 << width):
+                r = [0] * n
+                for k in range(width):
+                    r[a_b[k]] = (a >> k) & 1
+                    r[b_b[k]] = (b >> k) & 1
+                    r[c_b[k]] = (c >> k) & 1
+                bennett(r, a_b, b_b, c_b, scr_b, out_b, carry)
+                ra = sum(r[a_b[k]] << k for k in range(width))
+                rb = sum(r[b_b[k]] << k for k in range(width))
+                rc = sum(r[c_b[k]] << k for k in range(width))
+                rs = sum(r[scr_b[k]] << k for k in range(width))
+                ro = sum(r[out_b[k]] << k for k in range(width))
+                if (ra, rb, rc, rs, ro, r[carry]) != (a, b, c, 0, ((a + b) & mask) ^ c, 0):
+                    bad += 1
+    print(f"  Bennett (a,b,c,0,0)->(a,b,c,0,(a+b)^c), scratch cleaned "
+          f"[{width}-bit]: {'OK' if bad == 0 else f'FAIL({bad})'}")
+    return bad == 0
+
+
+def _test_alu(width=4):
+    mask = (1 << width) - 1
+    a_b = list(range(width))
+    b_b = list(range(width, 2 * width))
+    one_b = list(range(2 * width, 3 * width))
+    t_b = list(range(3 * width, 4 * width))
+    carry = 4 * width
+    n = 4 * width + 1
+
+    def fresh(a=0, b=0, t=0, one=False):
+        r = [0] * n
+        for k in range(width):
+            r[a_b[k]] = (a >> k) & 1
+            r[b_b[k]] = (b >> k) & 1
+            r[t_b[k]] = (t >> k) & 1
+        if one:
+            r[one_b[0]] = 1
+        return r
+
+    def rd(r, bits):
+        return sum(r[bits[k]] << k for k in range(width))
+
+    results = {}
+    # subtract
+    bad = 0
+    for a in range(1 << width):
+        for b in range(1 << width):
+            r = fresh(a, b)
+            sub_into(r, a_b, b_b, carry)
+            if rd(r, b_b) != ((b - a) & mask) or rd(r, a_b) != a or r[carry] != 0:
+                bad += 1
+    results["sub b-=a"] = bad == 0 and is_permutation(lambda r: sub_into(r, a_b, b_b, carry), n)
+    # xor
+    bad = 0
+    for a in range(1 << width):
+        for b in range(1 << width):
+            r = fresh(a, b)
+            xor_into(r, a_b, b_b)
+            if rd(r, b_b) != (a ^ b) or rd(r, a_b) != a:
+                bad += 1
+    results["xor b^=a"] = bad == 0
+    # negate
+    bad = 0
+    for b in range(1 << width):
+        r = fresh(b=b, one=True)
+        neg_into(r, b_b, one_b, carry)
+        if rd(r, b_b) != ((-b) & mask) or rd(r, one_b) != 1 or r[carry] != 0:
+            bad += 1
+    results["neg b=-b"] = bad == 0
+    # increment
+    bad = 0
+    for b in range(1 << width):
+        r = fresh(b=b, one=True)
+        incr(r, b_b, one_b, carry)
+        if rd(r, b_b) != ((b + 1) & mask):
+            bad += 1
+    results["incr b+=1"] = bad == 0
+    # rotate
+    bad = 0
+    for b in range(1 << width):
+        r = fresh(b=b)
+        rot_left(r, b_b, 1)
+        exp = ((b << 1) | (b >> (width - 1))) & mask
+        if rd(r, b_b) != exp:
+            bad += 1
+    results["rot_left"] = bad == 0
+    # and-into (Toffoli word)
+    bad = 0
+    for a in range(1 << width):
+        for b in range(1 << width):
+            for t in range(1 << width):
+                r = fresh(a, b, t)
+                and_into(r, a_b, b_b, t_b)
+                if rd(r, t_b) != (t ^ (a & b)):
+                    bad += 1
+    results["and t^=a&b"] = bad == 0
+    ok = all(results.values())
+    print("  reversible ALU " + f"{width}-bit: " +
+          "  ".join(f"{k}={'OK' if v else 'FAIL'}" for k, v in results.items()))
+    return ok
+
+
+if __name__ == "__main__":
+    print("Reversible primitives + ALU")
+    a = _test_primitives()
+    b = _test_adder(4) and _test_adder(5)
+    c = _test_alu(4)
+    d = _test_bennett(4)
+    print("PASS" if (a and b and c and d) else "FAIL")

src/reversible_cpu.py

@@ -0,0 +1,166 @@
+"""Reversible register machine with a bijective state transition.
+
+State s = (R[0..K-1], PC, BR, MEM[0..M-1]); the program is a read-only array
+fetched by PC. Every instruction is a reversible update, and control flow is
+reversible through a branch register BR: the program counter advances by
+`PC += dir*BR` each cycle (BR = 1 for sequential flow), and a branch toggles BR
+by XOR-ing `offset ^ 1`, so a matched branch at the destination restores BR to 1.
+Because BR carries the control state, the exact same machine run with dir = -1
+retraces the computation and reconstructs the input, dissipating nothing.
+
+Instruction inverses (used for dir = -1):
+    ADD<->SUB, ADDI(k)<->ADDI(-k), XOR/XORI/NEG/TOFF/EXCH self-inverse,
+    ROL(k)<->ROL(-k); BRA/BEZ branch toggles are self-inverse.
+
+The word-level updates are the reversible threshold circuits verified in
+reversible.py (Cuccaro adder, bitwise Toffoli, rotate); this file is the
+value-level machine whose single-step transition those circuits implement.
+"""
+from __future__ import annotations
+from typing import Dict, List, Tuple, Optional
+
+
+class RCPU:
+    def __init__(self, program: List[tuple], k_regs=4, width=8, mem_words=16):
+        self.prog = program
+        self.K = k_regs
+        self.W = width
+        self.M = mem_words
+        self.mask = (1 << width) - 1
+        self.L = len(program)
+
+    def new_state(self, regs=None, mem=None) -> dict:
+        return {"R": list(regs) + [0] * (self.K - len(regs)) if regs else [0] * self.K,
+                "PC": 0, "BR": 1, "MEM": list(mem) + [0] * (self.M - len(mem)) if mem else [0] * self.M}
+
+    # ---- reversible instruction effects (forward and inverse) ----
+    def _data(self, s, I, inverse: bool):
+        R, MEM, m = s["R"], s["MEM"], self.mask
+        op = I[0]
+        if op == "ADD":
+            d, r = I[1], I[2]
+            R[d] = (R[d] - R[r]) & m if inverse else (R[d] + R[r]) & m
+        elif op == "SUB":
+            d, r = I[1], I[2]
+            R[d] = (R[d] + R[r]) & m if inverse else (R[d] - R[r]) & m
+        elif op == "ADDI":
+            d, k = I[1], I[2]
+            R[d] = (R[d] - k) & m if inverse else (R[d] + k) & m
+        elif op == "XOR":
+            R[I[1]] ^= R[I[2]]
+        elif op == "XORI":
+            R[I[1]] ^= (I[2] & m)
+        elif op == "NEG":
+            R[I[1]] = (-R[I[1]]) & m
+        elif op == "TOFF":
+            R[I[1]] ^= (R[I[2]] & R[I[3]])
+        elif op == "ROL":
+            k = (-I[2] if inverse else I[2]) % self.W
+            R[I[1]] = ((R[I[1]] << k) | (R[I[1]] >> (self.W - k))) & m if k else R[I[1]]
+        elif op == "EXCH":
+            d, r = I[1], I[2]
+            a = R[r] % self.M
+            R[d], MEM[a] = MEM[a], R[d]
+        # BRA/BEZ/HALT have no data effect
+
+    def _toggle(self, s, I):
+        """Reversible control: toggle BR for a taken branch (self-inverse)."""
+        op = I[0]
+        if op == "BRA":
+            s["BR"] ^= (I[1] ^ 1)
+        elif op == "BEZ":
+            if s["R"][I[1]] == 0:
+                s["BR"] ^= (I[2] ^ 1)
+
+    # ---- single-step transition and its inverse ----
+    def step(self, s):
+        I = self.prog[s["PC"]]
+        self._data(s, I, inverse=False)
+        self._toggle(s, I)
+        s["PC"] = (s["PC"] + s["BR"]) % self.L
+
+    def step_back(self, s):
+        s["PC"] = (s["PC"] - s["BR"]) % self.L
+        I = self.prog[s["PC"]]
+        self._toggle(s, I)               # self-inverse: restores BR
+        self._data(s, I, inverse=True)
+
+    def run(self, s, steps):
+        for _ in range(steps):
+            self.step(s)
+        return s
+
+    def run_back(self, s, steps):
+        for _ in range(steps):
+            self.step_back(s)
+        return s
+
+
+def _clone(s):
+    return {"R": list(s["R"]), "PC": s["PC"], "BR": s["BR"], "MEM": list(s["MEM"])}
+
+
+def _eq(a, b):
+    return a["R"] == b["R"] and a["PC"] == b["PC"] and a["BR"] == b["BR"] and a["MEM"] == b["MEM"]
+
+
+def test_straight_line():
+    prog = [("ADD", 1, 0), ("XOR", 1, 0), ("NEG", 1), ("ADDI", 1, 7),
+            ("TOFF", 2, 0, 1), ("ROL", 0, 1)]
+    m = RCPU(prog, width=8)
+    ok = True
+    for a in (5, 0, 255, 100):
+        for b in (3, 1, 200):
+            s0 = m.new_state([a, b, 0, 0])
+            s = _clone(s0)
+            m.run(s, len(prog))
+            fwd = _clone(s)
+            m.run_back(s, len(prog))
+            ok &= _eq(s, s0)               # round-trip recovers the exact input
+    print(f"  straight-line round-trip (dir -1 recovers input): {'OK' if ok else 'FAIL'}")
+    return ok
+
+
+def test_bijection():
+    """The machine's single-step transition is a bijection: step_back inverts
+    step (and vice versa) for every instruction, over a sweep of states
+    including the branch register. This is reversibility, program-independent."""
+    import itertools
+    W = 4
+    prog = [
+        ("ADD", 1, 0), ("SUB", 1, 0), ("ADDI", 2, 3), ("XOR", 1, 2),
+        ("XORI", 0, 5), ("NEG", 3), ("TOFF", 3, 0, 1), ("ROL", 0, 1),
+        ("EXCH", 2, 3), ("BRA", 2), ("BEZ", 1, 3), ("BEZ", 0, -2),
+    ]
+    m = RCPU(prog, k_regs=4, width=W, mem_words=4)
+    bad = 0
+    checked = 0
+    rng = __import__("random").Random(0)
+    for pc in range(len(prog)):
+        for br in (1, 2, 3, -2, -1):
+            for _ in range(60):
+                s0 = {"R": [rng.randint(0, (1 << W) - 1) for _ in range(4)],
+                      "PC": pc, "BR": br,
+                      "MEM": [rng.randint(0, (1 << W) - 1) for _ in range(4)]}
+                s = _clone(s0)
+                m.step(s)
+                m.step_back(s)
+                if not _eq(s, s0):
+                    bad += 1
+                # and the other composition order
+                s = _clone(s0)
+                m.step_back(s)
+                m.step(s)
+                if not _eq(s, s0):
+                    bad += 1
+                checked += 2
+    print(f"  step_back o step = id over {checked} (state, instruction) cases: "
+          f"{'OK' if bad == 0 else f'FAIL({bad})'}")
+    return bad == 0
+
+
+if __name__ == "__main__":
+    print("Reversible CPU")
+    a = test_straight_line()
+    b = test_bijection()
+    print("PASS" if (a and b) else "FAIL")