Dongyun Zou commited on
Add concise LaTeX pseudocode for FP32 and INT32 ExpCast8
Browse files
expcast8-vs-i32/expcast8_single_score_pseudocode.tex
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| 1 |
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\documentclass[10pt]{article}
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| 2 |
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\usepackage{amsmath}
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\usepackage{amssymb}
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\usepackage[margin=1in]{geometry}
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\newcommand{\sat}[1]{\operatorname{sat}_{#1}}
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\newcommand{\bits}{\operatorname{bits}}
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\newcommand{\bytezero}{\operatorname{byte}_0}
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\newcommand{\lowthirtytwo}{\operatorname{low32}}
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\newcommand{\RNE}{\operatorname{RNE}}
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\newcommand{\RNfp}{\operatorname{RN}_{\mathrm{fp32}}}
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\begin{document}
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\section*{ExpCast8 for One Score}
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For both algorithms, let
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\[
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z=cS-m+\Omega,
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\qquad
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q^{\star}
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=
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\RNE\!\left(
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\operatorname{clamp}(8z+56+\beta,0,126)
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\right),
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\]
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where $S$ is one attention score, $c>0$ is the combined QK and
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softmax scale, $m$ is the row maximum, $\Omega$ is a shared offset,
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and $\beta$ is the ExpCast8 correction bias.
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\subsection*{Pseudocode 1: $S$ is FP32}
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Define
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\[
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A_f=\frac{8c}{126},
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\qquad
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B_f=\frac{-8m+8\Omega+56+\beta}{126},
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\qquad
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M=1.5\cdot 2^{23}.
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\]
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The GPU applies the following operations to one FP32 score:
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\[
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\begin{array}{rcll}
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1. & u &\leftarrow
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\sat{[0,1]}\!\left(\RNfp(SA_f+B_f)\right)
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& \text{\rm [\texttt{FFMA.SAT}]}\\[4pt]
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2. & y &\leftarrow
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\RNfp(126u+M)
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& \text{\rm [\texttt{FFMA2}, two scores per instruction]}\\[4pt]
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3. & q &\leftarrow
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\bytezero\!\left(\bits(y)\right)
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& \text{\rm [byte extraction; \texttt{PRMT} when packed]}\\[4pt]
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4. & &\mathbf{return}\ q. &
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\end{array}
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\]
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Up to the FP32 rounding in the first line,
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\[
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126u
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\approx
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\operatorname{clamp}(8z+56+\beta,0,126).
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\]
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At $M=1.5\cdot2^{23}$, one FP32 ULP is exactly $1$. Therefore the
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second line rounds $126u$ to an integer and stores that integer in the
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low bits of $y$:
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\[
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\bits(y)=\bits(M)+q.
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\]
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Hence the lowest byte of $y$ is the returned E4M3 code $q$, which
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approximates $q^{\star}$.
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\subsection*{Pseudocode 2: $S$ is INT32}
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Choose $F=20$ fractional bits. Once per tile, compute
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\[
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A=\RNE\!\left(8c\,2^F\right),
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\]
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\[
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B=
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\RNE\!\left(
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\left[8(-m+\Omega)+56+\beta\right]2^F
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\right)
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+2^{F-1}.
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\]
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In the production configuration, $z\leq 8$, so the largest positive
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code is below $126$. Therefore unsigned-byte saturation is sufficient;
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no separate upper clamp is required in the per-score path.
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The GPU then applies the following operations to one INT32 score:
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\[
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\begin{array}{rcll}
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1. & t &\leftarrow
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\lowthirtytwo(SA+B)
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& \text{\rm [\texttt{IMAD}]}\\[4pt]
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2. & r &\leftarrow
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t\gg_{\mathrm{arith}}F
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& \text{\rm [\texttt{SHF.R.S32.HI}]}\\[4pt]
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3. & q &\leftarrow
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\sat{\mathrm{u8}}(r)
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& \text{\rm [\texttt{I2IP.U8.S32.SAT}]}\\[4pt]
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4. & &\mathbf{return}\ q. &
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\end{array}
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\]
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Ignoring fixed-point coefficient error and assuming that the 32-bit
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multiply-add does not wrap,
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\[
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\frac{SA+B-2^{F-1}}{2^F}
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\approx
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8z+56+\beta.
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\]
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Thus the half-unit $2^{F-1}$ followed by the arithmetic shift performs
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integer rounding:
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\[
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r
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=
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\left\lfloor
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\frac{SA+B}{2^F}
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\right\rfloor
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\approx
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\RNE(8z+56+\beta),
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\]
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for non-tie values. The exact shift implementation uses half-up
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rounding at ties. Finally, \texttt{I2IP} directly saturates the result
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to one unsigned byte.
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\end{document}
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