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verilog_data-1 / The-OpenROAD-Project_OpenROAD /src /web /test /cpp
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SAIFIINDUSTRIES
Add batch 1 (YosysHQ_picorv32, alexforencich_verilog-ethernet, The-OpenROAD-Project_OpenROAD, darklife_darkriscv, corundum_corundum)
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