Add batch 1 (YosysHQ_picorv32, alexforencich_verilog-ethernet, The-OpenROAD-Project_OpenROAD, darklife_darkriscv, corundum_corundum)
f61bac1 verified | source "helpers.tcl" | |
| set blif [rmp::create_blif "LOGIC1_X1" "Z" "LOGIC0_X1" "Z"] | |
| set db [ord::get_db] | |
| read_lef "./Nangate45/Nangate45.lef" | |
| read_def "./design_in_out.def" | |
| read_liberty "./Nangate45/Nangate45_typ.lib" | |
| set chip [$db getChip] | |
| set block [$chip getBlock] | |
| rmp::blif_add_instance $blif "_i1_" | |
| rmp::blif_add_instance $blif "_i2_" | |
| rmp::blif_add_instance $blif "_i3_" | |
| rmp::blif_add_instance $blif "_i4_" | |
| rmp::blif_add_instance $blif "_i5_" | |
| rmp::blif_add_instance $blif "_i6_" | |
| rmp::blif_add_instance $blif "_i7_" | |
| rmp::blif_add_instance $blif "_i8_" | |
| rmp::blif_read $blif "./blif_reader_sequential.blif" | |
| set result_def [make_result_file "blif_reader_sequential.def"] | |
| write_def "$result_def" | |
| diff_files "$result_def" "blif_reader_sequential.def.ok" | |