verilog_data-1 / The-OpenROAD-Project_OpenROAD-flow-scripts /tools /FakeRAM2.0 /test /dpsram_flow_test.py
Add batch 5 (Luthiraa_TALOS-V2, dawsonjon_fpu, The-OpenROAD-Project_OpenROAD-flow-scripts, antonblanchard_microwatt, alexforencich_verilog-i2c)
784ee2c verified Download The-OpenROAD-Project_OpenROAD-flow-scripts/tools/FakeRAM2.0/test/dpsram_flow_test.py from SAIFIINDUSTRIES/verilog_data-1: direct link, hf CLI and curl.
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- Download file 656 Bytes
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https://huggingface.co/datasets/SAIFIINDUSTRIES/verilog_data-1/resolve/main/The-OpenROAD-Project_OpenROAD-flow-scripts/tools/FakeRAM2.0/test/dpsram_flow_test.py
- Command line
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hf download hf://datasets/SAIFIINDUSTRIES/verilog_data-1/The-OpenROAD-Project_OpenROAD-flow-scripts/tools/FakeRAM2.0/test/dpsram_flow_test.py
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curl -L -o dpsram_flow_test.py https://huggingface.co/datasets/SAIFIINDUSTRIES/verilog_data-1/resolve/main/The-OpenROAD-Project_OpenROAD-flow-scripts/tools/FakeRAM2.0/test/dpsram_flow_test.py
656 Bytes
| #!/usr/bin/env python3 | |
| import os | |
| import shutil | |
| import unittest | |
| import subprocess | |
| from flow_test_base import FlowTestBase | |
| class DPSRAMFlowTest(FlowTestBase): | |
| """Flow test for dual port RAM""" | |
| def setUp(self): | |
| """Sets up paths to validate results""" | |
| self._tag = "dpsram" | |
| FlowTestBase.set_up(self, self._tag) | |
| def test_example_input(self): | |
| """Tests the example input run""" | |
| expected_ram_list = [ | |
| "dpsram_256x256", | |
| "dpsram_256x32", | |
| "dpsram_256x32_h", | |
| ] | |
| self._execute_run(self._tag, expected_ram_list) | |
| if __name__ == "__main__": | |
| unittest.main() | |