Add batch 5 (Luthiraa_TALOS-V2, dawsonjon_fpu, The-OpenROAD-Project_OpenROAD-flow-scripts, antonblanchard_microwatt, alexforencich_verilog-i2c)
784ee2c verified | source $::env(SCRIPTS_DIR)/load.tcl | |
| erase_non_stage_variables floorplan | |
| load_design 2_1_floorplan.odb 2_1_floorplan.sdc | |
| source_step_tcl PRE MACRO_PLACE | |
| source $::env(SCRIPTS_DIR)/macro_place_util.tcl | |
| source_step_tcl POST MACRO_PLACE | |
| report_design_area | |
| orfs_write_db $::env(RESULTS_DIR)/2_2_floorplan_macro.odb | |
| write_macro_placement $::env(RESULTS_DIR)/2_2_floorplan_macro.tcl | |