Datasets:

SAIFIINDUSTRIES
/

verilog_data-1

Dataset card Files Files and versions

verilog_data-1 / The-OpenROAD-Project_OpenROAD-flow-scripts /flow /designs /src /mock-array /BUILD

SAIFIINDUSTRIES's picture

SAIFIINDUSTRIES

Add batch 5 (Luthiraa_TALOS-V2, dawsonjon_fpu, The-OpenROAD-Project_OpenROAD-flow-scripts, antonblanchard_microwatt, alexforencich_verilog-i2c)

784ee2c verified 29 days ago

Raw History Blame Contribute Delete

61 Bytes

	load("//flow/designs:design.bzl", "files")

	files("verilog")