File size: 2,872 Bytes
e92f76f | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 | # Master Makefile — MFMA Core (OCaml → C → HLS → RTL → FPGA/ASIC)
# v1.0 Release
.PHONY: all hls fpga asic hip cuda clean
# ============================================================
# Toolchain Configuration
# ============================================================
OCAMLOPT = ocamlopt
CC = clang
CFLAGS = -O3 -Wall -Wextra -fPIC -noautolink -std=c11
HIPCC = hipcc
NVCC = nvcc
# ============================================================
# HLS Library Build (OCaml → C → .so)
# ============================================================
TARGET_LIB = libmfmacore.so
OBJS = src/mfma_core.o src/mfma_hls_wrapper.o
all: $(TARGET_LIB)
$(TARGET_LIB): $(OBJS)
$(CC) -shared -o $@ $^ -lm
src/mfma_core.o: src/mfma_core.ml
$(OCAMLOPT) -output-obj -noautolink -runtime-variant _nolithic $< -o $@
src/mfma_hls_wrapper.o: src/mfma_hls_wrapper.c src/mfma_core.h
$(CC) $(CFLAGS) -c $< -o $@
# ============================================================
# HIP Build (AMD gfx942)
# ============================================================
hip:
$(HIPCC) --offload-arch=gfx942 -O3 src/mfma_core_hip.cpp -o mfma_hip
# ============================================================
# CUDA Build (NVIDIA RTX 3080)
# ============================================================
cuda:
$(NVCC) -O3 -arch=sm_86 -Xcompiler -fPIC -shared src/mfma_core.cu -o libmfmacore_cuda.so
# ============================================================
# FPGA Synthesis (AMD Vivado)
# ============================================================
fpga:
mkdir -p fpga/reports fpga/checkpoints fpga/bitstream
cd fpga && vivado -mode batch -source scripts/run_synth.tcl
cd fpga && vivado -mode batch -source scripts/run_impl.tcl
cd fpga && vivado -mode batch -source scripts/generate_bitstream.tcl
# ============================================================
# ASIC Synthesis (Synopsys DC + PrimeTime)
# ============================================================
asic:
mkdir -p asic/reports
cd asic && dc_shell -f scripts/synthesize_asic.tcl
cd asic && pt_shell -f scripts/signoff_sta.tcl
# ============================================================
# GDSII Layout (GDSFactory)
# ============================================================
layout:
cd asic/scripts && python3 mfma_core_layout.py
# ============================================================
# DRC/LVS (KLayout)
# ============================================================
drc:
cd asic/scripts && python3 run_drc_lvs.py mfma_core.gdsii ../reports/drc_report.txt tsmc_n6
# ============================================================
# Clean
# ============================================================
clean:
rm -f $(OBJS) $(TARGET_LIB) *.o *.cmi *.cmx *.annot
rm -f mfma_hip libmfmacore_cuda.so
rm -rf fpga/reports fpga/checkpoints fpga/bitstream
rm -rf asic/reports
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